Creation of Cybook 2416 (actually Gen4) repository
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mlt
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Documentation/drivers/edac/edac.txt
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Documentation/drivers/edac/edac.txt
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EDAC - Error Detection And Correction
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Written by Doug Thompson <norsk5@xmission.com>
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7 Dec 2005
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EDAC was written by:
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Thayne Harbaugh,
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modified by Dave Peterson, Doug Thompson, et al,
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from the bluesmoke.sourceforge.net project.
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============================================================================
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EDAC PURPOSE
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The 'edac' kernel module goal is to detect and report errors that occur
|
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within the computer system. In the initial release, memory Correctable Errors
|
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(CE) and Uncorrectable Errors (UE) are the primary errors being harvested.
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Detecting CE events, then harvesting those events and reporting them,
|
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CAN be a predictor of future UE events. With CE events, the system can
|
||||
continue to operate, but with less safety. Preventive maintenance and
|
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proactive part replacement of memory DIMMs exhibiting CEs can reduce
|
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the likelihood of the dreaded UE events and system 'panics'.
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|
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In addition, PCI Bus Parity and SERR Errors are scanned for on PCI devices
|
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in order to determine if errors are occurring on data transfers.
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The presence of PCI Parity errors must be examined with a grain of salt.
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There are several add-in adapters that do NOT follow the PCI specification
|
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with regards to Parity generation and reporting. The specification says
|
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the vendor should tie the parity status bits to 0 if they do not intend
|
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to generate parity. Some vendors do not do this, and thus the parity bit
|
||||
can "float" giving false positives.
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[There are patches in the kernel queue which will allow for storage of
|
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quirks of PCI devices reporting false parity positives. The 2.6.18
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kernel should have those patches included. When that becomes available,
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then EDAC will be patched to utilize that information to "skip" such
|
||||
devices.]
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EDAC will have future error detectors that will be integrated with
|
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EDAC or added to it, in the following list:
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MCE Machine Check Exception
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MCA Machine Check Architecture
|
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NMI NMI notification of ECC errors
|
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MSRs Machine Specific Register error cases
|
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and other mechanisms.
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These errors are usually bus errors, ECC errors, thermal throttling
|
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and the like.
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============================================================================
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EDAC VERSIONING
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EDAC is composed of a "core" module (edac_mc.ko) and several Memory
|
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Controller (MC) driver modules. On a given system, the CORE
|
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is loaded and one MC driver will be loaded. Both the CORE and
|
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the MC driver have individual versions that reflect current release
|
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level of their respective modules. Thus, to "report" on what version
|
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a system is running, one must report both the CORE's and the
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MC driver's versions.
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LOADING
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If 'edac' was statically linked with the kernel then no loading is
|
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necessary. If 'edac' was built as modules then simply modprobe the
|
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'edac' pieces that you need. You should be able to modprobe
|
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hardware-specific modules and have the dependencies load the necessary core
|
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modules.
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Example:
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$> modprobe amd76x_edac
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loads both the amd76x_edac.ko memory controller module and the edac_mc.ko
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core module.
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============================================================================
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EDAC sysfs INTERFACE
|
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EDAC presents a 'sysfs' interface for control, reporting and attribute
|
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reporting purposes.
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EDAC lives in the /sys/devices/system/edac directory. Within this directory
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there currently reside 2 'edac' components:
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mc memory controller(s) system
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pci PCI control and status system
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============================================================================
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Memory Controller (mc) Model
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First a background on the memory controller's model abstracted in EDAC.
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Each 'mc' device controls a set of DIMM memory modules. These modules are
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laid out in a Chip-Select Row (csrowX) and Channel table (chX). There can
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be multiple csrows and multiple channels.
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Memory controllers allow for several csrows, with 8 csrows being a typical value.
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Yet, the actual number of csrows depends on the electrical "loading"
|
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of a given motherboard, memory controller and DIMM characteristics.
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Dual channels allows for 128 bit data transfers to the CPU from memory.
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Some newer chipsets allow for more than 2 channels, like Fully Buffered DIMMs
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(FB-DIMMs). The following example will assume 2 channels:
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Channel 0 Channel 1
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===================================
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csrow0 | DIMM_A0 | DIMM_B0 |
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csrow1 | DIMM_A0 | DIMM_B0 |
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===================================
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===================================
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csrow2 | DIMM_A1 | DIMM_B1 |
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csrow3 | DIMM_A1 | DIMM_B1 |
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===================================
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In the above example table there are 4 physical slots on the motherboard
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for memory DIMMs:
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DIMM_A0
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DIMM_B0
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DIMM_A1
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DIMM_B1
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Labels for these slots are usually silk screened on the motherboard. Slots
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labeled 'A' are channel 0 in this example. Slots labeled 'B'
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are channel 1. Notice that there are two csrows possible on a
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physical DIMM. These csrows are allocated their csrow assignment
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based on the slot into which the memory DIMM is placed. Thus, when 1 DIMM
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is placed in each Channel, the csrows cross both DIMMs.
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Memory DIMMs come single or dual "ranked". A rank is a populated csrow.
|
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Thus, 2 single ranked DIMMs, placed in slots DIMM_A0 and DIMM_B0 above
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will have 1 csrow, csrow0. csrow1 will be empty. On the other hand,
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when 2 dual ranked DIMMs are similarly placed, then both csrow0 and
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csrow1 will be populated. The pattern repeats itself for csrow2 and
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csrow3.
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The representation of the above is reflected in the directory tree
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in EDAC's sysfs interface. Starting in directory
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/sys/devices/system/edac/mc each memory controller will be represented
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by its own 'mcX' directory, where 'X" is the index of the MC.
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..../edac/mc/
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|
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|->mc0
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|->mc1
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|->mc2
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....
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Under each 'mcX' directory each 'csrowX' is again represented by a
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'csrowX', where 'X" is the csrow index:
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.../mc/mc0/
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|
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|->csrow0
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|->csrow2
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|->csrow3
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....
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Notice that there is no csrow1, which indicates that csrow0 is
|
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composed of a single ranked DIMMs. This should also apply in both
|
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Channels, in order to have dual-channel mode be operational. Since
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both csrow2 and csrow3 are populated, this indicates a dual ranked
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set of DIMMs for channels 0 and 1.
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Within each of the 'mc','mcX' and 'csrowX' directories are several
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EDAC control and attribute files.
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============================================================================
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DIRECTORY 'mc'
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In directory 'mc' are EDAC system overall control and attribute files:
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Panic on UE control file:
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'panic_on_ue'
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An uncorrectable error will cause a machine panic. This is usually
|
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desirable. It is a bad idea to continue when an uncorrectable error
|
||||
occurs - it is indeterminate what was uncorrected and the operating
|
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system context might be so mangled that continuing will lead to further
|
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corruption. If the kernel has MCE configured, then EDAC will never
|
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notice the UE.
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LOAD TIME: module/kernel parameter: panic_on_ue=[0|1]
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RUN TIME: echo "1" >/sys/devices/system/edac/mc/panic_on_ue
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Log UE control file:
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'log_ue'
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Generate kernel messages describing uncorrectable errors. These errors
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are reported through the system message log system. UE statistics
|
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will be accumulated even when UE logging is disabled.
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LOAD TIME: module/kernel parameter: log_ue=[0|1]
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RUN TIME: echo "1" >/sys/devices/system/edac/mc/log_ue
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Log CE control file:
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'log_ce'
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Generate kernel messages describing correctable errors. These
|
||||
errors are reported through the system message log system.
|
||||
CE statistics will be accumulated even when CE logging is disabled.
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LOAD TIME: module/kernel parameter: log_ce=[0|1]
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RUN TIME: echo "1" >/sys/devices/system/edac/mc/log_ce
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Polling period control file:
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'poll_msec'
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The time period, in milliseconds, for polling for error information.
|
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Too small a value wastes resources. Too large a value might delay
|
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necessary handling of errors and might loose valuable information for
|
||||
locating the error. 1000 milliseconds (once each second) is the current
|
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default. Systems which require all the bandwidth they can get, may
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increase this.
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LOAD TIME: module/kernel parameter: poll_msec=[0|1]
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RUN TIME: echo "1000" >/sys/devices/system/edac/mc/poll_msec
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============================================================================
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'mcX' DIRECTORIES
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In 'mcX' directories are EDAC control and attribute files for
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this 'X" instance of the memory controllers:
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Counter reset control file:
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'reset_counters'
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||||
This write-only control file will zero all the statistical counters
|
||||
for UE and CE errors. Zeroing the counters will also reset the timer
|
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indicating how long since the last counter zero. This is useful
|
||||
for computing errors/time. Since the counters are always reset at
|
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driver initialization time, no module/kernel parameter is available.
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RUN TIME: echo "anything" >/sys/devices/system/edac/mc/mc0/counter_reset
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This resets the counters on memory controller 0
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Seconds since last counter reset control file:
|
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'seconds_since_reset'
|
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This attribute file displays how many seconds have elapsed since the
|
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last counter reset. This can be used with the error counters to
|
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measure error rates.
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Memory Controller name attribute file:
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'mc_name'
|
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This attribute file displays the type of memory controller
|
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that is being utilized.
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Total memory managed by this memory controller attribute file:
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'size_mb'
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This attribute file displays, in count of megabytes, of memory
|
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that this instance of memory controller manages.
|
||||
|
||||
|
||||
Total Uncorrectable Errors count attribute file:
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||||
|
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'ue_count'
|
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|
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This attribute file displays the total count of uncorrectable
|
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errors that have occurred on this memory controller. If panic_on_ue
|
||||
is set this counter will not have a chance to increment,
|
||||
since EDAC will panic the system.
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|
||||
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Total UE count that had no information attribute fileY:
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|
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'ue_noinfo_count'
|
||||
|
||||
This attribute file displays the number of UEs that
|
||||
have occurred have occurred with no informations as to which DIMM
|
||||
slot is having errors.
|
||||
|
||||
|
||||
Total Correctable Errors count attribute file:
|
||||
|
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'ce_count'
|
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|
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This attribute file displays the total count of correctable
|
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errors that have occurred on this memory controller. This
|
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count is very important to examine. CEs provide early
|
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indications that a DIMM is beginning to fail. This count
|
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field should be monitored for non-zero values and report
|
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such information to the system administrator.
|
||||
|
||||
|
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Total Correctable Errors count attribute file:
|
||||
|
||||
'ce_noinfo_count'
|
||||
|
||||
This attribute file displays the number of CEs that
|
||||
have occurred wherewith no informations as to which DIMM slot
|
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is having errors. Memory is handicapped, but operational,
|
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yet no information is available to indicate which slot
|
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the failing memory is in. This count field should be also
|
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be monitored for non-zero values.
|
||||
|
||||
Device Symlink:
|
||||
|
||||
'device'
|
||||
|
||||
Symlink to the memory controller device.
|
||||
|
||||
Sdram memory scrubbing rate:
|
||||
|
||||
'sdram_scrub_rate'
|
||||
|
||||
Read/Write attribute file that controls memory scrubbing. The scrubbing
|
||||
rate is set by writing a minimum bandwith in bytes/sec to the attribute
|
||||
file. The rate will be translated to an internal value that gives at
|
||||
least the specified rate.
|
||||
|
||||
Reading the file will return the actual scrubbing rate employed.
|
||||
|
||||
If configuration fails or memory scrubbing is not implemented, the value
|
||||
of the attribute file will be -1.
|
||||
|
||||
|
||||
|
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============================================================================
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'csrowX' DIRECTORIES
|
||||
|
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In the 'csrowX' directories are EDAC control and attribute files for
|
||||
this 'X" instance of csrow:
|
||||
|
||||
|
||||
Total Uncorrectable Errors count attribute file:
|
||||
|
||||
'ue_count'
|
||||
|
||||
This attribute file displays the total count of uncorrectable
|
||||
errors that have occurred on this csrow. If panic_on_ue is set
|
||||
this counter will not have a chance to increment, since EDAC
|
||||
will panic the system.
|
||||
|
||||
|
||||
Total Correctable Errors count attribute file:
|
||||
|
||||
'ce_count'
|
||||
|
||||
This attribute file displays the total count of correctable
|
||||
errors that have occurred on this csrow. This
|
||||
count is very important to examine. CEs provide early
|
||||
indications that a DIMM is beginning to fail. This count
|
||||
field should be monitored for non-zero values and report
|
||||
such information to the system administrator.
|
||||
|
||||
|
||||
Total memory managed by this csrow attribute file:
|
||||
|
||||
'size_mb'
|
||||
|
||||
This attribute file displays, in count of megabytes, of memory
|
||||
that this csrow contains.
|
||||
|
||||
|
||||
Memory Type attribute file:
|
||||
|
||||
'mem_type'
|
||||
|
||||
This attribute file will display what type of memory is currently
|
||||
on this csrow. Normally, either buffered or unbuffered memory.
|
||||
Examples:
|
||||
Registered-DDR
|
||||
Unbuffered-DDR
|
||||
|
||||
|
||||
EDAC Mode of operation attribute file:
|
||||
|
||||
'edac_mode'
|
||||
|
||||
This attribute file will display what type of Error detection
|
||||
and correction is being utilized.
|
||||
|
||||
|
||||
Device type attribute file:
|
||||
|
||||
'dev_type'
|
||||
|
||||
This attribute file will display what type of DRAM device is
|
||||
being utilized on this DIMM.
|
||||
Examples:
|
||||
x1
|
||||
x2
|
||||
x4
|
||||
x8
|
||||
|
||||
|
||||
Channel 0 CE Count attribute file:
|
||||
|
||||
'ch0_ce_count'
|
||||
|
||||
This attribute file will display the count of CEs on this
|
||||
DIMM located in channel 0.
|
||||
|
||||
|
||||
Channel 0 UE Count attribute file:
|
||||
|
||||
'ch0_ue_count'
|
||||
|
||||
This attribute file will display the count of UEs on this
|
||||
DIMM located in channel 0.
|
||||
|
||||
|
||||
Channel 0 DIMM Label control file:
|
||||
|
||||
'ch0_dimm_label'
|
||||
|
||||
This control file allows this DIMM to have a label assigned
|
||||
to it. With this label in the module, when errors occur
|
||||
the output can provide the DIMM label in the system log.
|
||||
This becomes vital for panic events to isolate the
|
||||
cause of the UE event.
|
||||
|
||||
DIMM Labels must be assigned after booting, with information
|
||||
that correctly identifies the physical slot with its
|
||||
silk screen label. This information is currently very
|
||||
motherboard specific and determination of this information
|
||||
must occur in userland at this time.
|
||||
|
||||
|
||||
Channel 1 CE Count attribute file:
|
||||
|
||||
'ch1_ce_count'
|
||||
|
||||
This attribute file will display the count of CEs on this
|
||||
DIMM located in channel 1.
|
||||
|
||||
|
||||
Channel 1 UE Count attribute file:
|
||||
|
||||
'ch1_ue_count'
|
||||
|
||||
This attribute file will display the count of UEs on this
|
||||
DIMM located in channel 0.
|
||||
|
||||
|
||||
Channel 1 DIMM Label control file:
|
||||
|
||||
'ch1_dimm_label'
|
||||
|
||||
This control file allows this DIMM to have a label assigned
|
||||
to it. With this label in the module, when errors occur
|
||||
the output can provide the DIMM label in the system log.
|
||||
This becomes vital for panic events to isolate the
|
||||
cause of the UE event.
|
||||
|
||||
DIMM Labels must be assigned after booting, with information
|
||||
that correctly identifies the physical slot with its
|
||||
silk screen label. This information is currently very
|
||||
motherboard specific and determination of this information
|
||||
must occur in userland at this time.
|
||||
|
||||
|
||||
============================================================================
|
||||
SYSTEM LOGGING
|
||||
|
||||
If logging for UEs and CEs are enabled then system logs will have
|
||||
error notices indicating errors that have been detected:
|
||||
|
||||
EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0,
|
||||
channel 1 "DIMM_B1": amd76x_edac
|
||||
|
||||
EDAC MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0,
|
||||
channel 1 "DIMM_B1": amd76x_edac
|
||||
|
||||
|
||||
The structure of the message is:
|
||||
the memory controller (MC0)
|
||||
Error type (CE)
|
||||
memory page (0x283)
|
||||
offset in the page (0xce0)
|
||||
the byte granularity (grain 8)
|
||||
or resolution of the error
|
||||
the error syndrome (0xb741)
|
||||
memory row (row 0)
|
||||
memory channel (channel 1)
|
||||
DIMM label, if set prior (DIMM B1
|
||||
and then an optional, driver-specific message that may
|
||||
have additional information.
|
||||
|
||||
Both UEs and CEs with no info will lack all but memory controller,
|
||||
error type, a notice of "no info" and then an optional,
|
||||
driver-specific error message.
|
||||
|
||||
|
||||
|
||||
============================================================================
|
||||
PCI Bus Parity Detection
|
||||
|
||||
|
||||
On Header Type 00 devices the primary status is looked at
|
||||
for any parity error regardless of whether Parity is enabled on the
|
||||
device. (The spec indicates parity is generated in some cases).
|
||||
On Header Type 01 bridges, the secondary status register is also
|
||||
looked at to see if parity occurred on the bus on the other side of
|
||||
the bridge.
|
||||
|
||||
|
||||
SYSFS CONFIGURATION
|
||||
|
||||
Under /sys/devices/system/edac/pci are control and attribute files as follows:
|
||||
|
||||
|
||||
Enable/Disable PCI Parity checking control file:
|
||||
|
||||
'check_pci_parity'
|
||||
|
||||
|
||||
This control file enables or disables the PCI Bus Parity scanning
|
||||
operation. Writing a 1 to this file enables the scanning. Writing
|
||||
a 0 to this file disables the scanning.
|
||||
|
||||
Enable:
|
||||
echo "1" >/sys/devices/system/edac/pci/check_pci_parity
|
||||
|
||||
Disable:
|
||||
echo "0" >/sys/devices/system/edac/pci/check_pci_parity
|
||||
|
||||
|
||||
|
||||
Panic on PCI PARITY Error:
|
||||
|
||||
'panic_on_pci_parity'
|
||||
|
||||
|
||||
This control files enables or disables panicking when a parity
|
||||
error has been detected.
|
||||
|
||||
|
||||
module/kernel parameter: panic_on_pci_parity=[0|1]
|
||||
|
||||
Enable:
|
||||
echo "1" >/sys/devices/system/edac/pci/panic_on_pci_parity
|
||||
|
||||
Disable:
|
||||
echo "0" >/sys/devices/system/edac/pci/panic_on_pci_parity
|
||||
|
||||
|
||||
Parity Count:
|
||||
|
||||
'pci_parity_count'
|
||||
|
||||
This attribute file will display the number of parity errors that
|
||||
have been detected.
|
||||
|
||||
|
||||
|
||||
=======================================================================
|
||||
Reference in New Issue
Block a user