1769 lines
50 KiB
C
1769 lines
50 KiB
C
/* linux/arch/arm/plat-s3c24xx/pm.c
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*
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* Copyright (c) 2004,2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24XX Power Manager (Suspend-To-RAM) support
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*
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* See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Parts based on arch/arm/mach-pxa/pm.c
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*
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* Thanks to Dimitry Andric for debugging
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*/
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#include <linux/init.h>
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#include <linux/suspend.h>
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#include <linux/errno.h>
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#include <linux/time.h>
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#include <linux/interrupt.h>
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#include <linux/crc32.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/serial_core.h>
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#include <asm/cacheflush.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/arch/regs-serial.h>
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#if defined (CONFIG_CPU_S3C6400)
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#include <asm/arch/regs-s3c6400-clock.h>
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#elif defined (CONFIG_CPU_S3C6410)
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#include <asm/arch/regs-s3c6410-clock.h>
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#elif defined (CONFIG_CPU_S3C2450)
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#include <asm/arch/regs-s3c2450-clock.h>
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#elif defined (CONFIG_CPU_S3C2416)
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#include <asm/arch/regs-s3c2416-clock.h>
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#else
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#include <asm/arch/regs-clock.h>
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#endif
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-gpioj.h>
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#include <asm/arch/regs-dsc.h>
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#include <asm/arch/regs-mem.h>
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#include <asm/arch/regs-irq.h>
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#include <asm/arch/regs-adc.h>
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#include <asm/mach/time.h>
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#include <asm/plat-s3c24xx/pm.h>
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#include <asm/mach/irq.h>
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//#include <asm/arch/irqs.h>
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//#include <asm/plat-s3c24xx/irq.h>
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/* Qisda, ShiYong Lin, 2009/08/18, Wake up source {*/
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#define SYSTEM_OFF_STATE 0
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#define SYSTEM_SLEEP_STATE 1
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extern unsigned int wkup_srce;
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/* Qisda, ShiYong Lin, 2009/11/02, Set En1 and En2 based on charging source {*/
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extern int charging_source;
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/* } Qisda, ShiYong Lin, 2009/11/02, Set En1 and En2 based on charging source */
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#ifdef CONFIG_PM_CPU_MODE
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extern unsigned char pm_cpu_mode;
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#endif
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/* } Qisda, ShiYong Lin, 2009/08/18, Wake up source */
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/* for external use */
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unsigned long s3c_pm_flags;
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#define PFX "s3c24xx-pm: "
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static struct sleep_save core_save[] = {
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#if defined (CONFIG_CPU_S3C6400) || defined (CONFIG_CPU_S3C6410)
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SAVE_ITEM(S3C_SDMA_SEL),
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#elif defined (CONFIG_CPU_S3C2450) || defined (CONFIG_CPU_S3C2416)
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SAVE_ITEM(S3C2443_LOCKCON0),
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SAVE_ITEM(S3C2443_LOCKCON1),
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SAVE_ITEM(S3C2443_OSCSET ),
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SAVE_ITEM(S3C2443_MPLLCON),
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SAVE_ITEM(S3C2443_EPLLCON),
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SAVE_ITEM(S3C2450_EPLLCON_K),
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SAVE_ITEM(S3C2443_CLKSRC ),
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SAVE_ITEM(S3C2443_CLKDIV0),
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SAVE_ITEM(S3C2443_CLKDIV1),
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SAVE_ITEM(S3C2443_CLKDIV2),
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SAVE_ITEM(S3C2443_HCLKCON),
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SAVE_ITEM(S3C2443_PCLKCON),
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SAVE_ITEM(S3C2443_SCLKCON),
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#else
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SAVE_ITEM(S3C2410_LOCKTIME),
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SAVE_ITEM(S3C2410_CLKCON),
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/* we restore the timings here, with the proviso that the board
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* brings the system up in an slower, or equal frequency setting
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* to the original system.
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*
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* if we cannot guarantee this, then things are going to go very
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* wrong here, as we modify the refresh and both pll settings.
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*/
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SAVE_ITEM(S3C2410_BWSCON),
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SAVE_ITEM(S3C2410_BANKCON0),
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SAVE_ITEM(S3C2410_BANKCON1),
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SAVE_ITEM(S3C2410_BANKCON2),
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SAVE_ITEM(S3C2410_BANKCON3),
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SAVE_ITEM(S3C2410_BANKCON4),
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SAVE_ITEM(S3C2410_BANKCON5),
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SAVE_ITEM(S3C2410_CLKDIVN),
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SAVE_ITEM(S3C2410_MPLLCON),
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SAVE_ITEM(S3C2410_UPLLCON),
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SAVE_ITEM(S3C2410_CLKSLOW),
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SAVE_ITEM(S3C2410_REFRESH),
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#endif
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};
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static struct sleep_save gpio_save[] = {
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#if defined (CONFIG_CPU_S3C6400) || defined (CONFIG_CPU_S3C6410)
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SAVE_ITEM(S3C_GPACON),
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SAVE_ITEM(S3C_GPADAT),
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SAVE_ITEM(S3C_GPAPU),
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SAVE_ITEM(S3C_GPBCON),
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SAVE_ITEM(S3C_GPBDAT),
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SAVE_ITEM(S3C_GPBPU),
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SAVE_ITEM(S3C_GPCCON),
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SAVE_ITEM(S3C_GPCDAT),
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SAVE_ITEM(S3C_GPCPU),
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SAVE_ITEM(S3C_GPDCON),
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SAVE_ITEM(S3C_GPDDAT),
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SAVE_ITEM(S3C_GPDPU),
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SAVE_ITEM(S3C_GPECON),
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SAVE_ITEM(S3C_GPEDAT),
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SAVE_ITEM(S3C_GPEPU),
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SAVE_ITEM(S3C_GPFCON),
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SAVE_ITEM(S3C_GPFDAT),
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SAVE_ITEM(S3C_GPFPU),
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SAVE_ITEM(S3C_GPGCON),
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SAVE_ITEM(S3C_GPGDAT),
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SAVE_ITEM(S3C_GPGPU),
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SAVE_ITEM(S3C_GPH0CON),
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SAVE_ITEM(S3C_GPH1CON),
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SAVE_ITEM(S3C_GPHDAT),
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SAVE_ITEM(S3C_GPHPU),
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SAVE_ITEM(S3C_GPICON),
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SAVE_ITEM(S3C_GPIDAT),
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SAVE_ITEM(S3C_GPIPU),
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SAVE_ITEM(S3C_GPJCON),
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SAVE_ITEM(S3C_GPJDAT),
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SAVE_ITEM(S3C_GPJPU),
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SAVE_ITEM(S3C_GPK0CON),
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SAVE_ITEM(S3C_GPK1CON),
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SAVE_ITEM(S3C_GPKDAT),
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SAVE_ITEM(S3C_GPKPU),
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SAVE_ITEM(S3C_GPL0CON),
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SAVE_ITEM(S3C_GPL1CON),
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SAVE_ITEM(S3C_GPLDAT),
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SAVE_ITEM(S3C_GPLPU),
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SAVE_ITEM(S3C_GPMCON),
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SAVE_ITEM(S3C_GPMDAT),
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SAVE_ITEM(S3C_GPMPU),
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SAVE_ITEM(S3C_GPNCON),
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SAVE_ITEM(S3C_GPNDAT),
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SAVE_ITEM(S3C_GPNPU),
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SAVE_ITEM(S3C_GPOCON),
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SAVE_ITEM(S3C_GPODAT),
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SAVE_ITEM(S3C_GPOPU),
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SAVE_ITEM(S3C_GPPCON),
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SAVE_ITEM(S3C_GPPDAT),
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SAVE_ITEM(S3C_GPPPU),
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SAVE_ITEM(S3C_GPQCON),
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SAVE_ITEM(S3C_GPQDAT),
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SAVE_ITEM(S3C_GPQPU),
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SAVE_ITEM(S3C_PRIORITY),
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/* Special register*/
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SAVE_ITEM(S3C_SPCON),
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/* Memory port control */
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SAVE_ITEM(S3C_MEM0CONSTOP),
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SAVE_ITEM(S3C_MEM1CONSTOP),
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SAVE_ITEM(S3C_MEM0CONSLP0),
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SAVE_ITEM(S3C_MEM0CONSLP1),
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SAVE_ITEM(S3C_MEM1CONSLP),
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SAVE_ITEM(S3C_MEM0DRVCON),
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SAVE_ITEM(S3C_MEM1DRVCON),
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#elif defined (CONFIG_CPU_S3C2450) || defined (CONFIG_CPU_S3C2416)
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SAVE_ITEM(S3C2410_GPACON),
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SAVE_ITEM(S3C2410_GPADAT),
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SAVE_ITEM(S3C2410_GPBCON),
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SAVE_ITEM(S3C2410_GPBDAT),
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SAVE_ITEM(S3C2410_GPBUP),
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SAVE_ITEM(S3C2410_GPCCON),
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SAVE_ITEM(S3C2410_GPCDAT),
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SAVE_ITEM(S3C2410_GPCUP),
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SAVE_ITEM(S3C2410_GPDCON),
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SAVE_ITEM(S3C2410_GPDDAT),
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SAVE_ITEM(S3C2410_GPDUP),
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SAVE_ITEM(S3C2410_GPECON),
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SAVE_ITEM(S3C2410_GPEDAT),
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SAVE_ITEM(S3C2410_GPEUP),
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SAVE_ITEM(S3C2410_GPFCON),
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SAVE_ITEM(S3C2410_GPFDAT),
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SAVE_ITEM(S3C2410_GPFUP),
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SAVE_ITEM(S3C2410_GPGCON),
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SAVE_ITEM(S3C2410_GPGDAT),
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SAVE_ITEM(S3C2410_GPGUP),
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SAVE_ITEM(S3C2410_GPHCON),
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SAVE_ITEM(S3C2410_GPHDAT),
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SAVE_ITEM(S3C2410_GPHUP),
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SAVE_ITEM(S3C2440_GPJCON),
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SAVE_ITEM(S3C2440_GPJDAT),
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SAVE_ITEM(S3C2440_GPJUP),
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/*Qisda, Hiko: unmark these settings, 'cause mmc driver has solved the suspend/resume issue {*/
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//Qisda, Asaku Chen, 2009/07/22, Saving GPK data lets system not sleep?
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SAVE_ITEM(S3C2416_GPKDAT),
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SAVE_ITEM(S3C2416_GPKCON),
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SAVE_ITEM(S3C2416_GPKUDP),
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/*Qisda, Hiko: unmark these settings, 'cause mmc driver has solved the suspend/resume issue }*/
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SAVE_ITEM(S3C2443_GPLCON),
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SAVE_ITEM(S3C2443_GPLDAT),
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SAVE_ITEM(S3C2443_GPLUDP),
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SAVE_ITEM(S3C2410_MISCCR),
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SAVE_ITEM(S3C2410_DCLKCON),
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SAVE_ITEM(S3C2410_EXTINT0),
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SAVE_ITEM(S3C2410_EXTINT1),
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SAVE_ITEM(S3C2410_EXTINT2),
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SAVE_ITEM(S3C2410_EINFLT0),
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SAVE_ITEM(S3C2410_EINFLT1),
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SAVE_ITEM(S3C2410_EINFLT2),
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SAVE_ITEM(S3C2410_EINFLT3),
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SAVE_ITEM(S3C2450_DSC0),
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SAVE_ITEM(S3C2450_DSC1),
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SAVE_ITEM(S3C2450_DSC2),
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SAVE_ITEM(S3C2450_DSC3),
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#else
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SAVE_ITEM(S3C2410_GPACON),
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SAVE_ITEM(S3C2410_GPADAT),
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SAVE_ITEM(S3C2410_GPBCON),
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SAVE_ITEM(S3C2410_GPBDAT),
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SAVE_ITEM(S3C2410_GPBUP),
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SAVE_ITEM(S3C2410_GPCCON),
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SAVE_ITEM(S3C2410_GPCDAT),
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SAVE_ITEM(S3C2410_GPCUP),
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SAVE_ITEM(S3C2410_GPDCON),
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SAVE_ITEM(S3C2410_GPDDAT),
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SAVE_ITEM(S3C2410_GPDUP),
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SAVE_ITEM(S3C2410_GPECON),
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SAVE_ITEM(S3C2410_GPEDAT),
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SAVE_ITEM(S3C2410_GPEUP),
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SAVE_ITEM(S3C2410_GPFCON),
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SAVE_ITEM(S3C2410_GPFDAT),
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SAVE_ITEM(S3C2410_GPFUP),
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SAVE_ITEM(S3C2410_GPGCON),
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SAVE_ITEM(S3C2410_GPGDAT),
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SAVE_ITEM(S3C2410_GPGUP),
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SAVE_ITEM(S3C2410_GPHCON),
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SAVE_ITEM(S3C2410_GPHDAT),
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SAVE_ITEM(S3C2410_GPHUP),
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SAVE_ITEM(S3C2410_DCLKCON),
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#endif
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};
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#if defined (CONFIG_CPU_S3C6400) || defined (CONFIG_CPU_S3C6410)
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/* this lot should be really saved by the IRQ code */
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/* VICXADDRESSXX initilaization to be needed */
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static struct sleep_save irq_save[] = {
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SAVE_ITEM(S3C_VIC0INTSELECT),
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SAVE_ITEM(S3C_VIC1INTSELECT),
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SAVE_ITEM(S3C_VIC0INTENABLE),
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SAVE_ITEM(S3C_VIC1INTENABLE),
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SAVE_ITEM(S3C_VIC0SOFTINT),
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SAVE_ITEM(S3C_VIC1SOFTINT),
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};
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static struct sleep_save sromc_save[] = {
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SAVE_ITEM(S3C_SROM_BW),
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SAVE_ITEM(S3C_SROM_BC0),
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SAVE_ITEM(S3C_SROM_BC1),
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SAVE_ITEM(S3C_SROM_BC2),
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SAVE_ITEM(S3C_SROM_BC3),
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SAVE_ITEM(S3C_SROM_BC4),
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SAVE_ITEM(S3C_SROM_BC5),
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};
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#if 0
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#define SAVE_UART(va) \
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SAVE_ITEM((va) + S3C_ULCON), \
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SAVE_ITEM((va) + S3C_UCON), \
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SAVE_ITEM((va) + S3C_UFCON), \
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SAVE_ITEM((va) + S3C_UMCON), \
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SAVE_ITEM((va) + S3C_UBRDIV), \
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SAVE_ITEM((va) + S3C_UDIVSLOT), \
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SAVE_ITEM((va) + S3C_UINTMSK)
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static struct sleep_save uart_save[] = {
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SAVE_UART(S3C24XX_VA_UART0),
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SAVE_UART(S3C24XX_VA_UART1),
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SAVE_UART(S3C24XX_VA_UART2),
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SAVE_UART(S3C24XX_VA_UART3),
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};
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#endif
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#elif defined (CONFIG_CPU_S3C2450) || defined (CONFIG_CPU_S3C2416)
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static struct sleep_save irq_save[] = {
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SAVE_ITEM(S3C2410_EINTMASK),
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SAVE_ITEM(S3C2410_INTMSK),
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SAVE_ITEM(S3C2450_INTMSK),
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SAVE_ITEM(S3C2410_INTSUBMSK),
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};
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static struct sleep_save smc_save[] = {
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SAVE_ITEM(S3C_SSMC_SMBIDCYR1),
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SAVE_ITEM(S3C_SSMC_SMBIDCYR4),
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SAVE_ITEM(S3C_SSMC_SMBWSTRDR1),
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SAVE_ITEM(S3C_SSMC_SMBWSTRDR4),
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SAVE_ITEM(S3C_SSMC_SMBWSTWRR1),
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SAVE_ITEM(S3C_SSMC_SMBWSTWRR4),
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SAVE_ITEM(S3C_SSMC_SMBWSTOENR1),
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SAVE_ITEM(S3C_SSMC_SMBWSTOENR4),
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SAVE_ITEM(S3C_SSMC_SMBWSTWENR1),
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SAVE_ITEM(S3C_SSMC_SMBWSTWENR4),
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SAVE_ITEM(S3C_SSMC_SMBCR1),
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SAVE_ITEM(S3C_SSMC_SMBCR4),
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SAVE_ITEM(S3C_BANK_CFG),
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};
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#endif
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#ifdef CONFIG_S3C2410_PM_DEBUG
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#define SAVE_UART(va) \
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SAVE_ITEM((va) + S3C2410_ULCON), \
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SAVE_ITEM((va) + S3C2410_UCON), \
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SAVE_ITEM((va) + S3C2410_UFCON), \
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SAVE_ITEM((va) + S3C2410_UMCON), \
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SAVE_ITEM((va) + S3C2410_UBRDIV)
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static struct sleep_save uart_save[] = {
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SAVE_UART(S3C24XX_VA_UART0),
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SAVE_UART(S3C24XX_VA_UART1),
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#ifndef CONFIG_CPU_S3C2400
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SAVE_UART(S3C24XX_VA_UART2),
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#endif
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};
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/* debug
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*
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* we send the debug to printascii() to allow it to be seen if the
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* system never wakes up from the sleep
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*/
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extern void printascii(const char *);
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void pm_dbg(const char *fmt, ...)
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{
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va_list va;
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char buff[256];
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va_start(va, fmt);
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vsprintf(buff, fmt, va);
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va_end(va);
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printascii(buff);
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}
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static void s3c2410_pm_debug_init(void)
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{
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unsigned long tmp = __raw_readl(S3C2410_CLKCON);
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/* re-start uart clocks */
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tmp |= S3C2410_CLKCON_UART0;
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tmp |= S3C2410_CLKCON_UART1;
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tmp |= S3C2410_CLKCON_UART2;
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__raw_writel(tmp, S3C2410_CLKCON);
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udelay(10);
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}
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#define DBG(fmt...) pm_dbg(fmt)
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#else
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#define DBG(fmt...)
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#define s3c2410_pm_debug_init() do { } while(0)
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|
static struct sleep_save uart_save[] = {};
|
|
#endif
|
|
|
|
#if defined(CONFIG_S3C2410_PM_CHECK) && CONFIG_S3C2410_PM_CHECK_CHUNKSIZE != 0
|
|
|
|
/* suspend checking code...
|
|
*
|
|
* this next area does a set of crc checks over all the installed
|
|
* memory, so the system can verify if the resume was ok.
|
|
*
|
|
* CONFIG_S3C2410_PM_CHECK_CHUNKSIZE defines the block-size for the CRC,
|
|
* increasing it will mean that the area corrupted will be less easy to spot,
|
|
* and reducing the size will cause the CRC save area to grow
|
|
*/
|
|
|
|
#define CHECK_CHUNKSIZE (CONFIG_S3C2410_PM_CHECK_CHUNKSIZE * 1024)
|
|
|
|
static u32 crc_size; /* size needed for the crc block */
|
|
static u32 *crcs; /* allocated over suspend/resume */
|
|
|
|
typedef u32 *(run_fn_t)(struct resource *ptr, u32 *arg);
|
|
|
|
/* s3c2410_pm_run_res
|
|
*
|
|
* go thorugh the given resource list, and look for system ram
|
|
*/
|
|
|
|
static void s3c2410_pm_run_res(struct resource *ptr, run_fn_t fn, u32 *arg)
|
|
{
|
|
while (ptr != NULL) {
|
|
if (ptr->child != NULL)
|
|
s3c2410_pm_run_res(ptr->child, fn, arg);
|
|
|
|
if ((ptr->flags & IORESOURCE_MEM) &&
|
|
strcmp(ptr->name, "System RAM") == 0) {
|
|
DBG("Found system RAM at %08lx..%08lx\n",
|
|
ptr->start, ptr->end);
|
|
arg = (fn)(ptr, arg);
|
|
}
|
|
|
|
ptr = ptr->sibling;
|
|
}
|
|
}
|
|
|
|
static void s3c2410_pm_run_sysram(run_fn_t fn, u32 *arg)
|
|
{
|
|
s3c2410_pm_run_res(&iomem_resource, fn, arg);
|
|
}
|
|
|
|
static u32 *s3c2410_pm_countram(struct resource *res, u32 *val)
|
|
{
|
|
u32 size = (u32)(res->end - res->start)+1;
|
|
|
|
size += CHECK_CHUNKSIZE-1;
|
|
size /= CHECK_CHUNKSIZE;
|
|
|
|
DBG("Area %08lx..%08lx, %d blocks\n", res->start, res->end, size);
|
|
|
|
*val += size * sizeof(u32);
|
|
return val;
|
|
}
|
|
|
|
/* s3c2410_pm_prepare_check
|
|
*
|
|
* prepare the necessary information for creating the CRCs. This
|
|
* must be done before the final save, as it will require memory
|
|
* allocating, and thus touching bits of the kernel we do not
|
|
* know about.
|
|
*/
|
|
|
|
static void s3c2410_pm_check_prepare(void)
|
|
{
|
|
crc_size = 0;
|
|
|
|
s3c2410_pm_run_sysram(s3c2410_pm_countram, &crc_size);
|
|
|
|
DBG("s3c2410_pm_prepare_check: %u checks needed\n", crc_size);
|
|
|
|
crcs = kmalloc(crc_size+4, GFP_KERNEL);
|
|
if (crcs == NULL)
|
|
printk(KERN_ERR "Cannot allocated CRC save area\n");
|
|
}
|
|
|
|
static u32 *s3c2410_pm_makecheck(struct resource *res, u32 *val)
|
|
{
|
|
unsigned long addr, left;
|
|
|
|
for (addr = res->start; addr < res->end;
|
|
addr += CHECK_CHUNKSIZE) {
|
|
left = res->end - addr;
|
|
|
|
if (left > CHECK_CHUNKSIZE)
|
|
left = CHECK_CHUNKSIZE;
|
|
|
|
*val = crc32_le(~0, phys_to_virt(addr), left);
|
|
val++;
|
|
}
|
|
|
|
return val;
|
|
}
|
|
|
|
/* s3c2410_pm_check_store
|
|
*
|
|
* compute the CRC values for the memory blocks before the final
|
|
* sleep.
|
|
*/
|
|
|
|
static void s3c2410_pm_check_store(void)
|
|
{
|
|
if (crcs != NULL)
|
|
s3c2410_pm_run_sysram(s3c2410_pm_makecheck, crcs);
|
|
}
|
|
|
|
/* in_region
|
|
*
|
|
* return TRUE if the area defined by ptr..ptr+size contatins the
|
|
* what..what+whatsz
|
|
*/
|
|
|
|
static inline int in_region(void *ptr, int size, void *what, size_t whatsz)
|
|
{
|
|
if ((what+whatsz) < ptr)
|
|
return 0;
|
|
|
|
if (what > (ptr+size))
|
|
return 0;
|
|
|
|
return 1;
|
|
}
|
|
|
|
static u32 *s3c2410_pm_runcheck(struct resource *res, u32 *val)
|
|
{
|
|
void *save_at = phys_to_virt(s3c2410_sleep_save_phys);
|
|
unsigned long addr;
|
|
unsigned long left;
|
|
void *ptr;
|
|
u32 calc;
|
|
|
|
for (addr = res->start; addr < res->end;
|
|
addr += CHECK_CHUNKSIZE) {
|
|
left = res->end - addr;
|
|
|
|
if (left > CHECK_CHUNKSIZE)
|
|
left = CHECK_CHUNKSIZE;
|
|
|
|
ptr = phys_to_virt(addr);
|
|
|
|
if (in_region(ptr, left, crcs, crc_size)) {
|
|
DBG("skipping %08lx, has crc block in\n", addr);
|
|
goto skip_check;
|
|
}
|
|
|
|
if (in_region(ptr, left, save_at, 32*4 )) {
|
|
DBG("skipping %08lx, has save block in\n", addr);
|
|
goto skip_check;
|
|
}
|
|
|
|
/* calculate and check the checksum */
|
|
|
|
calc = crc32_le(~0, ptr, left);
|
|
if (calc != *val) {
|
|
printk(KERN_ERR PFX "Restore CRC error at "
|
|
"%08lx (%08x vs %08x)\n", addr, calc, *val);
|
|
|
|
DBG("Restore CRC error at %08lx (%08x vs %08x)\n",
|
|
addr, calc, *val);
|
|
}
|
|
|
|
skip_check:
|
|
val++;
|
|
}
|
|
|
|
return val;
|
|
}
|
|
|
|
/* s3c2410_pm_check_restore
|
|
*
|
|
* check the CRCs after the restore event and free the memory used
|
|
* to hold them
|
|
*/
|
|
|
|
static void s3c2410_pm_check_restore(void)
|
|
{
|
|
if (crcs != NULL) {
|
|
s3c2410_pm_run_sysram(s3c2410_pm_runcheck, crcs);
|
|
kfree(crcs);
|
|
crcs = NULL;
|
|
}
|
|
}
|
|
|
|
#else
|
|
|
|
#define s3c2410_pm_check_prepare() do { } while(0)
|
|
#define s3c2410_pm_check_restore() do { } while(0)
|
|
#define s3c2410_pm_check_store() do { } while(0)
|
|
#endif
|
|
|
|
/* helper functions to save and restore register state */
|
|
|
|
void s3c2410_pm_do_save(struct sleep_save *ptr, int count)
|
|
{
|
|
for (; count > 0; count--, ptr++) {
|
|
ptr->val = __raw_readl(ptr->reg);
|
|
//DBG("saved %p value %08lx\n", ptr->reg, ptr->val);
|
|
}
|
|
}
|
|
|
|
/* Qisda, ShiYong Lin, 2009/09/23, Debug message {*/
|
|
#if 0
|
|
void s3c2410_pm_do_print(struct sleep_save *ptr, int count)
|
|
{
|
|
int i = 0;
|
|
for (i = 0;i< count; i++, ptr++) {
|
|
printk("count = %02d, val = 0X%08x\n",i, __raw_readl(ptr->reg));
|
|
}
|
|
}
|
|
#endif
|
|
/* } Qisda, ShiYong Lin, 2009/09/23, Debug message */
|
|
|
|
/* s3c2410_pm_do_restore
|
|
*
|
|
* restore the system from the given list of saved registers
|
|
*
|
|
* Note, we do not use DBG() in here, as the system may not have
|
|
* restore the UARTs state yet
|
|
*/
|
|
|
|
void s3c2410_pm_do_restore(struct sleep_save *ptr, int count)
|
|
{
|
|
for (; count > 0; count--, ptr++) {
|
|
//printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
|
|
//ptr->reg, ptr->val, __raw_readl(ptr->reg));
|
|
|
|
__raw_writel(ptr->val, ptr->reg);
|
|
}
|
|
}
|
|
|
|
/* s3c2410_pm_do_restore_core
|
|
*
|
|
* similar to s3c2410_pm_do_restore_core
|
|
*
|
|
* WARNING: Do not put any debug in here that may effect memory or use
|
|
* peripherals, as things may be changing!
|
|
*/
|
|
|
|
static void s3c2410_pm_do_restore_core(struct sleep_save *ptr, int count)
|
|
{
|
|
for (; count > 0; count--, ptr++) {
|
|
__raw_writel(ptr->val, ptr->reg);
|
|
}
|
|
}
|
|
|
|
/* s3c2410_pm_show_resume_irqs
|
|
*
|
|
* print any IRQs asserted at resume time (ie, we woke from)
|
|
*/
|
|
|
|
static void s3c2410_pm_show_resume_irqs(int start, unsigned long which,
|
|
unsigned long mask)
|
|
{
|
|
int i;
|
|
|
|
which &= ~mask;
|
|
|
|
for (i = 0; i <= 31; i++) {
|
|
if ((which) & (1L<<i)) {
|
|
DBG("IRQ %d asserted at resume\n", start+i);
|
|
}
|
|
}
|
|
}
|
|
|
|
#if !defined (CONFIG_CPU_S3C6400) && !defined (CONFIG_CPU_S3C6410)
|
|
#if !defined(CONFIG_CPU_S3C2450) && !defined(CONFIG_CPU_S3C2416)
|
|
/* s3c2410_pm_check_resume_pin
|
|
*
|
|
* check to see if the pin is configured correctly for sleep mode, and
|
|
* make any necessary adjustments if it is not
|
|
*/
|
|
|
|
static void s3c2410_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)
|
|
{
|
|
unsigned long irqstate;
|
|
unsigned long pinstate;
|
|
int irq = s3c2410_gpio_getirq(pin);
|
|
|
|
if (irqoffs < 4)
|
|
irqstate = s3c_irqwake_intmask & (1L<<irqoffs);
|
|
else
|
|
irqstate = s3c_irqwake_eintmask & (1L<<irqoffs);
|
|
|
|
pinstate = s3c2410_gpio_getcfg(pin);
|
|
|
|
if (!irqstate) {
|
|
if (pinstate == S3C2410_GPIO_IRQ)
|
|
DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin);
|
|
} else {
|
|
if (pinstate == S3C2410_GPIO_IRQ) {
|
|
DBG("Disabling IRQ %d (pin %d)\n", irq, pin);
|
|
s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT);
|
|
}
|
|
}
|
|
|
|
}
|
|
#endif
|
|
/* s3c2410_pm_configure_extint
|
|
*
|
|
* configure all external interrupt pins
|
|
*/
|
|
|
|
/* Qisda, ShiYong Lin, 2009/09/08, Wake up source {*/
|
|
void set_system_off_wkup_srce(void)
|
|
{
|
|
printk("Set_system_off_wkup_srce\n");
|
|
#ifdef CONFIG_QISDA_AS090B00_EVT1
|
|
// Power button, GPF0
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
|
|
s3c2410_gpio_pullup(S3C2410_GPF0, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<3)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<0))|(2<<0)), S3C2410_EXTINT0);
|
|
|
|
// The insertion of SD card, GPF1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF1, 2);
|
|
|
|
// TP_INT, GPF2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF2, 2);
|
|
|
|
// SPI_INT, GPF3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF3, 2);
|
|
|
|
// The insertion of earphone, GPF4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF4, 2);
|
|
|
|
// Touch_EN, GPF5
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 0);
|
|
|
|
// FUNCTION key, GPF6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF6, 2);
|
|
|
|
// Pagedown key, GPF7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF7, 2);
|
|
|
|
#if 0
|
|
// P_KEEP, GPG0, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_EINT8);
|
|
s3c2410_gpio_pullup(S3C2410_GPG0, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<3)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<0))|(2<<0)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// VBUS_IN_STA, GPG1, need to open when EVT2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG1, S3C2410_GPG1_EINT9);
|
|
s3c2410_gpio_pullup(S3C2410_GPG1, 0);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<7)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<4))|(6<<4)), S3C2410_EXTINT1);
|
|
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG2, 0);
|
|
|
|
#if 0
|
|
// Audio_resetn pin, GPG3, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_EINT11);
|
|
s3c2410_gpio_pullup(S3C2410_GPG3, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<15)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<12))|(2<<12)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
#if 0
|
|
// WLAN_MAC_wake, GPG4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG4, 2);
|
|
#endif
|
|
|
|
// Power_Fail, GPG5, need to open when EVT2
|
|
// active low
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_EINT13);
|
|
s3c2410_gpio_pullup(S3C2410_GPG5, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<23)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<20))|(2<<20)), S3C2410_EXTINT1);
|
|
|
|
// Library, GPG6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG6, 2);
|
|
|
|
// Page up key, GPG7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG7, 2);
|
|
|
|
/* Qisda, ShiYong Lin, 2009/09/25, Power consumption {*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPL13, S3C2410_GPL13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPL13, 0);
|
|
|
|
/* } Qisda, ShiYong Lin, 2009/09/25, Power consumption */
|
|
#elif defined (CONFIG_QISDA_AS090B00_EVT1_1) || defined (CONFIG_QISDA_QD090B00_EVT1) || defined(CONFIG_QISDA_QD060N00_DVT1_1)
|
|
// Power button, GPF0
|
|
printk("Set_system_off_wkup_srce, CONFIG_QISDA_AS090B00_EVT1_1\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
|
|
s3c2410_gpio_pullup(S3C2410_GPF0, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<3)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<0))|(2<<0)), S3C2410_EXTINT0);
|
|
|
|
// The insertion of SD card, GPF1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF1, 2);
|
|
|
|
// TP_INT, GPF2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF2, 2);
|
|
|
|
// SPI_INT, GPF3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF3, 2);
|
|
|
|
// The insertion of earphone, GPF4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF4, 2);
|
|
|
|
// Touch_EN, GPF5
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 0);
|
|
|
|
// CHG_STA key, GPF6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF6, 0);
|
|
|
|
// Pagedown key, GPF7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF7, 2);
|
|
|
|
#if 0
|
|
// P_KEEP, GPG0, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_EINT8);
|
|
s3c2410_gpio_pullup(S3C2410_GPG0, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<3)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<0))|(2<<0)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// VBUS_IN_STA, GPG1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG1, S3C2410_GPG1_EINT9);
|
|
s3c2410_gpio_pullup(S3C2410_GPG1, 0);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<7)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<4))|(6<<4)), S3C2410_EXTINT1);
|
|
|
|
// SD power, GPG2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG2, 0);
|
|
|
|
// 3G ON-OFF, GPG3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG3, 0);
|
|
|
|
// WLAN_MAC_wake, GPG4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG4, 2);
|
|
|
|
// Power_Fail, GPG5, need to open when EVT2
|
|
// active low
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_EINT13);
|
|
s3c2410_gpio_pullup(S3C2410_GPG5, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<23)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<20))|(2<<20)), S3C2410_EXTINT1);
|
|
|
|
// Function, GPG6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG6, 2);
|
|
|
|
// PageUp key, GPG7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG7, 2);
|
|
|
|
/* Qisda, ShiYong Lin, 2009/09/25, Power consumption {*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPL13, S3C2410_GPL13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPL13, 0);
|
|
|
|
/* } Qisda, ShiYong Lin, 2009/09/25, Power consumption */
|
|
#else
|
|
// Power button, GPF0
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
|
|
s3c2410_gpio_pullup(S3C2410_GPF0, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<3)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<0))|(2<<0)), S3C2410_EXTINT0);
|
|
|
|
// The insertion of SD card, GPF1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF1, 2);
|
|
|
|
// The touch panel, GPF2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF2, 2);
|
|
|
|
// Menu key, GPF3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF3, 2);
|
|
|
|
// The insertion of earphone, GPF4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF4, 2);
|
|
|
|
// Touch_EN, GPF5
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 0);
|
|
|
|
// Search key, GPF6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF6, 2);
|
|
|
|
// Pagedown key, GPF7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF7, 2);
|
|
|
|
#if 0
|
|
// P_KEEP, GPG0, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_EINT8);
|
|
s3c2410_gpio_pullup(S3C2410_GPG0, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<3)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<0))|(2<<0)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// CHG_STA, GPG1, need to open when EVT2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG1, S3C2410_GPG1_EINT9);
|
|
s3c2410_gpio_pullup(S3C2410_GPG1, 0);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<7)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<4))|(6<<4)), S3C2410_EXTINT1);
|
|
|
|
#if 0
|
|
// T_SENSOR1, GPG2, need to open when EVT2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_EINT10);
|
|
s3c2410_gpio_pullup(S3C2410_GPG2, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<11)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<8))|(2<<8)), S3C2410_EXTINT1);
|
|
#else
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_EINT10);
|
|
s3c2410_gpio_pullup(S3C2410_GPG2, 0);
|
|
#endif
|
|
|
|
#if 0
|
|
// PI2C_EN pin, GPG3, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_EINT11);
|
|
s3c2410_gpio_pullup(S3C2410_GPG3, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<15)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<12))|(2<<12)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// Return key, GPG4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG4, 2);
|
|
|
|
// Power_Fail, GPG5, need to open when EVT2
|
|
// active low
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_EINT13);
|
|
s3c2410_gpio_pullup(S3C2410_GPG5, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<23)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<20))|(2<<20)), S3C2410_EXTINT1);
|
|
|
|
#if 0
|
|
// EN2, GPG6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_EINT14);
|
|
s3c2410_gpio_pullup(S3C2410_GPG6, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<27)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<24))|(2<<24)), S3C2410_EXTINT0);
|
|
#endif
|
|
|
|
// Page up key, GPG7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG7, 2);
|
|
#endif
|
|
}
|
|
|
|
void set_system_sleep_wkup_srce(void)
|
|
{
|
|
printk("Set_system_sleep_wkup_srce\n");
|
|
#ifdef CONFIG_QISDA_AS090B00_EVT1
|
|
// Power button, GPF0
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
|
|
s3c2410_gpio_pullup(S3C2410_GPF0, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<3)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<0))|(2<<0)), S3C2410_EXTINT0);
|
|
|
|
// The insertion of SD card, GPF1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_EINT1);
|
|
s3c2410_gpio_pullup(S3C2410_GPF1, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<7)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<4))|(6<<4)), S3C2410_EXTINT0);
|
|
|
|
// TP_INT, GPF2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_EINT2);
|
|
s3c2410_gpio_pullup(S3C2410_GPF2, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<11)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<8))|(2<<8)), S3C2410_EXTINT0);
|
|
|
|
#if 0
|
|
// SPI_INT, GPF3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_EINT3);
|
|
s3c2410_gpio_pullup(S3C2410_GPF3, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<15)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<12))|(2<<12)), S3C2410_EXTINT0);
|
|
#endif
|
|
|
|
// The insertion of earphone, GPF4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_EINT4);
|
|
s3c2410_gpio_pullup(S3C2410_GPF4, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<19)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<16))|(6<<16)), S3C2410_EXTINT0);
|
|
|
|
// Touch_EN, GPF5
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 0);
|
|
|
|
// Function key, GPF6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_EINT6);
|
|
s3c2410_gpio_pullup(S3C2410_GPF6, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<27)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<24))|(6<<24)), S3C2410_EXTINT0);
|
|
|
|
// Pagedown key, GPF7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_EINT7);
|
|
s3c2410_gpio_pullup(S3C2410_GPF7, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<31)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<28))|(6<<28)), S3C2410_EXTINT0);
|
|
|
|
#if 0
|
|
// P_KEEP, GPG0, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_EINT8);
|
|
s3c2410_gpio_pullup(S3C2410_GPG0, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<3)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<0))|(2<<0)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// VBUS_IN_STA, GPG1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG1, S3C2410_GPG1_EINT9);
|
|
s3c2410_gpio_pullup(S3C2410_GPG1, 0);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<7)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<4))|(6<<4)), S3C2410_EXTINT1);
|
|
|
|
// PWREN_SD, GPG2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG2, 0);
|
|
|
|
#if 0
|
|
// Audio_resetn pin, GPG3, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_EINT11);
|
|
s3c2410_gpio_pullup(S3C2410_GPG3, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<15)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<12))|(2<<12)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
#if 0
|
|
// WLAN_MAC_Wake key, GPG4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_EINT12);
|
|
s3c2410_gpio_pullup(S3C2410_GPG4, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<19)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<16))|(2<<16)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// Power_Fail, GPG5
|
|
// active low
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_EINT13);
|
|
s3c2410_gpio_pullup(S3C2410_GPG5, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<23)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<20))|(2<<20)), S3C2410_EXTINT1);
|
|
|
|
// Library, GPG6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_EINT14);
|
|
s3c2410_gpio_pullup(S3C2410_GPG6, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<27)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<24))|(6<<24)), S3C2410_EXTINT0);
|
|
|
|
// Page up key, GPG7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_EINT15);
|
|
s3c2410_gpio_pullup(S3C2410_GPG7, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<31)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<28))|(6<<28)), S3C2410_EXTINT1);
|
|
|
|
/* Qisda, ShiYong Lin, 2009/09/25, Power consumption {*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPL13, S3C2410_GPL13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPL13, 0);
|
|
|
|
/* } Qisda, ShiYong Lin, 2009/09/25, Power consumption */
|
|
#elif defined (CONFIG_QISDA_AS090B00_EVT1_1) || defined (CONFIG_QISDA_QD090B00_EVT1) || defined(CONFIG_QISDA_QD060N00_DVT1_1)
|
|
// Power button, GPF0
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
|
|
s3c2410_gpio_pullup(S3C2410_GPF0, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<3)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<0))|(2<<0)), S3C2410_EXTINT0);
|
|
|
|
// The insertion of SD card, GPF1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF1, 2);
|
|
|
|
// TP_INT, GPF2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_EINT2);
|
|
s3c2410_gpio_pullup(S3C2410_GPF2, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<11)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<8))|(2<<8)), S3C2410_EXTINT0);
|
|
|
|
// SPI_INT, GPF3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF3, 2);
|
|
|
|
// The insertion of earphone, GPF4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF4, 2);
|
|
|
|
// Touch_EN, GPF5
|
|
// s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
// s3c2410_gpio_setpin(S3C2410_GPF5, 0);
|
|
|
|
// CHG_STA key, GPF6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF6, 0);
|
|
|
|
// Pagedown key, GPF7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_EINT7);
|
|
s3c2410_gpio_pullup(S3C2410_GPF7, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<31)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<28))|(6<<28)), S3C2410_EXTINT0);
|
|
|
|
#if 0
|
|
// P_KEEP, GPG0, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_EINT8);
|
|
s3c2410_gpio_pullup(S3C2410_GPG0, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<3)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<0))|(2<<0)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// VBUS_IN_STA, GPG1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG1, S3C2410_GPG1_EINT9);
|
|
s3c2410_gpio_pullup(S3C2410_GPG1, 0);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<7)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<4))|(6<<4)), S3C2410_EXTINT1);
|
|
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG2, 0);
|
|
|
|
// 3G_ON_OFF pin, GPG3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG3, 0);
|
|
|
|
#if 0
|
|
// WLAN_MAC_Wake key, GPG4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_EINT12);
|
|
s3c2410_gpio_pullup(S3C2410_GPG4, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<19)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<16))|(2<<16)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// Power_Fail, GPG5
|
|
// active low
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_EINT13);
|
|
s3c2410_gpio_pullup(S3C2410_GPG5, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<23)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<20))|(2<<20)), S3C2410_EXTINT1);
|
|
|
|
// Function, GPG6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_EINT14);
|
|
s3c2410_gpio_pullup(S3C2410_GPG6, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<27)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<24))|(6<<24)), S3C2410_EXTINT0);
|
|
|
|
// Pageup key, GPG7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_EINT15);
|
|
s3c2410_gpio_pullup(S3C2410_GPG7, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<31)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<28))|(6<<28)), S3C2410_EXTINT1);
|
|
|
|
/* Qisda, ShiYong Lin, 2009/09/25, Power consumption {*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPL13, S3C2410_GPL13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPL13, 0);
|
|
|
|
/* } Qisda, ShiYong Lin, 2009/09/25, Power consumption */
|
|
#else
|
|
//other project
|
|
// Power button, GPF0
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
|
|
s3c2410_gpio_pullup(S3C2410_GPF0, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<3)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<0))|(2<<0)), S3C2410_EXTINT0);
|
|
|
|
// The insertion of SD card, GPF1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF1, 0);
|
|
|
|
// The touch panel, GPF2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPF2, 0);
|
|
|
|
// Menu key, GPF3
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_EINT3);
|
|
s3c2410_gpio_pullup(S3C2410_GPF3, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<15)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<12))|(6<<12)), S3C2410_EXTINT0);
|
|
|
|
// The insertion of earphone, GPF4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_EINT4);
|
|
s3c2410_gpio_pullup(S3C2410_GPF4, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<19)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<16))|(6<<16)), S3C2410_EXTINT0);
|
|
|
|
// Touch_EN, GPF5
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 0);
|
|
|
|
// Search key, GPF6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_EINT6);
|
|
s3c2410_gpio_pullup(S3C2410_GPF6, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<27)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<24))|(6<<24)), S3C2410_EXTINT0);
|
|
|
|
// Pagedown key, GPF7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_EINT7);
|
|
s3c2410_gpio_pullup(S3C2410_GPF7, 2);
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<31)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<28))|(6<<28)), S3C2410_EXTINT0);
|
|
|
|
#if 0
|
|
// P_KEEP, GPG0, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_EINT8);
|
|
s3c2410_gpio_pullup(S3C2410_GPG0, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<3)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<0))|(2<<0)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// CHG_STA, GPG1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG1, S3C2410_GPG1_EINT9);
|
|
s3c2410_gpio_pullup(S3C2410_GPG1, 0);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<7)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<4))|(6<<4)), S3C2410_EXTINT1);
|
|
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_INP);
|
|
s3c2410_gpio_pullup(S3C2410_GPG2, 0);
|
|
|
|
#if 0
|
|
// PI2C_EN pin, GPG3, needn't open
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_EINT11);
|
|
s3c2410_gpio_pullup(S3C2410_GPG3, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<15)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<12))|(2<<12)), S3C2410_EXTINT1);
|
|
#endif
|
|
|
|
// Return key, GPG4
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_EINT12);
|
|
s3c2410_gpio_pullup(S3C2410_GPG4, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<19)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<16))|(6<<16)), S3C2410_EXTINT1);
|
|
|
|
// Power_Fail, GPG5
|
|
// active low
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_EINT13);
|
|
s3c2410_gpio_pullup(S3C2410_GPG5, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<23)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<20))|(2<<20)), S3C2410_EXTINT1);
|
|
|
|
#if 0
|
|
// EN2, GPG6
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_EINT14);
|
|
s3c2410_gpio_pullup(S3C2410_GPG6, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<27)), S3C2410_EXTINT0);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<24))|(2<<24)), S3C2410_EXTINT0);
|
|
#endif
|
|
|
|
// Page up key, GPG7
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_EINT15);
|
|
s3c2410_gpio_pullup(S3C2410_GPG7, 2);
|
|
writel((readl(S3C2410_EXTINT1) & ~(1<<31)), S3C2410_EXTINT1);
|
|
writel(((readl(S3C2410_EXTINT1) & ~(7<<28))|(6<<28)), S3C2410_EXTINT1);
|
|
#endif
|
|
}
|
|
/* } Qisda, ShiYong Lin, 2009/09/08, Wake up source */
|
|
|
|
static void s3c2410_pm_configure_extint(void)
|
|
{
|
|
#if !defined(CONFIG_CPU_S3C2450) && !defined(CONFIG_CPU_S3C2416)
|
|
int pin;
|
|
|
|
/* for each of the external interrupts (EINT0..EINT15) we
|
|
* need to check wether it is an external interrupt source,
|
|
* and then configure it as an input if it is not
|
|
*/
|
|
|
|
for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) {
|
|
s3c2410_pm_check_resume_pin(pin, pin - S3C2410_GPF0);
|
|
}
|
|
|
|
for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) {
|
|
s3c2410_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8);
|
|
}
|
|
#else
|
|
/* Qisda, ShiYong Lin, 2009/08/18, Wake up source {*/
|
|
#if 0
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_EINT3);
|
|
|
|
s3c2410_gpio_pullup(S3C2410_GPF0, 0);
|
|
s3c2410_gpio_pullup(S3C2410_GPF3, 0);
|
|
|
|
/* EINT0 filter enable */
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<3)), S3C2410_EXTINT0);
|
|
|
|
/* EINT3 filter enable */
|
|
writel((readl(S3C2410_EXTINT0) & ~(1<<15)), S3C2410_EXTINT0);
|
|
|
|
/* EINT0 falling edge triggered */
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<0))|(2<<0)), S3C2410_EXTINT0);
|
|
|
|
/* EINT3 falling edge triggered */
|
|
writel(((readl(S3C2410_EXTINT0) & ~(7<<12))|(2<<12)), S3C2410_EXTINT0);
|
|
#else
|
|
if( wkup_srce == SYSTEM_OFF_STATE)
|
|
{
|
|
// System power off ( fake to power off)
|
|
// Wake up source
|
|
// 1. The long press of the power button
|
|
// 2. The insertion of the charger and USB (CHG_STA)
|
|
// 3. Power fail
|
|
set_system_off_wkup_srce();
|
|
}
|
|
else if (wkup_srce == SYSTEM_SLEEP_STATE)
|
|
{
|
|
// System sleep
|
|
// Wake up source
|
|
// 1. The short or long press of the power button
|
|
// 2. The insertion of the charger and USB (CHG_STA)
|
|
// 3. Menu, Search, Page_down,Page up, and return
|
|
// 4. Touch
|
|
// 5. The insertion of the Earphone
|
|
set_system_sleep_wkup_srce();
|
|
}
|
|
else
|
|
{
|
|
set_system_off_wkup_srce();
|
|
}
|
|
#endif
|
|
/* } Qisda, ShiYong Lin, 2009/08/18, Wake up source */
|
|
|
|
#endif
|
|
}
|
|
#else
|
|
#if 0
|
|
extern int s3c_irqext_type(unsigned int irq, unsigned int type);
|
|
extern void s3c_irqext_unmaskack(unsigned int irqno);
|
|
#endif
|
|
|
|
static void s3c6400_pm_configure_extint(void)
|
|
{
|
|
int cnt = 0;
|
|
u32 check, reg_val;
|
|
|
|
/* for each of the external interrupts (EINT0..EINT15) we
|
|
* need to check wether it is an external interrupt source,
|
|
* and then configure it as an input if it is not
|
|
*/
|
|
|
|
// s3c_irqext_type(IRQ_EINT10, IRQT_FALLING);
|
|
s3c_gpio_cfgpin(S3C_GPN10, S3C_GPN10_EXTINT10);
|
|
s3c_gpio_pullup(S3C_GPN10, 2);
|
|
udelay(50);
|
|
#if 0
|
|
do {
|
|
reg_val = readl(S3C_GPNCON);
|
|
check = (reg_val & (3<<20))>> 20;
|
|
if (++cnt > 10000) {
|
|
printk("%s: Oops! GPNCON EXTINT Setting Fail... EINTMASK:0x%x\n",
|
|
__FUNCTION__, reg_val);
|
|
}
|
|
} while (!(check == 2));
|
|
|
|
printk("cnt is %d\n", cnt);
|
|
#endif
|
|
__raw_writel((__raw_readl(S3C_EINTCON0) & ~(0x7 << 20)) |
|
|
(S3C_EXTINT_FALLEDGE << 20), S3C_EINTCON0);
|
|
|
|
// s3c_irqext_unmaskack(IRQ_EINT10);
|
|
__raw_writel(1UL << (IRQ_EINT10 - IRQ_EINT0), S3C_EINTPEND);
|
|
__raw_writel(__raw_readl(S3C_EINTMASK)&~(1UL << (IRQ_EINT10 - IRQ_EINT0)), S3C_EINTMASK);
|
|
|
|
__raw_writel((0x0fffffff&~(3<<9)), S3C_EINT_MASK);
|
|
}
|
|
|
|
#endif
|
|
|
|
void (*pm_cpu_prep)(void);
|
|
void (*pm_cpu_sleep)(void);
|
|
|
|
#define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
|
|
|
|
/* s3c2410_pm_enter
|
|
*
|
|
* central control for sleep/resume process
|
|
*/
|
|
#if !defined (CONFIG_CPU_S3C6400) && !defined (CONFIG_CPU_S3C6410)
|
|
static int s3c2410_pm_enter(suspend_state_t state)
|
|
{
|
|
unsigned long regs_save[16];
|
|
|
|
/* ensure the debug is initialised (if enabled) */
|
|
|
|
s3c2410_pm_debug_init();
|
|
|
|
DBG("s3c2410_pm_enter(%d)\n", state);
|
|
|
|
if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
|
|
printk(KERN_ERR PFX "error: no cpu sleep functions set\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
#ifndef CONFIG_PM_CPU_MODE
|
|
if (state != PM_SUSPEND_MEM) {
|
|
printk(KERN_ERR PFX "error: only PM_SUSPEND_MEM supported\n");
|
|
return -EINVAL;
|
|
}
|
|
#endif
|
|
|
|
#if !defined(CONFIG_CPU_S3C2450) && !defined(CONFIG_CPU_S3C2416)
|
|
/* check if we have anything to wake-up with... bad things seem
|
|
* to happen if you suspend with no wakeup (system will often
|
|
* require a full power-cycle)
|
|
*/
|
|
|
|
if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
|
|
!any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
|
|
printk(KERN_ERR PFX "No sources enabled for wake-up!\n");
|
|
printk(KERN_ERR PFX "Aborting sleep\n");
|
|
return -EINVAL;
|
|
}
|
|
#endif
|
|
/* prepare check area if configured */
|
|
|
|
s3c2410_pm_check_prepare();
|
|
|
|
/* store the physical address of the register recovery block */
|
|
|
|
s3c2410_sleep_save_phys = virt_to_phys(regs_save);
|
|
|
|
DBG("s3c2410_sleep_save_phys=0x%08lx\n", s3c2410_sleep_save_phys);
|
|
|
|
/* save all necessary core registers not covered by the drivers */
|
|
|
|
s3c2410_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save));
|
|
s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save));
|
|
s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save));
|
|
#if defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
|
|
s3c2410_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
|
|
s3c2410_pm_do_save(smc_save, ARRAY_SIZE(smc_save));
|
|
|
|
/* ensure INFORM1_REG has the resume address, check u-boot */
|
|
__raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2443_INFORM1);
|
|
#endif
|
|
|
|
/* set the irq configuration for wake */
|
|
s3c2410_pm_configure_extint();
|
|
|
|
/* Qisda, ShiYong Lin, 2009/11/02, Set En1 and En2 based on charging source {*/
|
|
if(charging_source!=1){
|
|
//usb or nothing
|
|
//EN2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPB0_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB0, 0);
|
|
//EN1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB4, 1);
|
|
}
|
|
else{
|
|
//charger
|
|
//EN2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPB0_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB0, 1);
|
|
//EN1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB4, 0);
|
|
}
|
|
/* } Qisda, ShiYong Lin, 2009/11/02, Set En1 and En2 based on charging source */
|
|
|
|
DBG("sleep: irq wakeup masks: %08lx,%08lx\n",
|
|
s3c_irqwake_intmask, s3c_irqwake_eintmask);
|
|
|
|
__raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK);
|
|
__raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK);
|
|
|
|
/* ack any outstanding external interrupts before we go to sleep */
|
|
|
|
__raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND);
|
|
__raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND);
|
|
__raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND);
|
|
|
|
/* call cpu specific preperation */
|
|
|
|
pm_cpu_prep();
|
|
|
|
/* flush cache back to ram */
|
|
|
|
flush_cache_all();
|
|
|
|
s3c2410_pm_check_store();
|
|
|
|
/* send the cpu to sleep... */
|
|
#if !defined(CONFIG_CPU_S3C2450) && !defined(CONFIG_CPU_S3C2416)
|
|
__raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */
|
|
#endif
|
|
|
|
/* s3c2410_cpu_save will also act as our return point from when
|
|
* we resume as it saves its own register state, so use the return
|
|
* code to differentiate return from save and return from sleep */
|
|
|
|
/* Qisda, ShiYong Lin, 2009/10/27, set P_mode as high {*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPD12, S3C2410_GPD12_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPD12, 0);
|
|
/* } Qisda, ShiYong Lin, 2009/10/27, Set P_mode as high */
|
|
if(s3c2410_cpu_save(regs_save) == 0) {
|
|
flush_cache_all();
|
|
pm_cpu_sleep();
|
|
}
|
|
|
|
/* Qisda, ShiYong Lin, 2009/10/27, set P_mode as high {*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPD12, S3C2410_GPD12_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPD12, 1);
|
|
/* } Qisda, ShiYong Lin, 2009/10/27, Set P_mode as high */
|
|
/* restore the cpu state */
|
|
|
|
cpu_init();
|
|
|
|
/* restore the system state */
|
|
s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
|
|
s3c2410_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save));
|
|
s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save));
|
|
|
|
#if defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
|
|
|
|
s3c2410_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
|
|
s3c2410_pm_do_restore(smc_save, ARRAY_SIZE(smc_save));
|
|
|
|
__raw_writel(0xD, S3C2443_PWRMODE);
|
|
#endif
|
|
|
|
|
|
s3c2410_pm_debug_init();
|
|
|
|
/* check what irq (if any) restored the system */
|
|
|
|
DBG("post sleep: IRQs 0x%08x, 0x%08x\n",
|
|
__raw_readl(S3C2410_SRCPND),
|
|
__raw_readl(S3C2410_EINTPEND));
|
|
|
|
s3c2410_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND),
|
|
s3c_irqwake_intmask);
|
|
|
|
s3c2410_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND),
|
|
s3c_irqwake_eintmask);
|
|
|
|
DBG("post sleep, preparing to return\n");
|
|
|
|
s3c2410_pm_check_restore();
|
|
|
|
/* ok, let's return from sleep */
|
|
|
|
DBG("S3C2410 PM Resume (post-restore)\n");
|
|
DBG("Wakeup source =0x%08lx\n", readl(S3C2443_WKUPSTAT));
|
|
return 0;
|
|
}
|
|
#else
|
|
static int s3c6400_pm_enter(suspend_state_t state)
|
|
{
|
|
unsigned long regs_save[16];
|
|
unsigned long clkcon, irqindex = 0;
|
|
unsigned int tmp;
|
|
|
|
/* ensure the debug is initialised (if enabled) */
|
|
|
|
// s3c6400_pm_debug_init();
|
|
|
|
|
|
if (state != PM_SUSPEND_MEM) {
|
|
printk(KERN_ERR PFX "error: only PM_SUSPEND_MEM supported\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* prepare check area if configured */
|
|
s3c2410_pm_check_prepare();
|
|
|
|
/* store the physical address of the register recovery block */
|
|
s3c2410_sleep_save_phys = virt_to_phys(regs_save);
|
|
|
|
/* save all necessary core registers not covered by the drivers */
|
|
s3c2410_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save));
|
|
s3c2410_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
|
|
s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save));
|
|
s3c2410_pm_do_save(sromc_save, ARRAY_SIZE(sromc_save));
|
|
|
|
/* ensure INF_REG0 has the resume address */
|
|
__raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C_INFORM0);
|
|
|
|
/* set the irq configuration for wake */
|
|
s3c6400_pm_configure_extint();
|
|
|
|
/* call cpu specific preperation */
|
|
|
|
pm_cpu_prep();
|
|
|
|
/* flush cache back to ram */
|
|
|
|
flush_cache_all();
|
|
|
|
s3c2410_pm_check_store();
|
|
|
|
__raw_writel(0xffffffff, S3C_VIC0INTENCLEAR);
|
|
__raw_writel(0xffffffff, S3C_VIC1INTENCLEAR);
|
|
__raw_writel(0xffffffff, S3C_VIC0SOFTINTCLEAR);
|
|
__raw_writel(0xffffffff, S3C_VIC1SOFTINTCLEAR);
|
|
|
|
|
|
__raw_writel(1, S3C_OSC_STABLE);
|
|
__raw_writel(1, S3C_PWR_STABLE);
|
|
|
|
/* Set WFI instruction to SLEEP mode */
|
|
|
|
tmp = __raw_readl(S3C_PWR_CFG);
|
|
tmp &= ~(0x60<<0);
|
|
tmp |= (0x3<<5);
|
|
__raw_writel(tmp, S3C_PWR_CFG);
|
|
|
|
tmp = __raw_readl(S3C_SLEEP_CFG);
|
|
tmp &= ~(0x61<<0);
|
|
__raw_writel(tmp, S3C_SLEEP_CFG);
|
|
|
|
__raw_writel(0x2, S3C_SLPEN);
|
|
|
|
/* Clear WAKEUP_STAT register for next wakeup -jc.lee */
|
|
/* If this register do not be cleared, Wakeup will be failed */
|
|
tmp = __raw_readl(S3C_WAKEUP_STAT);
|
|
__raw_writel(tmp, S3C_WAKEUP_STAT);
|
|
|
|
/* ALL sub block "ON" before enterring sleep mode - EVT0 bug*/
|
|
__raw_writel(0xffffff00, S3C_NORMAL_CFG);
|
|
|
|
/* Open all clock gate to enter sleep mode - EVT0 bug*/
|
|
__raw_writel(0xffffffff, S3C_HCLK_GATE);
|
|
__raw_writel(0xffffffff, S3C_PCLK_GATE);
|
|
__raw_writel(0xffffffff, S3C_SCLK_GATE);
|
|
|
|
|
|
/* s3c2410_cpu_save will also act as our return point from when
|
|
* we resume as it saves its own register state, so use the return
|
|
* code to differentiate return from save and return from sleep */
|
|
|
|
if (s3c2410_cpu_save(regs_save) == 0) {
|
|
flush_cache_all();
|
|
pm_cpu_sleep();
|
|
}
|
|
|
|
/* restore the cpu state */
|
|
cpu_init();
|
|
|
|
/* restore the system state */
|
|
s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
|
|
s3c2410_pm_do_restore(sromc_save, ARRAY_SIZE(sromc_save));
|
|
s3c2410_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save));
|
|
s3c2410_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
|
|
|
|
tmp = __raw_readl(S3C_EINTPEND);
|
|
__raw_writel(tmp, S3C_EINTPEND);
|
|
|
|
//s3c2410_pm_debug_init();
|
|
|
|
DBG("post sleep, preparing to return\n");
|
|
|
|
s3c2410_pm_check_restore();
|
|
|
|
/* ok, let's return from sleep */
|
|
DBG("S3C6400 PM Resume (post-restore)\n");
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Called after processes are frozen, but before we shut down devices.
|
|
*/
|
|
static int s3c2410_pm_prepare(suspend_state_t state)
|
|
{
|
|
printk("s3c2410_pm_prepare\n");
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Called after devices are re-setup, but before processes are thawed.
|
|
*/
|
|
static int s3c2410_pm_finish(suspend_state_t state)
|
|
{
|
|
printk("s3c2410_pm_finish\n");
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
|
|
*/
|
|
static struct pm_ops s3c2410_pm_ops = {
|
|
.pm_disk_mode = PM_DISK_FIRMWARE,
|
|
.prepare = s3c2410_pm_prepare,
|
|
#if !defined (CONFIG_CPU_S3C6400) && !defined (CONFIG_CPU_S3C6410)
|
|
.enter = s3c2410_pm_enter,
|
|
#else
|
|
.enter = s3c6400_pm_enter,
|
|
#endif
|
|
.finish = s3c2410_pm_finish,
|
|
};
|
|
|
|
/* s3c2410_pm_init
|
|
*
|
|
* Attach the power management functions. This should be called
|
|
* from the board specific initialisation if the board supports
|
|
* it.
|
|
*/
|
|
|
|
int __init s3c2410_pm_init(void)
|
|
{
|
|
printk("S3C2410 Power Management, (c) 2004 Simtec Electronics\n");
|
|
pm_set_ops(&s3c2410_pm_ops);
|
|
return 0;
|
|
}
|