990 lines
37 KiB
C
990 lines
37 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
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* iPAQ H1940 touchscreen support
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*
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* ChangeLog
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*
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* 2004-09-05: Herbert Pötzl <herbert@13thfloor.at>
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* - added clock (de-)allocation code
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*
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* 2005-03-06: Arnaud Patard <arnaud.patard@rtp-net.org>
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* - h1940_ -> s3c24xx (this driver is now also used on the n30
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* machines :P)
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* - Debug messages are now enabled with the config option
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* TOUCHSCREEN_S3C_DEBUG
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* - Changed the way the value are read
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* - Input subsystem should now work
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* - Use ioremap and readl/writel
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*
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* 2005-03-23: Arnaud Patard <arnaud.patard@rtp-net.org>
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* - Make use of some undocumented features of the touchscreen
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* controller
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*
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/input.h>
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#include <linux/init.h>
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#include <linux/serio.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/miscdevice.h>
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#include <linux/clk.h>
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#include <linux/mutex.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hardware.h>
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#include <asm/uaccess.h>
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#include <asm/arch/regs-adc.h>
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#include <asm/arch/irqs.h>
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#include <asm/arch/regs-s3c2416-clock.h>
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#include <asm/arch/regs-gpio.h>
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//#define USE_12BITS_ADC
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//#define USE_10BITS_ADC
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#define LEVEL0_MIN 2980
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#define LEVEL0_MAX 3384
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#define LEVEL1_MIN 3385
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#define LEVEL1_MAX 3484
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#define LEVEL2_MIN 3485
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#define LEVEL2_MAX 3684
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#define LEVEL3_MIN 3685
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#define LEVEL3_MAX 4080
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#define BATTERY_FULL 4081
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#define ADC_READ_LEVEL_VAULE _IOR('S', 0x01, unsigned long)
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#define ADC_READ_INPUT_SOURCE_STATUS _IOR('S', 0x02, unsigned long)
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#define ADC_SET_PM_WKUP_SOURCE _IOW('S', 0x03, unsigned long)
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#define ADC_READ_RAW_VAULE _IOR('S', 0x04, unsigned long)
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#define ADC_POWER_OFF _IO ('S', 0x05)
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#define ADC_READ_INPUT_POWER_STATUS _IOR('S', 0x06, unsigned long)
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#define ADC_READ_CHARGING_STATUS _IOR('S', 0x07, unsigned long)
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#define ADC_SET_PM_FUNCTION_POWER _IOW('S', 0x08, unsigned long)
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#ifdef CONFIG_PM_CPU_MODE
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#define ADC_SET_CPU_PM_MODE _IOW('S', 0x09, unsigned long)
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#endif
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#define ADC_READ_WAKEUP_SOURCE _IOR('S', 0x0A, unsigned long)
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#define ADC_READ_POWER_FAIL_STATUS _IOR('S', 0x0B, unsigned long)
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//#define ADC_INPUT_PIN _IOW('S', 0x0c, unsigned long)
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/*Qisda Qube 20091103 for Smart card power control*/
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#define ADC_SMARTCARD_PWR _IOR('S', 0x8F, unsigned long)
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/*Qisda Qube 20091103 for Smart card power control*/
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#define NON_ZERO_VALUE 0xFF
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#define INPUT_SOURCE_USB 0
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#define INPUT_SOURCE_CHARGER 1
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#define INPUT_SOURCE_NOTHING 2
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unsigned int wkup_srce = NON_ZERO_VALUE;
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#ifdef CONFIG_PM_CPU_MODE
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unsigned char pm_cpu_mode = 0;
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#endif
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#define ADC_PM_DEBUG_PORT (0x00000003)
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#define ADC_PM_WIFI (0x0000000C)
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#define ADC_PM_AUDIO (0x00000030)
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#define ADC_PM_SD (0x000000C0)
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#define ADC_PM_TCON (0x00000300)
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#define ADC_PM_USB (0x00000C00)
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#define ADC_PM_TOUCH (0x0000F000)
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#define ADC_PM_SMART_CARD (0x00030000)
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#define ADC_PM_3G_MODULE (0x000C0000)
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#define ADC_PM_I2C (0x00300000)
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extern int IsWallCharger(void);
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/* Qisda, ShiYong Lin, 2009/10/27, Modify for exception in IsWallCharger function {*/
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extern int charging_source;
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/* } Qisda, ShiYong Lin, 2009/10/27, Modify for exception in IsWallCharger function */
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#define ADC_MINOR 131
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#if defined(CONFIG_CPU_S3C2443)
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#define ADC_ENV(x) (S3C2410_ADCCON_PRSCVL(49))
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#else
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#define ADC_ENV(x) (S3C2410_ADCCON_PRSCVL(49) | S3C2410_ADCCON_SELMUX(x))
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#endif
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struct s3c_adc_mach_info {
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int delay;
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int presc;
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int resol_bit;
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};
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/* ADC default configuration */
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struct s3c_adc_mach_info s3c_adc_cfg __initdata = {
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.delay = 10000,
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.presc = 49,
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//#if defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C6410)
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//.resol_bit = 12,
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//#else
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/* Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status {*/
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.resol_bit = 12,
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/* Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status }*/
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//#endif
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};
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static struct clk *adc_clock;
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static void __iomem *base_addr;
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static DEFINE_MUTEX(adc_mutex);
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static unsigned long data_for_ADCCON;
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static unsigned long data_for_ADCTSC;
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static int adc_port = 0;
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static void s3c_adc_save_SFR_on_ADC(void) {
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data_for_ADCCON = readl(base_addr+S3C2410_ADCCON);
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data_for_ADCTSC = readl(base_addr+S3C2410_ADCTSC);
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}
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static void s3c_adc_restore_SFR_on_ADC(void) {
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writel(data_for_ADCCON, base_addr+S3C2410_ADCCON);
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writel(data_for_ADCTSC, base_addr+S3C2410_ADCTSC);
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}
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static int s3c_adc_open(struct inode *inode, struct file *file)
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{
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return 0;
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}
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/* Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status {*/
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#ifdef USE_10BITS_ADC
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static ssize_t
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s3c_adc_read(struct file *file, char __user * buffer,
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size_t size, loff_t * pos)
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{
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unsigned long data0;
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unsigned long data1;
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int adc_value = 0;
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// printk(KERN_INFO " s3c_adc_read() entered\n");
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mutex_lock(&adc_mutex);
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s3c_adc_save_SFR_on_ADC();
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writel(0x0, base_addr+S3C2410_ADCCON);
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writel(0x58, base_addr+S3C2410_ADCTSC);
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udelay(10);
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writel(ADC_ENV(adc_port)|S3C2410_ADCCON_STDBM, base_addr+S3C2410_ADCCON);
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#if defined(CONFIG_CPU_S3C2443)
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writel(S3C2410_ADCCON_SELMUX(adc_port), base_addr+S3C2410_ADCMUX);
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#endif
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udelay(10);
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writel(S3C2410_ADCCON_PRSCEN|ADC_ENV(adc_port)|S3C2410_ADCCON_ENABLE_START, base_addr+S3C2410_ADCCON);
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do{
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data0 = readl(base_addr+S3C2410_ADCCON);
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}
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while(!(data0 & S3C2410_ADCCON_ECFLG));
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data1 = readl(base_addr+S3C2410_ADCDAT0);
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adc_value = data1 & S3C2410_ADCDAT0_XPDATA_MASK;
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s3c_adc_restore_SFR_on_ADC();
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mutex_unlock(&adc_mutex);
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// printk(KERN_INFO " Converted Value: %03d\n", adc_value);
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if (copy_to_user(buffer, &adc_value, sizeof(unsigned int))) {
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return -EFAULT;
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}
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return sizeof(unsigned int);
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}
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#else
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unsigned long
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s3c_adc_read(void)
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{
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unsigned long data0;
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unsigned long data1;
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int adc_value = 0;
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// printk("s3c_adc_read entered\n");
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mutex_lock(&adc_mutex);
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s3c_adc_save_SFR_on_ADC();
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writel(0x0, base_addr+S3C2410_ADCCON);
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writel(0x58, base_addr+S3C2410_ADCTSC);
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udelay(10);
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writel(ADC_ENV(adc_port)|S3C2410_ADCCON_STDBM, base_addr+S3C2410_ADCCON);
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#if defined(CONFIG_CPU_S3C2443)
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writel(S3C2410_ADCCON_SELMUX(adc_port), base_addr+S3C2410_ADCMUX);
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#else
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writel(0, base_addr+0x18);
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#endif
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udelay(10);
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writel(S3C2410_ADCCON_PRSCEN|ADC_ENV(adc_port)|S3C2410_ADCCON_ENABLE_START|S3C2450_ADCCON_RESSEL_12BIT, base_addr+S3C2410_ADCCON);
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do{
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data0 = readl(base_addr+S3C2410_ADCCON);
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}
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while(!(data0 & S3C2410_ADCCON_ECFLG));
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data1 = readl(base_addr+S3C2410_ADCDAT0);
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adc_value = data1 & S3C_ADCDAT1_YPDATA_MASK_12BIT;
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s3c_adc_restore_SFR_on_ADC();
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mutex_unlock(&adc_mutex);
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// printk("Converted Value: %05d\n", adc_value);
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return adc_value;
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}
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#endif
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/* Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status }*/
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static int s3c_adc_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int i = 0;
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int average_adc_value = 0;
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int data_mask = 0;
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unsigned int ret = -ENOIOCTLCMD;
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unsigned long level = NON_ZERO_VALUE;
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unsigned long input_source = NON_ZERO_VALUE;
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switch (cmd) {
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/*Qisda Qube 20091103 for Smart card power control*/
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case ADC_SMARTCARD_PWR:
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if(arg==0)
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{
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printk("Enable smard card power\n");
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s3c2410_gpio_cfgpin(S3C2410_GPC3, S3C2410_GPC3_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPC3,1);
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s3c2410_gpio_cfgpin(S3C2410_GPH2, S3C2410_GPH2_TXD0);
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s3c2410_gpio_cfgpin(S3C2410_GPH3, S3C2410_GPH3_RXD0);
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}
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else if(arg==3)
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{
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printk("Disable smard card power\n");
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s3c2410_gpio_cfgpin(S3C2410_GPC3, S3C2410_GPC3_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPC3,0);
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s3c2410_gpio_cfgpin(S3C2410_GPH2, S3C2410_GPH2_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPH2,0);
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s3c2410_gpio_cfgpin(S3C2410_GPH3, S3C2410_GPH3_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPH3,0);
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}
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return 0;
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/*Qisda Qube 20091103 for Smart card power control*/
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/*
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case ADC_INPUT_PIN:
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adc_port = (unsigned int) arg;
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if (adc_port >= 4)
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printk(" %d is already reserved for TouchScreen\n", adc_port);
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return 0;
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*/
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case ADC_READ_INPUT_SOURCE_STATUS:
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//Read the level data from GPG1
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//CHG_STA: 0 => no andy insertion source
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// 1 => There is an insertion existing in GPG
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/* Qisda, ShiYong Lin, 2009/10/27, Modify for exception in IsWallCharger function {*/
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input_source = charging_source;
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put_user(input_source, (unsigned long __user *)arg);
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ret = 0;
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/* } Qisda, ShiYong Lin, 2009/10/27, Modify for exception in IsWallCharger function */
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break;
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case ADC_SET_PM_WKUP_SOURCE:
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wkup_srce = (unsigned long) arg;
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printk("Wakeup parameter = %d\n", wkup_srce);
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/* Qisda, ShiYong Lin, 2009/09/28, Add the sleep event message when sleep {*/
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s3c_keypad_pm_sleep_message_to_ap(1);
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/* } Qisda, ShiYong Lin, 2009/09/28, Add the sleep event message when sleep */
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ret = 0;
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break;
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case ADC_READ_LEVEL_VAULE:
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for(i=0; i<20 ;i++)
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{
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udelay(1000);
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average_adc_value += s3c_adc_read();
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}
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average_adc_value = average_adc_value/20;
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if (average_adc_value <= LEVEL0_MAX)
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{
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level = 0;
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}
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else if (average_adc_value < LEVEL1_MAX && average_adc_value >= LEVEL1_MIN)
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{
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level = 1;
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}
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else if (average_adc_value < LEVEL2_MAX && average_adc_value >= LEVEL2_MIN)
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{
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level = 2;
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}
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else if(average_adc_value < LEVEL3_MAX && average_adc_value >= LEVEL3_MIN)
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{
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level = 3;
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}
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else if(average_adc_value >= BATTERY_FULL)
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{
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level = 4;
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}
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// printk("level = %d, ADC data = %d\n", (int)level, (int)average_adc_value);
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put_user(level, (unsigned long __user *)arg);
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ret = 0;
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break;
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case ADC_READ_RAW_VAULE:
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for(i=0; i<20 ;i++)
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{
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udelay(1000);
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average_adc_value += s3c_adc_read();
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}
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average_adc_value = average_adc_value / 20;
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printk("ADC data = %d\n", (int)average_adc_value);
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put_user(average_adc_value, (unsigned long __user *)arg);
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ret = 0;
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break;
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case ADC_POWER_OFF:
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printk("power off");
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s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPG0, 0);
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ret = 0;
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break;
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#ifdef CONFIG_QISDA_AS090B00_EVT1
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case ADC_READ_INPUT_POWER_STATUS:
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data_mask = readl(S3C2410_GPHDAT);
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data_mask &= 0x1<<5;
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printk("GPH5 = %d\n", data_mask);
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ret = put_user(data_mask, (unsigned long __user *)arg);
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break;
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#endif
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#if defined(CONFIG_QISDA_AS090B00_EVT1_1) || defined (CONFIG_QISDA_QD090B00_EVT1) || defined(CONFIG_QISDA_QD060N00_DVT1_1)
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case ADC_READ_CHARGING_STATUS:
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data_mask = readl(S3C2410_GPFDAT);
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data_mask &= 0x1<<6;
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printk("GPF6 = %d\n", data_mask);
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ret = put_user(data_mask, (unsigned long __user *)arg);
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break;
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#endif
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case ADC_SET_PM_FUNCTION_POWER:
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printk("ADC_SET_PM_FUNCTION_POWER\n");
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#if defined(CONFIG_QISDA_AS090B00_EVT1_1) || defined(CONFIG_QISDA_AS090B00_EVT1) || defined(CONFIG_QISDA_QD060N00_DVT1_1) || defined(CONFIG_QISDA_QD090B00_EVT1)
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if((arg & ADC_PM_DEBUG_PORT)==0){
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printk("ADC_PM_DEBUG_PORT, 0\n");
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s3c2410_gpio_cfgpin(S3C2410_GPB6, S3C2410_GPB6_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPB6, 0);
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s3c2410_gpio_cfgpin(S3C2410_GPH0, S3C2410_GPH0_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPH0, 0);
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s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPH1, 0);
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}
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else if((arg & ADC_PM_DEBUG_PORT)==1){
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printk("ADC_PM_DEBUG_PORT, 1\n");
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s3c2410_gpio_cfgpin(S3C2410_GPB6, S3C2410_GPB6_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPB6, 0);
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s3c2410_gpio_cfgpin(S3C2410_GPH0, S3C2410_GPH0_nCTS0);
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s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_nRTS0);
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}
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else if((arg & ADC_PM_DEBUG_PORT)==2){
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printk("ADC_PM_DEBUG_PORT, 2 do special test\n");
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}
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else{
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printk("ADC_PM_DEBUG_PORT, 3 do nothing\n");
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}
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//WIFI
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if(((arg & ADC_PM_WIFI) >> 2)==0){
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printk("ADC_PM_WIFI, 0\n");
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/*
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s3c2410_gpio_cfgpin(S3C2410_GPH12, S3C2410_GPH12_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPH12, 0);
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writel(((readl(S3C2416_GPKCON) & ~(1<<13)) | (1<<12)), S3C2416_GPKCON);
|
|
writel(((readl(S3C2416_GPKDAT) | 0<<6)), S3C2416_GPKDAT);
|
|
writel(((readl(S3C2416_GPKCON) & ~(1<<11)) | (1<<10)), S3C2416_GPKCON);
|
|
writel(((readl(S3C2416_GPKDAT) | 0<<5)), S3C2416_GPKDAT);
|
|
//Signal
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE11, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE12, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE13, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF3, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG4, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPD8, S3C2410_GPD8_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPD8, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPL13, S3C2410_GPL13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPL13, 0);
|
|
*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPD8, S3C2410_GPD8_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPD8, 0);
|
|
msleep(100);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE11, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE12, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE13, 0);
|
|
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF3, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG4, 0);
|
|
|
|
writel(((readl(S3C2410_GPHCON) & ~(1<<25)) | (1<<24)), S3C2410_GPHCON); /* GPH12, 3.3V */
|
|
writel((readl(S3C2410_GPHDAT) & ~(1<<12)), S3C2410_GPHDAT);
|
|
writel(((readl(S3C2410_GPHUP) & ~(1<<25)) | (1<<24)), S3C2410_GPHUP);
|
|
msleep(100);
|
|
|
|
s3c2410_gpio_cfgpin(S3C2410_GPL13, S3C2410_GPL13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPL13, 0);
|
|
|
|
writel(((readl(S3C2416_GPKCON) & ~(1<<13)) | (1<<12)), S3C2416_GPKCON);
|
|
writel((readl(S3C2416_GPKDAT) & ~(1<<6)), S3C2416_GPKDAT);
|
|
msleep(100);
|
|
writel(((readl(S3C2416_GPKCON) & ~(1<<11)) | (1<<10)), S3C2416_GPKCON);
|
|
writel((readl(S3C2416_GPKDAT) & ~(1<<5)), S3C2416_GPKDAT);
|
|
msleep(100);
|
|
}
|
|
else if(((arg & ADC_PM_WIFI) >> 2)==1){
|
|
printk("ADC_PM_WIFI, 1\n");
|
|
// Powering on wifi is via the script file
|
|
/*
|
|
//power
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH12, S3C2410_GPH12_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH12, 1);
|
|
writel(((readl(S3C2416_GPKCON) & ~(1<<13)) | (1<<12)), S3C2416_GPKCON);
|
|
writel(((readl(S3C2416_GPKDAT) | 1<<6)), S3C2416_GPKDAT);
|
|
writel(((readl(S3C2416_GPKCON) & ~(1<<11)) | (1<<10)), S3C2416_GPKCON);
|
|
writel(((readl(S3C2416_GPKDAT) | 1<<5)), S3C2416_GPKDAT);
|
|
//Signal
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_SPIMISO0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_SPIMOSI0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_SPICLK0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF3, S3C2410_GPF3_EINT3);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_EINT12);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPD8, S3C2410_GPD8_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPD8, 1);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPL13, S3C2410_GPL13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPL13, 1);
|
|
*/
|
|
/*
|
|
s3c2410_gpio_setpin(S3C2410_GPH12, 1);
|
|
msleep(100);
|
|
s3c2410_gpio_setpin(S3C2410_GPIONO(S3C2416_GPIO_BANKK, 5), 1);
|
|
msleep(100);
|
|
s3c2410_gpio_setpin(S3C2410_GPIONO(S3C2416_GPIO_BANKK, 6), 1);
|
|
msleep(100);
|
|
s3c2410_gpio_setpin(S3C2410_GPD8, 1);
|
|
msleep(100);
|
|
s3c2410_gpio_setpin(S3C2410_GPD8, 0);
|
|
msleep(100);
|
|
s3c2410_gpio_setpin(S3C2410_GPD8, 1);
|
|
msleep(100);
|
|
*/
|
|
}
|
|
else if(((arg & ADC_PM_WIFI) >> 2)==2){
|
|
printk("ADC_PM_WIFI, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_WIFI, 3 do nothing\n");
|
|
}
|
|
|
|
//Audio ok
|
|
if(((arg & ADC_PM_AUDIO) >> 4)==0){
|
|
printk("ADC_PM_AUDIO, 0\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB10, S3C2410_GPB10_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB10, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE0, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE1, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE2, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE3, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE4, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF4, 0);
|
|
#ifdef CONFIG_QISDA_AS090B00_EVT1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG3, 0);
|
|
#endif
|
|
#if defined(CONFIG_QISDA_AS090B00_EVT1_1)|| defined (CONFIG_QISDA_QD090B00_EVT1) || defined(CONFIG_QISDA_QD060N00_DVT1_1)
|
|
s3c2410_gpio_cfgpin(S3C2410_GPA1, S3C2410_GPA1_OUT); //s02 ????S3C2410_GPA1_OUT
|
|
s3c2410_gpio_setpin(S3C2410_GPA1, 0);
|
|
#endif
|
|
|
|
}
|
|
else if(((arg & ADC_PM_AUDIO) >> 4)==1){
|
|
printk("ADC_PM_AUDIO, 1\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB10, S3C2410_GPB10_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB10, 1);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_EINT4);
|
|
s3c2410_gpio_pullup(S3C2410_GPF4, 2);
|
|
#ifdef CONFIG_QISDA_AS090B00_EVT1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_OUTP); //s01
|
|
s3c2410_gpio_setpin(S3C2410_GPG3, 1);
|
|
#endif
|
|
#if defined(CONFIG_QISDA_AS090B00_EVT1_1) || defined (CONFIG_QISDA_QD090B00_EVT1) || defined(CONFIG_QISDA_QD060N00_DVT1_1)
|
|
s3c2410_gpio_cfgpin(S3C2410_GPA1, S3C2410_GPA1_OUT); //s02 ????S3C2410_GPA1_OUT
|
|
s3c2410_gpio_setpin(S3C2410_GPA1, 1);
|
|
#endif
|
|
}
|
|
else if(((arg & ADC_PM_AUDIO) >> 4)==2){
|
|
printk("ADC_PM_AUDIO, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_AUDIO, 3 do nothing\n");
|
|
}
|
|
|
|
|
|
//SD ok
|
|
if(((arg & ADC_PM_SD) >> 6)==0){
|
|
printk("ADC_PM_SD, 0\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG2, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE5, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE6, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE7, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE8, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE9, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE10, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF1, 0);
|
|
|
|
}
|
|
else if(((arg & ADC_PM_SD) >> 6)==1){
|
|
printk("ADC_PM_SD, 1\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG2, S3C2410_GPG2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG2, 1);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2450_GPE5_SD0_CLK);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2450_GPE6_SD0_CMD);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2450_GPE7_SD0_DAT0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2450_GPE8_SD0_DAT1);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2450_GPE9_SD0_DAT2);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2450_GPE10_SD0_DAT3);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_EINT1);
|
|
s3c2410_gpio_setpin(S3C2410_GPF1, 0);
|
|
}
|
|
else if(((arg & ADC_PM_SD) >> 6)==2){
|
|
printk("ADC_PM_SD, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_SD, 3 do nothing\n");
|
|
}
|
|
|
|
//TCON ivan interface ok
|
|
if(((arg & ADC_PM_TCON) >> 8)==0){
|
|
//power and signal
|
|
printk("ADC_PM_TCON, 0\n");
|
|
//AUO T-CON Standby
|
|
Epaper_Enter_Standby_Mode(1);
|
|
//AUO T-CON Sleep
|
|
Epaper_Enter_Sleep_Mode(1);
|
|
msleep(250);
|
|
//Shutdown T-CON Power
|
|
Epaper_Power(0);
|
|
//Shutdown i80 of s3c
|
|
EPaper_CloseLcdPort();
|
|
msleep(1000);
|
|
}
|
|
else if(((arg & ADC_PM_TCON) >> 8)==1){
|
|
//power and signal
|
|
printk("ADC_PM_TCON, 1\n");
|
|
Epaper_SetLcdPort();
|
|
msleep(100); //sleep for RST_N pull high
|
|
}
|
|
else if(((arg & ADC_PM_TCON) >> 8)==2){
|
|
printk("ADC_PM_TCON, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_TCON, 3 do nothing\n");
|
|
}
|
|
|
|
//USB ok
|
|
if(((arg & ADC_PM_USB) >> 10)==0){
|
|
printk("ADC_PM_USB, 0\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPD13, S3C2410_GPD13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPD13, 0); /* usb power enbale */
|
|
s3c2410_gpio_cfgpin(S3C2443_GPH14, S3C2443_GPH14_OUTP);
|
|
s3c2410_gpio_setpin(S3C2443_GPH14, 0);
|
|
}
|
|
else if(((arg & ADC_PM_USB) >> 10)==1){
|
|
printk("ADC_PM_USB, 1\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPD13, S3C2410_GPD13_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPD13, 1); /* usb power enbale */
|
|
s3c2410_gpio_cfgpin(S3C2443_GPH14, S3C2443_GPH14_OUTP);
|
|
s3c2410_gpio_setpin(S3C2443_GPH14, 1);
|
|
}
|
|
else if(((arg & ADC_PM_USB) >> 10)==2){
|
|
printk("ADC_PM_USB, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_USB, 3 do nothing\n");
|
|
}
|
|
|
|
//Touch GPIO ok, 12~15
|
|
if(((arg & ADC_PM_TOUCH) >> 12)==0){
|
|
printk("ADC_PM_TOUCH, 0\n");
|
|
// s3c2410_gpio_cfgpin(S3C2410_GPB3, S3C2410_GPB3_OUTP);
|
|
// s3c2410_gpio_setpin(S3C2410_GPB3, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF2, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 0);
|
|
}
|
|
else if(((arg & ADC_PM_TOUCH) >> 12)==1){
|
|
//power on
|
|
printk("ADC_PM_TOUCH, 1\n");
|
|
// s3c2410_gpio_cfgpin(S3C2410_GPB3, S3C2410_GPB3_OUTP);
|
|
// s3c2410_gpio_setpin(S3C2410_GPB3, 1);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 1);
|
|
}
|
|
else if(((arg & ADC_PM_TOUCH) >> 12)==2){
|
|
//power on () + touch active mode (touch ioctl)
|
|
printk("ADC_PM_TOUCH, 2 Touch GPIO on and Enter Active\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 1);
|
|
}
|
|
else if(((arg & ADC_PM_TOUCH) >> 12)==3){
|
|
//power on + touch sleep mode (via touch ioctl)
|
|
printk("ADC_PM_TOUCH, 3 Touch GPIO on and Enter Sleep\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 1);
|
|
}
|
|
else if(((arg & ADC_PM_TOUCH) >> 12)==4){
|
|
//power on + touch deep sleep mode (via touch ioctl)
|
|
printk("ADC_PM_TOUCH, 4 Touch GPIO on and Enter Deep sleep\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_INP);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPF5, 1);
|
|
}
|
|
else{
|
|
printk("ADC_PM_TOUCH, 5~15 do nothing\n");
|
|
}
|
|
|
|
//SMART_CARD ok
|
|
if(((arg & ADC_PM_SMART_CARD) >> 16)==0){
|
|
printk("ADC_PM_SMART_CARD, 0\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPC3, S3C2410_GPC3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPC3, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH2, S3C2410_GPH2_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH2, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH3, S3C2410_GPH3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH3, 0);
|
|
}
|
|
else if(((arg & ADC_PM_SMART_CARD) >> 16)==1){
|
|
printk("ADC_PM_SMART_CARD, 1\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPC3, S3C2410_GPC3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPC3, 1);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH2, S3C2410_GPH2_TXD0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH3, S3C2410_GPH3_RXD0);
|
|
}
|
|
else if(((arg & ADC_PM_SMART_CARD) >> 16)==2){
|
|
printk("ADC_PM_SMART_CARD, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_SMART_CARD, 3 do nothing\n");
|
|
}
|
|
|
|
//SMART_CARD ok
|
|
if(((arg & ADC_PM_3G_MODULE) >> 18)==0){
|
|
printk("ADC_PM_3G_MODULE, 0\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG3, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH8, S3C2410_GPH8_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH8, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH9, S3C2410_GPH9_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH9, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH11, S3C2410_GPH11_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH11, 0);
|
|
}
|
|
else if(((arg & ADC_PM_3G_MODULE) >> 18)==1){
|
|
printk("ADC_PM_3G_MODULE, 1\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPG3_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPG3, 1);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH8, S3C2410_GPH8_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH8, 1);
|
|
// s3c2410_gpio_cfgpin(S3C2410_GPH9, S3C2410_GPH9_OUTP);
|
|
// s3c2410_gpio_setpin(S3C2410_GPH9, 0);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH11, S3C2410_GPH11_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPH11, 1);
|
|
}
|
|
else if(((arg & ADC_PM_3G_MODULE) >> 18)==2){
|
|
printk("ADC_PM_3G_MODULE, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_3G_MODULE, 3 do nothing\n");
|
|
}
|
|
|
|
//ADC_PM_I2C ok
|
|
if(((arg & ADC_PM_I2C) >> 20)==0){
|
|
printk("ADC_PM_I2C, 0\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE14, 0); // IICSCL
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPE15, 0); // IICSDA
|
|
}
|
|
else if(((arg & ADC_PM_I2C) >> 20)==1){
|
|
printk("ADC_PM_I2C, 1\n");
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
|
|
}
|
|
else if(((arg & ADC_PM_I2C) >> 20)==2){
|
|
printk("ADC_PM_I2C, 2 do special test\n");
|
|
}
|
|
else{
|
|
printk("ADC_PM_I2C, 3 do nothing\n");
|
|
}
|
|
#endif
|
|
ret = 0;
|
|
break;
|
|
#ifdef CONFIG_PM_CPU_MODE
|
|
case ADC_SET_CPU_PM_MODE:
|
|
// 0 ADC_CPU_DEVICE_SLEEP:
|
|
// 1 ADC_CPU_STOP:
|
|
// 2 ADC_CPU_DEEP_STOP:
|
|
// 3 ADC_CPU_IDLE:
|
|
// 4 ADC_CPU_SLEEP:
|
|
pm_cpu_mode = (unsigned char) arg;
|
|
// s3c2410_sleep_enter();
|
|
printk("cpu_pm_mode parameter = %d\n", pm_cpu_mode);
|
|
ret = 0;
|
|
break;
|
|
#endif
|
|
case ADC_READ_WAKEUP_SOURCE:
|
|
data_mask = readl(S3C2443_WKUPSTAT);
|
|
printk("Wakeup source =0x%08lx\n", data_mask);
|
|
ret = 0;
|
|
break;
|
|
case ADC_READ_POWER_FAIL_STATUS:
|
|
data_mask = readl(S3C2410_GPGDAT) & (1<<5);
|
|
printk("ADC_READ_POWER_FAIL_STATUS GPG5 = %d\n", data_mask);
|
|
ret = put_user(data_mask, (unsigned long __user *)arg);
|
|
break;
|
|
default:
|
|
ret = -ENOIOCTLCMD;
|
|
break;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static struct file_operations s3c_adc_fops = {
|
|
.owner = THIS_MODULE,
|
|
.read = s3c_adc_read,
|
|
.open = s3c_adc_open,
|
|
.ioctl = s3c_adc_ioctl,
|
|
};
|
|
|
|
static struct miscdevice s3c_adc_miscdev = {
|
|
.minor = ADC_MINOR,
|
|
.name = "adc",
|
|
.fops = &s3c_adc_fops,
|
|
};
|
|
|
|
|
|
/*
|
|
* The functions for inserting/removing us as a module.
|
|
*/
|
|
|
|
static int __init s3c_adc_probe(struct platform_device *pdev)
|
|
{
|
|
int ret;
|
|
printk(KERN_INFO "s3c_adc_probe\n");
|
|
adc_clock = clk_get(NULL, "adc");
|
|
if (!adc_clock) {
|
|
printk(KERN_ERR "failed to get adc clock source\n");
|
|
return -ENOENT;
|
|
}
|
|
clk_enable(adc_clock);
|
|
|
|
base_addr=ioremap(S3C24XX_PA_ADC, 0x20);
|
|
|
|
if (base_addr == NULL) {
|
|
printk(KERN_ERR "Failed to remap register block\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
if ((s3c_adc_cfg.presc&0xff) > 0)
|
|
writel(S3C2410_ADCCON_PRSCEN | S3C2410_ADCCON_PRSCVL(s3c_adc_cfg.presc&0xFF), base_addr+S3C2410_ADCCON);
|
|
else
|
|
writel(0, base_addr+S3C2410_ADCCON);
|
|
|
|
/* Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status {*/
|
|
#ifdef ADC_TEST //open for debug
|
|
tmp = readl(base_addr+S3C2410_ADCCON);
|
|
printk("tmp = %04X!\n", tmp);
|
|
tmp = tmp | 0x0080;
|
|
printk("tmp = %04X!\n", tmp);
|
|
writel(tmp, base_addr+S3C2410_ADCCON);
|
|
#endif
|
|
/* Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status }*/
|
|
|
|
/* Initialise registers */
|
|
if ((s3c_adc_cfg.delay&0xffff) > 0)
|
|
writel(s3c_adc_cfg.delay & 0xffff, base_addr+S3C2410_ADCDLY);
|
|
|
|
ret = misc_register(&s3c_adc_miscdev);
|
|
if (ret) {
|
|
printk (KERN_ERR "cannot register miscdev on minor=%d (%d)\n",
|
|
ADC_MINOR, ret);
|
|
return ret;
|
|
}
|
|
|
|
printk(KERN_INFO "S3C ADC driver successfully probed !\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int s3c_adc_remove(struct device *dev)
|
|
{
|
|
printk(KERN_INFO "s3c_adc_remove() of TS called !\n");
|
|
return 0;
|
|
}
|
|
|
|
|
|
#define s3c_adc_suspend NULL
|
|
#define s3c_adc_resume NULL
|
|
|
|
static struct platform_driver s3c_adc_driver = {
|
|
.probe = s3c_adc_probe,
|
|
.remove = s3c_adc_remove,
|
|
.suspend = s3c_adc_suspend,
|
|
.resume = s3c_adc_resume,
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "s3c2410-adc",
|
|
},
|
|
};
|
|
|
|
static char banner[] __initdata = KERN_INFO "S3C ADC driver, (c) 2007 Samsung Electronics\n";
|
|
|
|
int __init s3c_adc_init(void)
|
|
{
|
|
int ireturn = 0;
|
|
int read_pin = -99;
|
|
int i = 0;
|
|
printk(banner);
|
|
ireturn = platform_driver_register(&s3c_adc_driver);
|
|
#ifdef CONFIG_QISDA_AS090B00_EVT1
|
|
/* Qisda, ShiYong Lin, 2009/09/12, Indication for /PGOOD pin {*/
|
|
s3c2410_gpio_cfgpin(S3C2410_GPH5, 0);
|
|
s3c2410_gpio_pullup(S3C2410_GPH5, 2);
|
|
/* Qisda, ShiYong Lin, 2009/09/12, Indication for /PGOOD pin }*/
|
|
#endif
|
|
|
|
/* Qisda, ShiYong Lin, 2009/10/27, Modify for exception in IsWallCharger function {*/
|
|
/* Qisda, ShiYong Lin, 2009/09/29, Set En1 and En2 {*/
|
|
for(i=0;i<10;++i)
|
|
{
|
|
read_pin = readl(S3C2410_GPGDAT) & (1<<1);
|
|
if(read_pin != 0){
|
|
if(IsWallCharger()==0){
|
|
charging_source = 0;
|
|
//EN2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPB0_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB0, 0);
|
|
//EN1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB4, 1);
|
|
}
|
|
else
|
|
{
|
|
charging_source = 1;
|
|
//EN2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPB0_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB0, 1);
|
|
//EN1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB4, 0);
|
|
}
|
|
}
|
|
else{
|
|
charging_source = 2;
|
|
//EN2
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPB0_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB0, 0);
|
|
//EN1
|
|
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP);
|
|
s3c2410_gpio_setpin(S3C2410_GPB4, 1);
|
|
}
|
|
}
|
|
/*}, Qisda, ShiYong Lin, 2009/09/29, Set En1 and En2 */
|
|
/*}, Qisda, ShiYong Lin, 2009/10/27, Modify for exception in IsWallCharger function */
|
|
|
|
/* Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status {*/
|
|
#ifdef ADC_TEST
|
|
{
|
|
int i=0;
|
|
for(i=0; i<10 ;i++)
|
|
{
|
|
udelay(1000);
|
|
s3c_adc_read();
|
|
}
|
|
printk("Read ADC times = %d\n",i);
|
|
}
|
|
#else
|
|
s3c_adc_read();
|
|
#endif
|
|
/*}, Qisda, ShiYong Lin, 2009/07/18, ADC and Battery Status */
|
|
return ireturn;
|
|
}
|
|
|
|
void __exit s3c_adc_exit(void)
|
|
{
|
|
platform_driver_unregister(&s3c_adc_driver);
|
|
}
|
|
|
|
module_init(s3c_adc_init);
|
|
module_exit(s3c_adc_exit);
|
|
|
|
MODULE_AUTHOR("alinuxguy@samsung.com>");
|
|
MODULE_DESCRIPTION("s3c adc driver");
|
|
MODULE_LICENSE("GPL");
|