264 lines
7.5 KiB
C
264 lines
7.5 KiB
C
/* ------------------------------------------------------------------------- */
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/* */
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/* spi-s3c6400.h - definitions of s3c6400 specific spi interface */
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/* */
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/* ------------------------------------------------------------------------- */
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/* Copyright (C) 2006 Samsung Electronics Co. ltd.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* ------------------------------------------------------------------------- */
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#ifndef _S3C2443_SPI_H
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#define _S3C2443_SPI_H
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#include <asm/dma.h>
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#include <asm/arch/dma.h>
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#define S3C_DCON_HANDSHAKE (1<<31)
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#define S3C_DCON_SYNC_PCLK (0<<30)
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//#define SPI_CHANNEL 1
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#if(SPI_CHANNEL==0)
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/* SPI CHANNEL 0 */
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#define S3C_SPI_TX_DATA_REG 0x52000018 //SPI TX data
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#define S3C_SPI_RX_DATA_REG 0x5200001C //SPI RX data
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#else
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/* SPI CHANNEL 1 */
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#define S3C_SPI_TX_DATA_REG 0x59000018 //SPI TX data
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#define S3C_SPI_RX_DATA_REG 0x5900001C //SPI RX data
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#endif
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/* DMA channel to be used for the SPI interface. */
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#define S3C_SPI_DMA 0
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/* DMA transfer unit (byte). */
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#define S3C_DMA_XFER_BYTE 1
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#define S3C_DMA_XFER_WORD 4
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/* DMA configuration setup byte. */
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#define S3C_DCON_SPI1 (S3C_DCON_HANDSHAKE | S3C_DCON_SYNC_PCLK)
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/* DMA hardware configuration mode (DISRCC register). */
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#define S3C_SPI1_DMA_HWCFG 3
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#define S3C_SPI_DMA_HWCFG 3
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#define DMA_BUFFER_SIZE 1500
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/* spi controller state */
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int req_dma_flag = 1;
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enum s3c_spi_state {
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STATE_IDLE,
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STATE_XFER_TX,
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STATE_XFER_RX,
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STATE_STOP
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};
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/* vivek, 2009-05-14 11:01 Notes: define clients for dma read and write channels*/
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//static struct s3c2410_dma_client s3c2443spi_dma_client = {
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// .name = "s3c2443-spi-dma",
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//};
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static struct s3c2410_dma_client s3c2443spi_dma_clientw = {
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.name = "s3c2443-spi-dmaw",
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};
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static struct s3c2410_dma_client s3c2443spi_dma_clientr = {
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.name = "s3c2443-spi-dmar",
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};
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struct s3c_spi {
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spinlock_t lock;
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struct semaphore sem;
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int nr;
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int dma;
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/* vivek, 2009-05-14 10:45 Notes: define dmar and dmaw for both write and read channels*/
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int dmar;
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int dmaw;
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u_int subchannel;/* user fragment index */
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dma_addr_t dmabuf_addr;
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struct spi_msg *msg;
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unsigned int msg_num;
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unsigned int msg_idx;
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unsigned int msg_ptr;
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unsigned int msg_rd_ptr;
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enum s3c_spi_state state;
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void __iomem *regs;
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struct clk *clk;
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struct device *dev;
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struct resource *irq;
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struct resource *ioarea;
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struct spi_dev spidev;
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/* GeorgeKuo: */
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struct completion comp;
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};
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typedef unsigned char int8;
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typedef signed short int16;
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typedef signed int int32;
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typedef unsigned char uchar;
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//typedef unsigned short ushort;
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//typedef unsigned int uint;
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//typedef unsigned long ulong;
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typedef unsigned char uint8;
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typedef unsigned short uint16;
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typedef unsigned int uint32;
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#define BCM_MEM_FILENAME_LEN 24
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typedef void (*pktfree_cb_fn_t)(void *ctx, void *pkt, unsigned int status);
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typedef struct {
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bool pkttag;
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uint pktalloced;
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bool mmbus;
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pktfree_cb_fn_t tx_fn;
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void *tx_ctx;
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} osl_pubinfo_t;
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typedef struct bcm_mem_link {
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struct bcm_mem_link *prev;
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struct bcm_mem_link *next;
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uint size;
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int line;
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char file[BCM_MEM_FILENAME_LEN];
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} bcm_mem_link_t;
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struct osl_info {
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osl_pubinfo_t pub;
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uint magic;
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void *pdev;
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uint malloced;
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uint failed;
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uint bustype;
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bcm_mem_link_t *dbgmem_list;
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};
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/* Maximum number of I/O funcs */
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#define SPI_MAX_IOFUNCS 4
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#define NUM_PREV_TRANSACTIONS 16
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/* Error statistics for gSPI */
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struct spierrstats_t {
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uint32 dna; /* The requested data is not available. */
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uint32 rdunderflow; /* FIFO underflow happened due to current (F2, F3) rd command */
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uint32 wroverflow; /* FIFO underflow happened due to current (F1, F2, F3) wr command */
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uint32 f2interrupt; /* OR of all F2 related intr status bits. */
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uint32 f3interrupt; /* OR of all F3 related intr status bits. */
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uint32 f2rxnotready; /* F2 FIFO is not ready to receive data (FIFO empty) */
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uint32 f3rxnotready; /* F3 FIFO is not ready to receive data (FIFO empty) */
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uint32 hostcmddataerr; /* Error in command or host data, detected by CRC/checksum
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* (optional)
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*/
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uint32 f2pktavailable; /* Packet is available in F2 TX FIFO */
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uint32 f3pktavailable; /* Packet is available in F2 TX FIFO */
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uint32 dstatus[NUM_PREV_TRANSACTIONS]; /* dstatus bits of last 16 gSPI transactions */
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uint32 spicmd[NUM_PREV_TRANSACTIONS];
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};
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typedef struct osl_info osl_t;
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typedef void (*sdioh_cb_fn_t)(void *);
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struct sdioh_info {
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uint cfg_bar; /* pci cfg address for bar */
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uint32 caps; /* cached value of capabilities reg */
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void *bar0; /* BAR0 for PCI Device */
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osl_t *osh; /* osh handler */
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void *controller; /* Pointer to SPI Controller's private data struct */
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uint lockcount; /* nest count of spi_lock() calls */
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bool client_intr_enabled; /* interrupt connnected flag */
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bool intr_handler_valid; /* client driver interrupt handler valid */
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sdioh_cb_fn_t intr_handler; /* registered interrupt handler */
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void *intr_handler_arg; /* argument to call interrupt handler */
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bool initialized; /* card initialized */
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uint32 target_dev; /* Target device ID */
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uint32 intmask; /* Current active interrupts */
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void *sdos_info; /* Pointer to per-OS private data */
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uint32 controller_type; /* Host controller type */
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uint8 version; /* Host Controller Spec Compliance Version */
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uint irq; /* Client irq */
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uint32 intrcount; /* Client interrupts */
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uint32 local_intrcount; /* Controller interrupts */
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bool host_init_done; /* Controller initted */
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bool card_init_done; /* Client SDIO interface initted */
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bool polled_mode; /* polling for command completion */
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bool sd_use_dma; /* DMA on CMD53 */
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bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */
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/* Must be on for sd_multiblock to be effective */
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bool use_client_ints; /* If this is false, make sure to restore */
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/* polling hack in wl_linux.c:wl_timer() */
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int adapter_slot; /* Maybe dealing with multiple slots/controllers */
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int sd_mode; /* SD1/SD4/SPI */
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int client_block_size[SPI_MAX_IOFUNCS]; /* Blocksize */
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uint32 data_xfer_count; /* Current transfer */
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uint16 card_rca; /* Current Address */
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uint8 num_funcs; /* Supported funcs on client */
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uint32 card_dstatus; /* 32bit device status */
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uint32 com_cis_ptr;
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uint32 func_cis_ptr[SPI_MAX_IOFUNCS];
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void *dma_buf;
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ulong dma_phys;
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int r_cnt; /* rx count */
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int t_cnt; /* tx_count */
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uint32 wordlen; /* host processor 16/32bits */
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uint32 prev_fun;
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uint32 chip;
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uint32 chiprev;
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bool resp_delay_all;
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bool dwordmode;
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struct spierrstats_t spierrstats;
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};
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typedef struct sdioh_info sdioh_info_t;
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void spi_sendrecv(sdioh_info_t *sd, uint8 *msg_out, uint8 *msg_in, int msglen);
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void ClearSourcePenging(void);
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void ClearIntrPenging(void);
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void S3cEnableIntr(void);
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void S3cDisableIntr(void);
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#endif /* _S3C6400_SPI_H */
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