167 lines
5.7 KiB
C
167 lines
5.7 KiB
C
/*
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* wm8580.h -- audio driver for WM8580
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*
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* Copyright 2008 Samsung Electronics.
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* Author: Ryu Euiyoul
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* ryu.real@gmail.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef _WM8580_H
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#define _WM8580_H
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#define WM8580_PLLA 1
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#define WM8580_PLLB 2
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#define WM8580_MCLK 1
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#define WM8580_DAC_CLKSEL 2
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#define WM8580_CLKOUTSRC 3
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#define WM8580_CLKSRC_MCLK 1
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#define WM8580_CLKSRC_PLLA 2
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#define WM8580_CLKSRC_PLLB 3
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#define WM8580_CLKSRC_OSC 4
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#define WM8580_CLKSRC_NONE 5
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/* WM8580 register space */
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#define WM8580_PLLA1 0x00
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#define WM8580_PLLA2 0x01
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#define WM8580_PLLA3 0x02
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#define WM8580_PLLA4 0x03
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#define WM8580_PLLB1 0x04
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#define WM8580_PLLB2 0x05
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#define WM8580_PLLB3 0x06
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#define WM8580_PLLB4 0x07
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#define WM8580_CLKSEL 0x08
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#define WM8580_PAIF1 0x09
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#define WM8580_PAIF2 0x0A
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#define WM8580_SAIF1 0x0B
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#define WM8580_PAIF3 0x0C
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#define WM8580_PAIF4 0x0D
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#define WM8580_SAIF2 0x0E
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#define WM8580_DAC_CONTROL1 0x0F
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#define WM8580_DAC_CONTROL2 0x10
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#define WM8580_DAC_CONTROL3 0x11
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#define WM8580_DAC_CONTROL4 0x12
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#define WM8580_DAC_CONTROL5 0x13
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#define WM8580_DIGITAL_ATTENUATION_DACL1 0x14
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#define WM8580_DIGITAL_ATTENUATION_DACR1 0x15
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#define WM8580_DIGITAL_ATTENUATION_DACL2 0x16
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#define WM8580_DIGITAL_ATTENUATION_DACR2 0x17
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#define WM8580_DIGITAL_ATTENUATION_DACL3 0x18
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#define WM8580_DIGITAL_ATTENUATION_DACR3 0x19
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#define WM8580_MASTER_DIGITAL_ATTENUATION 0x1C
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#define WM8580_ADC_CONTROL1 0x1D
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#define WM8580_SPDTXCHAN0 0x1E
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#define WM8580_SPDTXCHAN1 0x1F
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#define WM8580_SPDTXCHAN2 0x20
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#define WM8580_SPDTXCHAN3 0x21
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#define WM8580_SPDTXCHAN4 0x22
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#define WM8580_SPDTXCHAN5 0x23
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#define WM8580_SPDMODE 0x24
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#define WM8580_INTMASK 0x25
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#define WM8580_GPO1 0x26
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#define WM8580_GPO2 0x27
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#define WM8580_GPO3 0x28
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#define WM8580_GPO4 0x29
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#define WM8580_GPO5 0x2A
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#define WM8580_INTSTAT 0x2B
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#define WM8580_SPDRXCHAN1 0x2C
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#define WM8580_SPDRXCHAN2 0x2D
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#define WM8580_SPDRXCHAN3 0x2E
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#define WM8580_SPDRXCHAN4 0x2F
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#define WM8580_SPDRXCHAN5 0x30
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#define WM8580_SPDSTAT 0x31
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#define WM8580_PWRDN1 0x32
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#define WM8580_PWRDN2 0x33
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#define WM8580_READBACK 0x34
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#define WM8580_RESET 0x35
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/* PLLB4 (register 7h) */
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#define WM8580_PLLB4_MCLKOUTSRC_MASK 0x60
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#define WM8580_PLLB4_MCLKOUTSRC_PLLA 0x20
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#define WM8580_PLLB4_MCLKOUTSRC_PLLB 0x40
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#define WM8580_PLLB4_MCLKOUTSRC_OSC 0x60
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#define WM8580_PLLB4_CLKOUTSRC_MASK 0x180
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#define WM8580_PLLB4_CLKOUTSRC_PLLACLK 0x080
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#define WM8580_PLLB4_CLKOUTSRC_PLLBCLK 0x100
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#define WM8580_PLLB4_CLKOUTSRC_OSCCLK 0x180
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/* CLKSEL (register 8h) */
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#define WM8580_CLKSEL_DAC_CLKSEL_MASK 0x03
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#define WM8580_CLKSEL_DAC_CLKSEL_PLLA 0x01
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#define WM8580_CLKSEL_DAC_CLKSEL_PLLB 0x02
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/* AIF control 1 (registers 9h-bh) */
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#define WM8580_AIF_RATE_MASK 0x7
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#define WM8580_AIF_RATE_128 0x0
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#define WM8580_AIF_RATE_192 0x1
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#define WM8580_AIF_RATE_256 0x2
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#define WM8580_AIF_RATE_384 0x3
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#define WM8580_AIF_RATE_512 0x4
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#define WM8580_AIF_RATE_768 0x5
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#define WM8580_AIF_RATE_1152 0x6
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#define WM8580_AIF_BCLKSEL_MASK 0x18
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#define WM8580_AIF_BCLKSEL_64 0x00
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#define WM8580_AIF_BCLKSEL_128 0x08
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#define WM8580_AIF_BCLKSEL_256 0x10
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#define WM8580_AIF_BCLKSEL_SYSCLK 0x18
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#define WM8580_AIF_MS 0x20
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#define WM8580_AIF_CLKSRC_MASK 0xc0
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#define WM8580_AIF_CLKSRC_PLLA 0x40
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#define WM8580_AIF_CLKSRC_PLLB 0x40
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#define WM8580_AIF_CLKSRC_MCLK 0xc0
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/* AIF control 2 (registers ch-eh) */
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#define WM8580_AIF_FMT_MASK 0x03
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#define WM8580_AIF_FMT_RIGHTJ 0x00
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#define WM8580_AIF_FMT_LEFTJ 0x01
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#define WM8580_AIF_FMT_I2S 0x02
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#define WM8580_AIF_FMT_DSP 0x03
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#define WM8580_AIF_LENGTH_MASK 0x0c
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#define WM8580_AIF_LENGTH_16 0x00
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#define WM8580_AIF_LENGTH_20 0x04
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#define WM8580_AIF_LENGTH_24 0x08
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#define WM8580_AIF_LENGTH_32 0x0c
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#define WM8580_AIF_LRP 0x10
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#define WM8580_AIF_BCP 0x20
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/* Powerdown Register 1 (register 32h) */
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#define WM8580_PWRDN1_PWDN 0x001
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#define WM8580_PWRDN1_ALLDACPD 0x040
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/* Powerdown Register 2 (register 33h) */
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#define WM8580_PWRDN2_OSSCPD 0x001
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#define WM8580_PWRDN2_PLLAPD 0x002
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#define WM8580_PWRDN2_PLLBPD 0x004
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#define WM8580_PWRDN2_SPDIFPD 0x008
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#define WM8580_PWRDN2_SPDIFTXD 0x010
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#define WM8580_PWRDN2_SPDIFRXD 0x020
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extern struct snd_soc_codec_device soc_codec_dev_wm8580;
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struct wm8580_setup_data {
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unsigned short i2c_address;
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};
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#define WM8580_DAI_PAIFRX 0
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#define WM8580_DAI_PAIFTX 1
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#define WM8580_DAI_SAIF 2
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extern struct snd_soc_codec_dai wm8580_dai[];
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extern struct snd_soc_codec_device soc_codec_dev_wm8580;
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#endif
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