From 70b4e41f031a3d7c10d11ecf9abc4fabf8ee0e8a Mon Sep 17 00:00:00 2001 From: cuu Date: Fri, 21 Jan 2022 17:21:16 +0800 Subject: [PATCH] add suspend patch --- .../patch/kernel-006-panel.patch | 188 ++++++++++++++++++ 1 file changed, 188 insertions(+) create mode 100644 Code/patch/armbian_build_a06/patch/kernel-006-panel.patch diff --git a/Code/patch/armbian_build_a06/patch/kernel-006-panel.patch b/Code/patch/armbian_build_a06/patch/kernel-006-panel.patch new file mode 100644 index 0000000..08c06a5 --- /dev/null +++ b/Code/patch/armbian_build_a06/patch/kernel-006-panel.patch @@ -0,0 +1,188 @@ +diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +index d0c9610ad..c7a40ee6c 100644 +--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +@@ -243,6 +243,8 @@ struct dw_mipi_dsi_rockchip { + struct dw_mipi_dsi *dmd; + const struct rockchip_dw_dsi_chip_data *cdata; + struct dw_mipi_dsi_plat_data pdata; ++ ++ bool dsi_bound; + }; + + struct dphy_pll_parameter_map { +@@ -752,11 +754,11 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) + &dsi->encoder); + if (mux < 0) + return; +- ++ /* + pm_runtime_get_sync(dsi->dev); + if (dsi->slave) + pm_runtime_get_sync(dsi->slave->dev); +- ++ */ + /* + * For the RK3399, the clk of grf must be enabled before writing grf + * register. And for RK3288 or other soc, this grf_clk must be NULL, +@@ -774,7 +776,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) + + clk_disable_unprepare(dsi->grf_clk); + } +- ++/* + static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) + { + struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder); +@@ -783,12 +785,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) + pm_runtime_put(dsi->slave->dev); + pm_runtime_put(dsi->dev); + } +- ++*/ + static const struct drm_encoder_helper_funcs + dw_mipi_dsi_encoder_helper_funcs = { + .atomic_check = dw_mipi_dsi_encoder_atomic_check, + .enable = dw_mipi_dsi_encoder_enable, +- .disable = dw_mipi_dsi_encoder_disable, ++// .disable = dw_mipi_dsi_encoder_disable, + }; + + static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, +@@ -917,11 +919,16 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, + dw_mipi_dsi_set_slave(dsi->dmd, dsi->slave->dmd); + put_device(second); + } +- ++ ++ pm_runtime_get_sync(dsi->dev); ++ if(dsi->slave) ++ pm_runtime_get_sync(dsi->slave->dev); ++ + ret = clk_prepare_enable(dsi->pllref_clk); + if (ret) { + DRM_DEV_ERROR(dev, "Failed to enable pllref_clk: %d\n", ret); +- return ret; ++// return ret; ++ goto out_pm_runtime; + } + + /* +@@ -933,7 +940,8 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, + ret = clk_prepare_enable(dsi->grf_clk); + if (ret) { + DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); +- return ret; ++// return ret; ++ goto out_pll_clk; + } + + dw_mipi_dsi_rockchip_config(dsi); +@@ -945,16 +953,29 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, + ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); + if (ret) { + DRM_DEV_ERROR(dev, "Failed to create drm encoder\n"); +- return ret; ++// return ret; ++ goto out_pll_clk; + } + + ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder); + if (ret) { + DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret); +- return ret; ++// return ret; ++ goto out_pll_clk; + } ++ ++ dsi->dsi_bound = true; + + return 0; ++out_pll_clk: ++ clk_disable_unprepare(dsi->pllref_clk); ++out_pm_runtime: ++ pm_runtime_put(dsi->dev); ++ if (dsi->slave) ++ pm_runtime_put(dsi->slave->dev); ++ ++ return ret; ++ + } + + static void dw_mipi_dsi_rockchip_unbind(struct device *dev, +@@ -965,10 +986,16 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev, + + if (dsi->is_slave) + return; ++ ++ dsi->dsi_bound = false; + + dw_mipi_dsi_unbind(dsi->dmd); + + clk_disable_unprepare(dsi->pllref_clk); ++ ++ pm_runtime_put(dsi->dev); ++ if (dsi->slave) ++ pm_runtime_put(dsi->slave->dev); + } + + static const struct component_ops dw_mipi_dsi_rockchip_ops = { +@@ -1126,16 +1153,48 @@ static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev) + if (ret != -EPROBE_DEFER) + DRM_DEV_ERROR(dev, + "Failed to probe dw_mipi_dsi: %d\n", ret); +- goto err_clkdisable; ++// goto err_clkdisable; ++ return ret; + } + + return 0; +- ++/* + err_clkdisable: + clk_disable_unprepare(dsi->pllref_clk); + return ret; ++*/ ++} ++ ++static int __maybe_unused dw_mipi_dsi_rockchip_resume(struct device *dev) ++{ ++ struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev); ++ int ret; ++ ++ /* ++ * Re-configure DSI state, if we were previously initialized. We need ++ * to do this before rockchip_drm_drv tries to re-enable() any panels. ++ */ ++ if (dsi->dsi_bound) { ++ ret = clk_prepare_enable(dsi->grf_clk); ++ if (ret) { ++ DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); ++ return ret; ++ } ++ ++ dw_mipi_dsi_rockchip_config(dsi); ++ if (dsi->slave) ++ dw_mipi_dsi_rockchip_config(dsi->slave); ++ ++ clk_disable_unprepare(dsi->grf_clk); ++ } ++ ++ return 0; + } + ++static const struct dev_pm_ops dw_mipi_dsi_rockchip_pm_ops = { ++ SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, dw_mipi_dsi_rockchip_resume) ++}; ++ + static int dw_mipi_dsi_rockchip_remove(struct platform_device *pdev) + { + struct dw_mipi_dsi_rockchip *dsi = platform_get_drvdata(pdev); +@@ -1249,6 +1308,7 @@ struct platform_driver dw_mipi_dsi_rockchip_driver = { + .remove = dw_mipi_dsi_rockchip_remove, + .driver = { + .of_match_table = dw_mipi_dsi_rockchip_dt_ids, ++ .pm = &dw_mipi_dsi_rockchip_pm_ops, + .name = "dw-mipi-dsi-rockchip", + }, + };