mirror of
https://github.com/clockworkpi/DevTerm.git
synced 2025-12-13 02:38:50 +01:00
28 lines
1.3 KiB
Diff
28 lines
1.3 KiB
Diff
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
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index ff43e32a3..180e372e7 100644
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--- a/drivers/mmc/host/sunxi-mmc.c
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+++ b/drivers/mmc/host/sunxi-mmc.c
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@@ -671,7 +671,7 @@ static int sunxi_mmc_finalize_request(struct sunxi_mmc_host *host)
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bool cont_dat_cmd = false;
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if (host->int_sum & SDXC_INTERRUPT_ERROR_BIT) {
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- sunxi_mmc_dump_errinfo(host);
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+// sunxi_mmc_dump_errinfo(host);
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if (((host->ctl_spec_cap & SUNXI_SC_EN_RETRY) && data)\
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|| ((host->ctl_spec_cap & SUNXI_SC_EN_RETRY_CMD) && !data)) {
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host->mrq_retry = mrq;
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diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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index de0629d6d..43dfd8914 100644
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--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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@@ -545,7 +545,8 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl,
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raw_spin_lock_irqsave(&pctl->lock, flags);
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reg = readl(pctl->membase + PIO_POW_MOD_SEL_REG);
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reg &= ~(1 << bank);
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- writel(reg | val << bank, pctl->membase + PIO_POW_MOD_SEL_REG);
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+ //writel(reg | val << bank, pctl->membase + PIO_POW_MOD_SEL_REG);
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+ writel(0x00000040, pctl->membase + PIO_POW_MOD_SEL_REG);
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raw_spin_unlock_irqrestore(&pctl->lock, flags);
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if (pctl->desc->io_bias_cfg_variant ==
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