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Map slot 1 and 2 to arm7 on boot

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Gericom
2025-12-20 18:36:20 +01:00
parent 61463ca39a
commit 4fd7fde362
1 changed files with 7 additions and 14 deletions
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21
arm9/source/main.cpp
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@@ -218,22 +218,15 @@ static void handleBootCommand()
REG_EXMEMCNT &= ~0x0880; // map ds and gba slot to arm9 REG_EXMEMCNT &= ~0x0880; // map ds and gba slot to arm9
sLoaderPlatform->PrepareRomBoot(sRomDirSector, sRomDirSectorOffset); sLoaderPlatform->PrepareRomBoot(sRomDirSector, sRomDirSectorOffset);
Arm9IoRegisterClearer().ClearNtrIoRegisters(isSdkResetSystem); Arm9IoRegisterClearer().ClearNtrIoRegisters(isSdkResetSystem);
REG_EXMEMCNT |= 0x0880; // map ds and gba slot to arm7
auto ntrRomHeader = (const nds_header_ntr_t*)TWL_SHARED_MEMORY->ntrSharedMem.romHeader; auto ntrRomHeader = (const nds_header_ntr_t*)TWL_SHARED_MEMORY->ntrSharedMem.romHeader;
if (ntrRomHeader->IsTwlRom()) if (gIsDsiMode && ntrRomHeader->IsTwlRom())
{ {
if (gIsDsiMode) Arm9IoRegisterClearer().ClearTwlIoRegisters();
{ REG_SCFG_EXT = 0x8307F100;
Arm9IoRegisterClearer().ClearTwlIoRegisters(); scfg_setArm9Clock(ScfgArm9Clock::Twl134MHz);
REG_SCFG_EXT = 0x8307F100; REG_SCFG_CLK = 0x87;
scfg_setArm9Clock(ScfgArm9Clock::Twl134MHz); REG_SCFG_RST = 1;
REG_SCFG_CLK = 0x87;
REG_SCFG_RST = 1;
}
auto twlRomHeader = (const nds_header_twl_t*)TWL_SHARED_MEMORY->twlRomHeader;
if (twlRomHeader->IsDsiWare())
{
REG_EXMEMCNT |= 0x0880; // map ds and gba slot to arm7
}
} }
bootArm9(); bootArm9();
} }