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Add support for the SuperChis (#138)
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@@ -0,0 +1,81 @@
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.cpu arm7tdmi
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.syntax unified
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#include "SuperCardLiteAddresses.h"
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.section "sclite_sd_command_drop", "ax"
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@ void sclite_sdCommandAndDropResponse6(uint32_t dummy, uint32_t argument, SD_COMMANDS command)
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@ command is passed in r2, in r6 is the pointer to sccmn_sdSendClock10
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BEGIN_THUMB_FUNCTION sclite_sdCommandAndDropResponse6
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push {lr}
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cmp r2, #0x52
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@ if command is READ_MULTIPLE_BLOCK, don't send extra clock cycles
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beq 1f
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@ we need to call sccmn_sdSendClock10 after the command is sent, push sccmn_sdSendClock10 and the lr to the stack
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push {r6}
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1:
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@ among the pushed registers there are the command and
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@ argument one, which are then used at the loop to
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@ send the sd command
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push {r1-r7}
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@ loads reg_scsd_cmd
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movs r7, #0x98
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lsls r7, r7, #20
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@ while(*r7 & 0x01) == 0
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SDCommand_loop:
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ldrh r0, [r7]
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lsrs r0, r0, #1
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bcc SDCommand_loop
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@ perform an extra read
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ldrh r0, [r7]
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@ loads sd_buff_bit_addr
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movs r1, #0x94
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lsls r1, r1, #20
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@ lower halfword is 0
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strh r1, [r1]
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@ loads sd_dataadd + sd_command_bit + sd_rw4
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movs r1, #0x9A
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lsls r1, r1, #20
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@ the command buffer starts at sp+4 (r1 and r2) since this loop starts with offset 5
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@ decrement the value of the stack pointer address used by 1
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mov r4,sp
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movs r3, #4
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write_SDCommand_loop:
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ldrb r0, [r4, r3]
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lsls r2, r0, #20
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adds r2, r2, r0
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str r2, [r1]
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subs r3, r3, #1
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bpl write_SDCommand_loop
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@ loads sd_dataadd + sd_crc_bit + sd_rw4
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movs r1, #0x9B
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lsls r1, r1, #20
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movs r2, #0
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str r2, [r1]
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@ while(*r7 & 0x01) != 0
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SDCommand_loop_2nd:
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ldrh r0, [r7]
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lsrs r0, r0, #1
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bcs SDCommand_loop_2nd
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movs r6, #4
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SDCommand_drop_resp:
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ldmia r7!, {r0-r5}
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subs r6, r6, #1
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bne SDCommand_drop_resp
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@ we pop from the stack r6 as pc, which corresponds to sccmn_sdSendClock10 or lr, if it is sccmn_sdSendClock10 that function
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@ is called, and that function doesn't push a new lr but pops a preexisting one from the stack, which in our case is the
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@ lr provided to this function
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pop {r1-r7,pc}
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.balign 4
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.pool
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