Initial commit

arm9/source/patches/platform/isnitro/IsNitroLoaderPlatform.h

@@ -0,0 +1,35 @@
+#pragma once
+#include "common.h"
+#include "../LoaderPlatform.h"
+#include "IsNitroSdReadAsm.h"
+#include "IsNitroSdWriteAsm.h"
+#include "sharedMemory.h"
+
+/// @brief Implementation of LoaderPlatform for the IS-NITRO-EMULATOR with agb semihosting
+class IsNitroLoaderPlatform : public LoaderPlatform
+{
+public:
+    const SdReadPatchCode* CreateSdReadPatchCode(
+        PatchCodeCollection& patchCodeCollection, PatchHeap& patchHeap) const override
+    {
+        return patchCodeCollection.GetOrAddSharedPatchCode([&]
+        {
+            return new IsNitroSdReadPatchCode(patchHeap, GetAgbRamPtr());
+        });
+    }
+
+    const SdWritePatchCode* CreateSdWritePatchCode(
+        PatchCodeCollection& patchCodeCollection, PatchHeap& patchHeap) const override
+    {
+        return patchCodeCollection.GetOrAddSharedPatchCode([&]
+        {
+            return new IsNitroSdWritePatchCode(patchHeap, GetAgbRamPtr());
+        });
+    }
+
+private:
+    u32 GetAgbRamPtr() const
+    {
+        return *(vu32*)&TWL_SHARED_MEMORY->ntrSharedMem.isDebuggerData[0x1C];
+    }
+};

arm9/source/patches/platform/isnitro/IsNitroSdReadAsm.h

@@ -0,0 +1,24 @@
+#pragma once
+#include "sections.h"
+#include "../SdReadPatchCode.h"
+
+DEFINE_SECTION_SYMBOLS(sdread);
+
+extern "C" void sdread_asm(u32 srcSector, void* dst, u32 sectorCount);
+
+extern u32 sdread_asm_agbRamPtr;
+
+class IsNitroSdReadPatchCode : public SdReadPatchCode
+{
+public:
+    IsNitroSdReadPatchCode(PatchHeap& patchHeap, u32 agbRamPtr)
+        : SdReadPatchCode(SECTION_START(sdread), SECTION_SIZE(sdread), patchHeap)
+    {
+        sdread_asm_agbRamPtr = agbRamPtr;
+    }
+
+    const SdReadFunc GetSdReadFunction() const override
+    {
+        return (const SdReadFunc)GetAddressAtTarget((void*)sdread_asm);
+    }
+};

arm9/source/patches/platform/isnitro/IsNitroSdReadAsm.s

@@ -0,0 +1,95 @@
+.cpu arm7tdmi
+.section "sdread", "ax"
+.syntax unified
+.thumb
+
+// r0 = src sector
+// r1 = dst
+// r2 = sector count
+.global sdread_asm
+.type sdread_asm, %function
+sdread_asm:
+    push {r4-r7,lr}
+
+    ldr r6,= 0x04000200
+    // clear the bottom 8 bits of REG_EXMEMCNT to allow access to the GBA slot
+    // from the arm9 and to set the right timings
+    strb r6, [r6, #4]
+
+sdread_asm_loop:
+    // load the GBA memory address as set by the debug monitor rom
+    ldr r5, sdread_asm_agbRamPtr
+
+    cmp r2, #0
+    beq sdread_asm_done
+
+    movs r3, r2
+    cmp r3, #32
+    blo 1f
+    movs r3, #32
+1:
+    subs r2, r3
+    adds r4, r0, r3
+    push {r2}
+    push {r4}
+    movs r2, r3
+
+    movs r4, #1
+
+    // setup read command
+    lsls r3, r4, #16
+    adds r5, r3 // GBA memory + 0x10000
+    strh r4, [r5, #2] // command = read
+    str r0, [r5, #4] // sector address
+    str r2, [r5, #8] // sector count
+
+    // GBA slot irq bit: 1 << 13
+    lsls r3, r4, #13
+
+    // disable GBA slot irq
+    ldr r0, [r6, #0x10] // REG_IE
+    bics r0, r3
+    str r0, [r6, #0x10] // REG_IE
+
+    // ack GBA slot irq
+    str r3, [r6, #0x14] // REG_IF
+
+    movs r4, #0x55
+    strh r4, [r5] // status = cmd ready to be processed
+
+    // poll for GBA slot irq in REG_IF
+2:
+    ldr r4, [r6, #0x14]  // REG_IF
+    tst r4, r3
+    beq 2b
+
+    // ack GBA slot irq
+    str r3, [r6, #0x14]
+
+    adds r5, #0x20 // data buffer in GBA slot area
+    lsls r0, r2, #5 // sector count * 32; 512 bytes per sector = 32 iterations per sector with 16 bytes copied per iteration
+4:
+    ldmia r5!, {r2,r3,r4,r7}
+    stmia r1!, {r2,r3,r4,r7}
+    subs r0, #1
+    bne 4b
+
+    pop {r0, r2}
+    b sdread_asm_loop
+
+sdread_asm_done:
+    // map back GBA slot to arm7
+    movs r0, #0x80
+    strb r0, [r6, #4]
+
+    pop {r4-r7,pc} // popping pc is safe for armv4t when not switching mode
+
+.balign 4
+
+.global sdread_asm_agbRamPtr
+sdread_asm_agbRamPtr:
+    .word 0
+
+.pool
+
+.end

arm9/source/patches/platform/isnitro/IsNitroSdWriteAsm.h

@@ -0,0 +1,24 @@
+#pragma once
+#include "sections.h"
+#include "../SdWritePatchCode.h"
+
+DEFINE_SECTION_SYMBOLS(sdwrite);
+
+extern "C" void sdwrite_asm(u32 dstSector, const void* src, u32 sectorCount);
+
+extern u32 sdwrite_asm_agbRamPtr;
+
+class IsNitroSdWritePatchCode : public SdWritePatchCode
+{
+public:
+    IsNitroSdWritePatchCode(PatchHeap& patchHeap, u32 agbRamPtr)
+        : SdWritePatchCode(SECTION_START(sdwrite), SECTION_SIZE(sdwrite), patchHeap)
+    {
+        sdwrite_asm_agbRamPtr = agbRamPtr;
+    }
+
+    const SdWriteFunc GetSdWriteFunction() const override
+    {
+        return (const SdWriteFunc)GetAddressAtTarget((void*)sdwrite_asm);
+    }
+};

arm9/source/patches/platform/isnitro/IsNitroSdWriteAsm.s

@@ -0,0 +1,79 @@
+.cpu arm7tdmi
+.section "sdwrite", "ax"
+.syntax unified
+.thumb
+
+// for armv4t, calling code must be thumb
+// r0 = dst sector
+// r1 = src
+// r2 = sector count
+.global sdwrite_asm
+.type sdwrite_asm, %function
+sdwrite_asm:
+    push {r4-r7,lr}
+
+    ldr r6,= 0x04000200
+    // clear the bottom 8 bits of REG_EXMEMCNT to allow access to the GBA slot
+    // and to set the right timings
+    strb r6, [r6, #4]
+
+    // load the GBA memory address as set by the debug monitor rom
+    ldr r5, sdwrite_asm_agbRamPtr
+
+    // setup write command
+    lsrs r3, r6, #10 // 0x10000
+    adds r5, r3 // GBA memory + 0x10000
+    movs r3, #2
+    strh r3, [r5, #2] // command = write
+    str r0, [r5, #4] // sector address
+    str r2, [r5, #8] // sector count
+
+    mov lr, r5
+    adds r5, #0x20 // data buffer in GBA slot area
+    lsls r0, r2, #5 // sector count * 32; 512 bytes per sector = 32 iterations per sector with 16 bytes copied per iteration
+4:
+    ldmia r1!, {r2,r3,r4,r7}
+    stmia r5!, {r2,r3,r4,r7}
+    subs r0, #1
+    bne 4b
+    mov r5, lr
+    
+    // GBA slot irq bit: 1 << 13
+    movs r4, #1
+    lsls r3, r4, #13
+
+    // disable GBA slot irq
+    ldr r0, [r6, #0x10] // REG_IE
+    bics r0, r3
+    str r0, [r6, #0x10] // REG_IE
+
+    // ack GBA slot irq
+    str r3, [r6, #0x14] // REG_IF
+
+    movs r4, #0x55
+    strh r4, [r5] // status = cmd ready to be processed
+
+    // poll for GBA slot irq in REG_IF
+2:
+    ldr r4, [r6, #0x14]  // REG_IF
+    tst r4, r3
+    beq 2b
+
+    // ack GBA slot irq
+    str r3, [r6, #0x14]
+
+    // map back GBA slot to arm7
+    movs r0, #0x80
+    strb r0, [r6, #4]
+
+    pop {r4-r7,pc} // popping pc is safe for armv4t when not switching mode
+
+.balign 4
+
+.global sdwrite_asm_agbRamPtr
+sdwrite_asm_agbRamPtr:
+    .word 0
+
+.pool
+
+.end