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122
docs/developer_guide/hardware_reference/power/decoupling.md
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122
docs/developer_guide/hardware_reference/power/decoupling.md
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@@ -0,0 +1,122 @@
|
||||
## Capacitor Usage
|
||||
|
||||
So far, we already encountered capacitors for many different usages:
|
||||
|
||||
### Load Capacitors
|
||||
|
||||
We have seen load capacitors used with the 2 crystals in the
|
||||
discussion about [CPU][1].
|
||||
|
||||
A quartz crystal always provides both series and parallel resonance,
|
||||
the series resonance being a few kilohertz lower than the parallel
|
||||
one.
|
||||
|
||||
Crystals below 30 MHz like ours are generally operated between series
|
||||
and parallel resonance, which means that the crystal appears as an
|
||||
inductive reactance in operation, this inductance forming a
|
||||
**parallel resonant circuit** with externally connected parallel
|
||||
"load" capacitance. Any small additional capacitance added in parallel
|
||||
with the crystal pulls the frequency lower in the range between the
|
||||
series and parallel resonance frequencies, insuring crystal startup
|
||||
and stable operation.
|
||||
|
||||
For modern circuits, these load capacitors have a typical small value
|
||||
< 20 pF.
|
||||
|
||||
### Bulk Capacitors
|
||||
|
||||
Bulk capacitors are used to prevent a power supply from dropping too
|
||||
far during the periods when current is not available. At the same
|
||||
time, they help to reduce the power supply voltage ripples by
|
||||
smoothing their output voltage.
|
||||
|
||||
Many such capacitors are used at both the input and output of the
|
||||
numerous linear and switched mode power supplies in the [PMIC
|
||||
discussion][2].
|
||||
|
||||
The main bulk capacitor value is generally high (some µF), but there
|
||||
may be smaller parallel capacitors added for stability.
|
||||
|
||||
### Coupling Capacitors
|
||||
|
||||
As you probably know, capacitors are made of 2 parallel conductive
|
||||
electrodes separated by a (thin) isolating dielectric material (even
|
||||
if these electrodes are rolled or layered to reduce the component
|
||||
size). Thus by construction, no DC (Direct Current) can flow from one
|
||||
electrode to the other, but by influence using the electric field, AC
|
||||
(Alternative Current) still can go through. This is how coupling
|
||||
capacitors are used to link 2 circuits while removing any DC bias
|
||||
voltage on one side or the other of the capacitor.
|
||||
|
||||
We use such a coupling capacitor in the [Audio schematic
|
||||
description][3] for feeding the audio power amplifier from the CPU
|
||||
audio output.
|
||||
|
||||
### Filter Capacitors
|
||||
|
||||
We have seen many examples where capacitors are used within passive
|
||||
filter circuits along with resistors or inductors, mainly to remove
|
||||
unwanted frequencies from a power supply or a signal.
|
||||
|
||||
### Decoupling (Bypass) Capacitors
|
||||
|
||||
We use some decoupling capacitors in the [buttons circuit][4].
|
||||
|
||||
Active components such as transistors and chips are connected to their
|
||||
power supplies through conductors featuring a (small) common impedance
|
||||
made up of complex (resistive, capacitive and inductive)
|
||||
value. Because of these parasitic components, a device that suddenly
|
||||
draws some current in spikes will generate a drop in its voltage power
|
||||
supply. If many devices are sharing the same power supply and
|
||||
impedance, the state of one device will be coupled to the other ones
|
||||
through the common impedance of the power supply conductors and may
|
||||
affect their operation.
|
||||
|
||||
In order to decouple the devices, capacitors placed as close as
|
||||
possible to the device power supply input pins are used, which act as
|
||||
local energy storage. These capacitors are also named "bypass
|
||||
capacitors" as they shunt transient energy from the power supplies
|
||||
past the device to be decoupled, right to the GND return path.
|
||||
|
||||
There may be different capacitors values placed on the same power
|
||||
supply pins in order to filter transients at different frequencies:
|
||||
the bigger the capacitor value, the lower the frequency. A typical
|
||||
value is 100 nF, and values from 1 µF to 10 µF are used for lower
|
||||
frequencies and / or higher current draws, while lower values of a few
|
||||
nF are used for filtering higher frequencies.
|
||||
|
||||
In essence, decoupling capacitors are not very different in their
|
||||
function from bulk capacitors: the only difference is one of scale,
|
||||
both of current and of transient duration. Bulk capacitors deal with
|
||||
large currents and periods of 10s of ms, whereas decoupling capacitors
|
||||
are used for much lower currents and much briefer periods (typically
|
||||
10s of ns for TTL or CMOS devices) .
|
||||
|
||||
## Schematics
|
||||
|
||||
The last part of the FunKey schematics merely contains only decoupling
|
||||
capacitors:
|
||||
|
||||
{.lightbox}
|
||||
|
||||
One exception is the Allwinner V3s CPU HPR/HPL circuit which features
|
||||
an RC-to-ground circuit between the amplifier and the preamplifier
|
||||
input with the resistor **R27** and capacitors **C79** and **C81**, as
|
||||
recommended in the [V3s hardware design guide][5].
|
||||
|
||||
The only other remarkable point left in this schematic is the resistor
|
||||
divider **R25**/**R28** which provides a reference voltage at half the
|
||||
DRAM power supply voltage level, which is used for the integrated DDR2
|
||||
DRAM merged drivers and dynamic on-chip termination already discussed
|
||||
at the end of the previous [CPU schematic description][6].
|
||||
|
||||
[1]: /developers/hardware/cpu
|
||||
[2]: /developers/hardware/power/pmic
|
||||
[3]: /developers/hardware/audio
|
||||
[4]: /developers/hardware/buttons
|
||||
[5]: https://github.com/Squonk42/V3s_Documentation/blob/master/V3s%20hardware%20design%20guide%20V1.0_20150519%20EN%20Non%20Official.pdf
|
||||
[6]: /developers/hardware/cpu
|
||||
|
||||
--8<--
|
||||
includes/glossary.md
|
||||
--8<--
|
||||
46
docs/developer_guide/hardware_reference/power/dram_power.md
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46
docs/developer_guide/hardware_reference/power/dram_power.md
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@@ -0,0 +1,46 @@
|
||||
A separate [Sylergy SY8088][1] Buck DC/DC SMPS chip is used to provide
|
||||
the DDR2 +1V8 DDR2 DRAM power.
|
||||
|
||||
This is because the AXP20x is originally the PMU (Power Management
|
||||
Unit) used by most Allwinner SoCs (A10, A13 and A20), which do not
|
||||
integrate SDRAM, so the board designer has a wide choice of memory
|
||||
option: DDR2, DDR3, DDR3L, LPDDR3, LPDDR4 with various voltage
|
||||
requirements.
|
||||
|
||||
But no specific PMIC was created for the Allwinner V3s used in the
|
||||
FunKey device which however integrates a fixed SiP (System In Package)
|
||||
512Mbit (64MB) DDR2 SDRAM.
|
||||
|
||||
We thus have to design a separate SMPS (DC-DC) power supply for
|
||||
providing the +1.8V 1A required for the DDR2 DRAM power supply.
|
||||
|
||||
For this purpose, we followed closely the [Allwinner Reference
|
||||
Design][2].
|
||||
|
||||
Here is the corresponding DRAM Power schematics:
|
||||
|
||||
{.lightbox}
|
||||
|
||||
Nothing very fancy here: the SMPS chip **U4** has its required input
|
||||
filter capacitor **C37** and output capacitors **C65** and **C73**.
|
||||
|
||||
The low-profile ferrite-core power inductor **L6** (rated with a
|
||||
saturation current of 1.76A and low < 0.1 Ω resistance) provides the
|
||||
DC-DC energy storage element.
|
||||
|
||||
The **R20**/**R23** precision voltage divider provides the required
|
||||
+0.6V feedback voltage from the +1.8V output voltage by having a 1/3
|
||||
resistor ratio.
|
||||
|
||||
The last component is a pull-up resistor **R19** which ties the SMPS
|
||||
chip enable input to its active level permanently. The pull-up voltage
|
||||
is +3.0V (just as in the original reference design), probably as it is
|
||||
the next higher voltage available, in order to limit the current in it
|
||||
to its lowest possible value.
|
||||
|
||||
[1]: https://github.com/FunKey-Project/FunKey-S-Hardware/blob/master/Datasheets/C79313_SY8088AAC_2017-03-29.PDF
|
||||
[2]: https://github.com/Squonk42/V3s_Documentation/blob/master/V3S_CDR_STD_V1_0_20150514.pdf
|
||||
|
||||
--8<--
|
||||
includes/glossary.md
|
||||
--8<--
|
||||
@@ -0,0 +1,113 @@
|
||||
Looking back at the section on the [CPU schematics][1], the **FunKey
|
||||
S** device clearly needs a sophisticated power supply in order to
|
||||
fulfill the CPU power requirements. They are recalled below, along
|
||||
with the maximum current requirements found in the [Allwinner V3s
|
||||
reference design][2] (page 3):
|
||||
|
||||
- +3.3V / 1.2A for the I/O power supply
|
||||
- +3.3V_AO / 30 mA for the Always-On power supply (RTC timer)
|
||||
- +3.0V / 200 mA for the analog power supply
|
||||
- +1.8V / 1A for the DDR2 DRAM power supply
|
||||
- +1.25V / 1.6 A for the core power supply
|
||||
|
||||
But why in the first place are there so many different power supply
|
||||
voltages required?
|
||||
|
||||
## Power Efficiency
|
||||
|
||||
A first answer is: for better power efficiency.
|
||||
|
||||
As P = U x I (Electrical power is the product of voltage level by
|
||||
current intensity), you can reduce power by decreasing the required
|
||||
current or by reducing the operating voltage. Assuming you already do
|
||||
your best to reduce the required current, you can still reduce power
|
||||
by reducing the voltage.
|
||||
|
||||
## Reducing Power Supply Voltage
|
||||
|
||||
### Voltage Drop
|
||||
|
||||
But how far can you go? Over long distance, you have the voltage drop
|
||||
from the conductor linear resistance, but this effect can be neglected
|
||||
for small boards.
|
||||
|
||||
### Noise Margin
|
||||
|
||||
You have inductive and capacitive coupling between conductive wires
|
||||
and planes too, but within a PCB, these coupling only have a limited
|
||||
direct effect on voltage. However, these coupling play a role in that
|
||||
they will pick up external electromagnetic noise from the surroundings
|
||||
and inject it into the circuit.
|
||||
|
||||
And with digital circuits, a critical limit when lowering the
|
||||
operating voltage is the "noise margin" or difference in absolute
|
||||
voltage levels between a logical '0' and logical '1', which determines
|
||||
the maximum amplitude of spurious voltage spikes that a conductor can
|
||||
pick up that will trigger an erroneous logic level change.
|
||||
|
||||
This phenomenon mostly depends on the circuit scale: a long-distance
|
||||
circuit between boards will require higher voltages (typically +12V or
|
||||
+24V) to limit this effect, whereas a circuit between boards a few
|
||||
meters apart or using through-hole chips on the same board wile
|
||||
require a lower voltage (typically +5V like the old Arduinos). Using
|
||||
SMT chips will allow even smaller boards and lower voltages (+3.3V is
|
||||
typical today), and with wires running on the same silicon die, it is
|
||||
possible to go down to +1.2V, given the current technological limits.
|
||||
|
||||
### Voltage Swing
|
||||
|
||||
There are other reasons why you should try to minimize voltages: the
|
||||
core CPU for example needs to run as fast as possible, and lowering
|
||||
its operating voltage will shorten the signal rise and fall duration
|
||||
as the voltage swing is reduced.
|
||||
|
||||
## Other Power Supply Considerations
|
||||
|
||||
Besides reducing the operating voltage, there are other considerations
|
||||
that may push to multiply the number of power supplies in a design:
|
||||
|
||||
### Quiescent Current
|
||||
|
||||
As for power supply used for standby operation providing small
|
||||
currents, a very-low leakage current ("quiescent current") is required
|
||||
as it can no longer be neglected compared to the current required by
|
||||
the light load and even more importantly because this current
|
||||
consumption is permanent.
|
||||
|
||||
### Ripple Voltage
|
||||
|
||||
For sensitive circuits such as ADCs (Analog to Digital Converters) or
|
||||
PLLs (Phase-Locked Loops) which rely on comparing very small voltage
|
||||
differences, a "clean" power supply featuring very low ripple voltage
|
||||
amplitude is required to achieve a good resolution and/or
|
||||
accuracy. This characteristic is only possible to obtain using LDOs
|
||||
and not SMPS, and the figure to pay attention to is then the PSRR
|
||||
(Power Supply Rejection Ratio) or how much a variation in the input
|
||||
voltage will affect the output voltage: the higher, the better! A
|
||||
value > 50 dB is a good starting point.
|
||||
|
||||
## Application to the FunKey Design
|
||||
|
||||
Based on these considerations, it is now clear that each V3s power
|
||||
supply voltage has a good reason to exist:
|
||||
|
||||
- +3.3V / 1.2A is used for powering the I/Os to connect between chips
|
||||
on the board. Given the required current, a SMPS is required for
|
||||
reaching a good efficiency
|
||||
- +3.3V_AO / 30 mA for the Always-On power supply (RTC timer)
|
||||
requires a low quiescent-current, so an LDO is used
|
||||
- +3.0V / 200 mA for the analog power supply also requires an LDO,
|
||||
this time to minimize the ripple voltage
|
||||
- +1.8V / 1A for the DDR2 DRAM power supply: this strange voltage
|
||||
level is typical for DDR2 DRAM memory chips, and is the result of
|
||||
driving the large memory array inside the chip
|
||||
- +1.25V / 1.6 A for powering the CPU core to minimize the voltage
|
||||
swing and increase the possible CPU frequency. Given the required
|
||||
current, a SMPS is required for reaching a good efficiency, too
|
||||
|
||||
[1]: /developers/hardware/cpu#cpu-schematics
|
||||
[2]: https://github.com/Squonk42/V3s_Documentation/blob/master/V3S_CDR_STD_V1_0_20150514.pdf
|
||||
|
||||
--8<--
|
||||
includes/glossary.md
|
||||
--8<--
|
||||
298
docs/developer_guide/hardware_reference/power/pmic.md
Normal file
298
docs/developer_guide/hardware_reference/power/pmic.md
Normal file
@@ -0,0 +1,298 @@
|
||||
From the previous section, we can summarize the V3s power supply
|
||||
requirements to:
|
||||
|
||||
- SMPS for +3.3V / 1.2A for the I/O power supply
|
||||
- LDO for +3.3V_AO / 30 mA for the Always-On power supply (RTC timer)
|
||||
- LDO for +3.0V / 200 mA for the analog power supply
|
||||
- SMPS for +1.8V / 1A for the DDR2 DRAM power supply
|
||||
- SMPS for +1.25V / 1.6 A for the core power supply
|
||||
|
||||
On the [LicheePi Zero board][1] used in our **[FunKey Zero][2]**
|
||||
prototype, a triple SMPS [EA3036][3] is used for generating these
|
||||
+3.3V, +1.8V and +1.2V voltages, with an additional [XC6206][4] LDO
|
||||
for the +3.0V (the +3.3V Always On is connected directly to
|
||||
+3.3V). Although compact (the EA3036 is a tiny 3 mm x 3 mm QFN20
|
||||
package), this solution is not ideal as it does not provide a battery
|
||||
charger and monitoring capability, which is a requirement for the
|
||||
**FunKey S** device.
|
||||
|
||||
## PMICs
|
||||
|
||||
As it is generally the case with such a complex SoC requiring multiple
|
||||
voltages, high current and proper voltage sequencing, all major
|
||||
manufacturers provide dedicated companion chips called PMICs (Power
|
||||
Management Integrated Circuits), in charge of these tasks. Allwinner
|
||||
is not an exception through its sister company [X-Powers][5].
|
||||
|
||||
Their AXP20x products are highly-integrated PMICs that are optimized
|
||||
for applications requiring single-cell Li-battery (Li-Ion/Polymer),
|
||||
multiple output DC-DC converters and LDOs. Here is a block diagram:
|
||||
|
||||
{.lightbox}
|
||||
|
||||
The AXP20x features:
|
||||
|
||||
- A wide choice of input power source, the best source is output as
|
||||
IPSOUT inside the IPS (Intelligent Power Select) block:
|
||||
|
||||
- USB VBUS
|
||||
|
||||
- Battery BAT
|
||||
|
||||
- ACIN wall plug (not used in the **FunKey S**)
|
||||
|
||||
- BACKUP battery (not used in the **FunKey S**)
|
||||
|
||||
- A 1.8A fast PWM battery charger (also called DC/DC1) with battery
|
||||
voltage / current sense and programmable charge indication LED
|
||||
|
||||
- A soft key power-on/off logic with timer (just as in smartphones!)
|
||||
|
||||
- An I2C interface with interrupt signal to communicate with the CPU
|
||||
|
||||
- An optional battery temperature monitoring if the battery is
|
||||
equipped with an NTC resistor (not used in the **FunKey S**)
|
||||
|
||||
- A reference voltage
|
||||
|
||||
- A built-in 12-channel 12 bit ADC that measures various voltages and
|
||||
currents data, as well as feeding an internal Coulomb counter and
|
||||
fuel gauge system (more on this later)
|
||||
|
||||
- A "power OK" output used to generate the global RESET signal for the
|
||||
**FunKey S**
|
||||
|
||||
- 5x GPIOs (not used in the **FunKey S**), GPIO0 can be programmed as
|
||||
LDO5 output
|
||||
|
||||
- 2x DC/DC SMPS DC-DC2 and DC-DC3
|
||||
|
||||
- 5x LDOs (only 2 are used in the **FunKey S**, LDO5 is optionnaly
|
||||
output to GPIO0)
|
||||
|
||||
Looking at their datasheets, it is difficult to tell the difference
|
||||
between the [AXP202][6], [AXP203][7] and [AXP209][8] (any hint
|
||||
welcome!). In the **FunKey S** design, we use an AXP209 because it is
|
||||
the one that comes along with the V3s when you buy it on AliExpress.
|
||||
|
||||
## AXP20x Application Diagram
|
||||
|
||||
For complex dedicated chips like this, the best option is to follow as
|
||||
much as possible the application diagram and reference design given by
|
||||
the manufacturer, as the internals of the chips are seldom fully
|
||||
disclosed, so you need to take their word on some of the external
|
||||
component values to use.
|
||||
|
||||
The [Allwinner V3s Reference Design][9] contains on page 6 the
|
||||
schematics for using an AXP203 to supply the power to a V3s-based
|
||||
dashboard camera design. It follows closely the application diagram
|
||||
provided in the AXP20x datasheets:
|
||||
|
||||
{.lightbox}
|
||||
|
||||
More hints are provided in our self-translated [V3s Hardware Design
|
||||
Guide][10] (page 7) too.
|
||||
|
||||
## PMIC Schematics
|
||||
|
||||
The **FunKey S** device uses all of the **U5** AXP209 integrated SMPS:
|
||||
|
||||
- the PWM charger DC-DC1 for the battery
|
||||
- the DC-DC2 for providing the +1.25 V / 1.6A to the core
|
||||
- the DC-DC3 for providing the +3.3V / 1.2A to the I/Os
|
||||
|
||||
But compared to the sophisticated reference design above, the **FunKey
|
||||
S** device only uses 2 out of the 5 integrated LDOs:
|
||||
|
||||
- LDO1 supplies the +3.3V / 30 mA Always On for the RTC
|
||||
- LDO2 provides the +3.0V / 200 mA for the analog power supply
|
||||
- LDO3 / LDO4 / LDO5 are not used in the **FunKey S**
|
||||
|
||||
Here are the PMIC schematics:
|
||||
|
||||
{.lightbox}
|
||||
|
||||
These schematics may look intimidating and complex, but they are in
|
||||
fact just a collection of simple basic elements, and it is actually
|
||||
very close to the manufacturer-recommended design.
|
||||
|
||||
Here are the details for each PMIC functions, one by one:
|
||||
|
||||
### Power Inputs (East side)
|
||||
|
||||
A wall-plug AC adapter input is not used in the **FunKey S** device,
|
||||
so +VIN is just filtered using C75 on pins 32 and 33.
|
||||
|
||||
The USB power input +VUSB on pin 31 is filtered using **C70**, and the
|
||||
best (between +VUSB and +VBAT) available voltage is output to +VOUT on
|
||||
pins 34 and 35 and filtered using **C78**.
|
||||
|
||||
The BACKUP supply on pin 30 is not used and is left unconnected.
|
||||
|
||||
### Internal Connections (All sides)
|
||||
|
||||
Some AXP20x signals are externally available and should be connected
|
||||
to external components:
|
||||
|
||||
- The BIAS connection on pin 23 is connected to a precision 200k 1%
|
||||
resistor **R22**, as recommended
|
||||
|
||||
- The reference voltage VREF on pin 24 is decoupled with **C64**
|
||||
|
||||
- The +2.5V internal logic voltage VINT on pin 26 is filtered using
|
||||
the recommended value for **C67**
|
||||
|
||||
Additionally, the AXP20x is actually made up of separate flexible
|
||||
blocks that require external interconnections to set their desired
|
||||
operation:
|
||||
|
||||
- All DC/DC inputs (VIN1 on pin 44, VIN2 on pin 7 and VIN3 on pin
|
||||
14), as well as LDO3IN input on pin 40 are connected to the best
|
||||
available voltage +VOUT with filter capacitors **C59**, **C23**,
|
||||
**C30**, and **C69**, respectively
|
||||
|
||||
- LDO1SET on pin 27 is used to set the initial voltage of LDO1, and
|
||||
according to the datasheets, setting it to VINT sets its voltage to
|
||||
the desired +3.3V for the +3.3V Always On power supply
|
||||
|
||||
- OTOH, combined LDO 2 and 4 input LDOIN24 on pin 13 is instead
|
||||
connected to +3.3V in order to minimize the voltage drop for LDO2
|
||||
to generate the +3.0V. Here too, there is a filter capacitor
|
||||
**C34**
|
||||
|
||||
- It is not clear what is the exact function of APS on pin 21 (it is
|
||||
described as "Internal Power Input"), but it must be connected to
|
||||
+VOUT, too
|
||||
|
||||
### DC-DC1 PWM Battery Charger (North East side)
|
||||
|
||||
The battery is connected to J5 (a [2-pin JST 1.0 mm pitch
|
||||
receptacle][11]) and uses **R21** as a precision current sense
|
||||
resistor, with **C53**/**C56**/**C60** filter capacitors and **L5** (a
|
||||
low-profile ferrite-core power inductor rated with a saturation
|
||||
current of 1.2A and low < 0.1 Ω resistance).
|
||||
|
||||
!!! Warning
|
||||
The battery is not protected on the board against reversing
|
||||
polarity, as the model used already contains a built-in
|
||||
protection.
|
||||
|
||||
**R24** is mounted to simulate a battery NTC resistor for measuring
|
||||
temperature, as the chosen LiPo battery does not feature this
|
||||
temperature sensor.
|
||||
|
||||
A user-programmable (through the I2C interface) charge [LED][12]
|
||||
**D30** is provided, with its current-limiting resistor **R26**, as
|
||||
well as a TVS diode **d31** to prevent ESD, as the LED body will be
|
||||
indirectly accessible to user.
|
||||
|
||||
### DC-DC2 +1.25V / 1.6A (West side)
|
||||
|
||||
This SMPS is built around the ferrite core power inductor **L3** and
|
||||
filter capacitors **C26** and **C29**.
|
||||
|
||||
### DC-DC3 +3.3V / 1.2A (South side)
|
||||
|
||||
This SMPS is built around the ferrite core power inductor **L4** and
|
||||
filter capacitors **C39** and **C43**.
|
||||
|
||||
### LDO1 +3.3V Always On 30mA (South East side)
|
||||
|
||||
The LDO output on pin 28 is filtered with capacitor **C72**.
|
||||
|
||||
### LDO2 +3.0V / 200mA (South West side)
|
||||
|
||||
The LDO output on pin 12 is filtered with capacitor **C33**.
|
||||
|
||||
### LDO3 (North side)
|
||||
|
||||
This LDO is not used and its output on pin 41 is nevertheless filtered
|
||||
with a capacitor **C63**.
|
||||
|
||||
### LDO4 (South West side)
|
||||
|
||||
This LDO is not used and its output on pin 11 is nevertheless filtered
|
||||
with a capacitor **C38**.
|
||||
|
||||
### Power Key (North West side)
|
||||
|
||||
The AXP20x features a soft power key with internal short and
|
||||
long-press detection with user-programmable time settings, which
|
||||
enables turning power ON or OFF much like the way it is done in
|
||||
cellular phones.
|
||||
|
||||
Only a few external components are required: the tactile switch
|
||||
**S13**, its ESD protection TVS **D29**, and a low-pass filter **R18**
|
||||
and **C42** for debouncing the switch.
|
||||
|
||||
### I2C Bus (North West side)
|
||||
|
||||
The AXP20x can be externally controlled by the main CPU using the I2C
|
||||
bus on pins 1 and 2. This bus has pull-up resistors to +3.3V **R14**
|
||||
and **R16**, and the IRQ/WAKEUP signal on pin 48 enables warning or
|
||||
waking up the CPU on a selection of AXP20x-generated events, with a
|
||||
pull-up resistor **R13** to +3.3V.
|
||||
|
||||
### GPIOs (South and West sides)
|
||||
|
||||
GPIO0-3 on pins 19, 18, 5 and 3 are not used in the **FunKey S** and
|
||||
are left unconnected.
|
||||
|
||||
### PWROK (South West side)
|
||||
|
||||
The PWROK signal on pin 25 is used to generate the global RESET signal
|
||||
for the whole board, with a pull-up resistor **R15** to the +3.3V
|
||||
Always On power supply and a filter capacitor **C18**.
|
||||
|
||||
### Enable Signals (West side)
|
||||
|
||||
The global chip enable signal N_OE on pin 4 is activated by default
|
||||
through a 47kΩ resistor **R17** to GND, but a magnetic Reed switch
|
||||
**S14** can disable it by forcing its level to +VOUT, with a filter
|
||||
capacitor **C83**. This circuit will be disscused later in the
|
||||
[Magnetic Switch section][13].
|
||||
|
||||
The USB enable signal N_VBUSEN on pin 6 is directly tied to GND to
|
||||
always enable power from the USB bus.
|
||||
|
||||
### Monitoring
|
||||
|
||||
Through the I2C bus and the numerous internal available registers, the
|
||||
AXP20x provides a very fine control of its operation, including many
|
||||
threshold and timing settings, but also many voltage and curent
|
||||
monitoring values.
|
||||
|
||||
### Coulomb Counters / Fuel Gauge
|
||||
|
||||
It is well known that battery discharge voltage curve over time is
|
||||
very flat, making it very difficult to estimate the real
|
||||
charge/discharge state of the battery. Moreover, this state will vary
|
||||
with temperature, load, and aging.
|
||||
|
||||
The only accurate way to monitor the battery status is to actually
|
||||
count the energy that is stored when charging, and the one that is
|
||||
consumed. This particularly important feature is achieved in the
|
||||
AXP20x using a dual Coulomb counter which continuously sums the
|
||||
current intensity over time for monitoring the battery accurate charge
|
||||
and discharge status, with user-defined alert thresholds.
|
||||
|
||||
This fuel gauge is providing the ability to precisely report the
|
||||
remaining battery capacity, just like people are used to with cellular
|
||||
phones.
|
||||
|
||||
[1]: https://licheepizero.us/
|
||||
[2]: https://hackaday.io/project/134065-funkey-zero
|
||||
[3]: http://club.szlcsc.com/article/downFile_D72C44885C60F9F1.html
|
||||
[4]: https://www.torexsemi.com/file/xc6206/XC6206.pdf
|
||||
[5]: http://www.x-powers.com/en.php
|
||||
[6]: http://www.x-powers.com/en.php/Info/down/id/55
|
||||
[7]: https://github.com/Squonk42/V3s_Documentation/raw/master/AXP203_Datasheet_V1.0.pdf
|
||||
[8]: https://github.com/Squonk42/V3s_Documentation/raw/master/AXP209_Datasheet_v1.0en.pdf
|
||||
[9]: https://github.com/Squonk42/V3s_Documentation/blob/master/V3S_CDR_STD_V1_0_20150514.pdf
|
||||
[10]: https://github.com/Squonk42/V3s_Documentation/raw/master/V3s%20hardware%20design%20guide%20V1.0_20150519%20EN%20Non%20Official.pdf
|
||||
[11]: https://github.com/FunKey-Project/FunKey-S-Hardware/blob/master/Datasheets/1811151533_JST-Sales-America-SM02B-SRSS-TB-LF-SN_C160402.pdf
|
||||
[12]: https://github.com/FunKey-Project/FunKey-S-Hardware/blob/master/Datasheets/C165977_%E8%B4%B4%E7%89%87LED%E8%93%9D%E8%89%B2_2018-01-26.PDF
|
||||
[13]: /developers/hardware/magnetic_switch
|
||||
--8<--
|
||||
includes/glossary.md
|
||||
--8<--
|
||||
@@ -0,0 +1,170 @@
|
||||
Simple DC electronic circuits can be powered by directly connecting a
|
||||
battery. However, more complex circuits usually require a constant
|
||||
input voltage for proper operation.
|
||||
|
||||
This page is a small sidetrack to explain the different regulated DC
|
||||
power supply topologies, before looking at the **FunKey S** power
|
||||
supply schematics in details.
|
||||
|
||||
If you are already comfortable with this subject, you can skip this
|
||||
section entirely!
|
||||
|
||||
## Linear Regulators
|
||||
|
||||
The easiest method to achieve a constant voltage viewed from the load
|
||||
despite a varying source voltage is to linearly control the resistance
|
||||
of the regulator in accordance with the load, resulting in a constant
|
||||
output voltage.
|
||||
|
||||
### Shunt Regulator
|
||||
|
||||
The simplest voltage regulator is the [shunt regulator][1], built
|
||||
around a Zener diode which most interesting characteristic is to
|
||||
maintain a constant voltage across itself when the current through it
|
||||
is sufficient to take it into the Zener breakdown region. A simple
|
||||
shunt regulator looks like this:
|
||||
|
||||

|
||||
|
||||
### Series Regulator
|
||||
|
||||
By adding a emitter-follower transistor to the simple shunt regulator,
|
||||
the small base current of the transistor forms a very light load on
|
||||
the Zener, thereby minimizing variation in Zener voltage due to
|
||||
variation in the load, resulting in a better regulation. Here is a
|
||||
schematic for this [series regulator][2]:
|
||||
|
||||

|
||||
|
||||
### Integrated Linear Regulator
|
||||
|
||||
In integrated voltage regulators, the discrete Zener diode is replaced
|
||||
by a more sophisticated (but easier to integrate) circuit built around
|
||||
a resistor divider feeding an operational amplifier, a voltage
|
||||
reference, and a transistor driving the emitter-follower pass
|
||||
transistor:
|
||||
|
||||

|
||||
|
||||
Usually, the pass transistor and its driving transistor are combined
|
||||
into a single Darlington transistor plus a controllable current source
|
||||
like this:
|
||||
|
||||

|
||||
|
||||
### LDO (Low Drop-Out) Regulator
|
||||
|
||||
The above circuit works well, but its drop-out voltage (the difference
|
||||
between the input and output voltage) is rather high because of this
|
||||
transistor cascade, around 1.5V to 2.5V.
|
||||
|
||||
By replacing the emitter-follower Darlington transistor by a PNP
|
||||
transistor in an open collector or open drain topology, the drop-out
|
||||
voltage is reduced to 0.7V or lower:
|
||||
|
||||

|
||||
|
||||
## SMPS (Switched-Mode Power Supply) or DC/DC Converters
|
||||
|
||||
A linear regulator provides the desired output voltage by dissipating
|
||||
excess power as heat in the Zener diode or in the pass
|
||||
transistor. Hence its maximum power efficiency is VOUT/ VIN since the
|
||||
voltage difference is wasted to heat the birds.
|
||||
|
||||
In contrast, a Switched-Mode Power Supply changes output voltage and
|
||||
current by switching non-linear storage elements, such as inductors,
|
||||
transformers and capacitors between different electrical
|
||||
configurations.
|
||||
|
||||
These elements are said to be non-linear because the inductor and
|
||||
transformer respond to changes in current by inducing its own voltage
|
||||
to counter the change in current, whereas a capacitor responds to
|
||||
changes in voltage by inducing its own current to counter the change
|
||||
in voltage.
|
||||
|
||||
Thus, depending on the way the components are arranged, it is possible
|
||||
to obtain SMPS circuits that either have an output voltage higher than
|
||||
the input voltage ("Boost Converters"), or lower than the input
|
||||
voltage ("Buck Converters", as is it subtracts or “Bucks” the supply
|
||||
voltage).
|
||||
|
||||
Because of technology, power inductors are easier to manufacture, take
|
||||
less space and are more stable over time than their counterpart
|
||||
capacitors. This is why most power DC/DC converters are built using
|
||||
inductors. Capacitor-based SMPS are generally used for lower power
|
||||
applications, such as for generating the +12V and -12V voltages
|
||||
required by true RS232 from a +3.3V or +5V power supply in the
|
||||
ubiquitous MAX232 drivers.
|
||||
|
||||
### Boost Converter
|
||||
|
||||
The most basic circuit for the Boost converter is the following:
|
||||
|
||||

|
||||
|
||||
If the switch is driven by a square wave, the peak-to-peak voltage of
|
||||
the waveform measured across the switch can exceed the input voltage
|
||||
from the DC source. This is because the non-linear characteristic of
|
||||
the inductor, and this voltage adds to the source voltage while the
|
||||
switch is open.
|
||||
|
||||
!!! warning
|
||||
In this converter, the output voltage is not isolated from the
|
||||
input voltage.
|
||||
|
||||
### Buck Converter
|
||||
|
||||
The corresponding basic circuit for the Buck converter is the
|
||||
following:
|
||||
|
||||

|
||||
|
||||
The way this converter works is described in details
|
||||
[here][3]. Basically, when the switch is closed, the inductor will
|
||||
produce an opposing voltage across its terminals in response to the
|
||||
changing current, reducing the output voltage, and meanwhile the
|
||||
inductor stores this energy in the form of a magnetic field. When the
|
||||
switch is opened, the current will decrease and will produce a voltage
|
||||
drop across the inductor, and now the inductor becomes a current
|
||||
source, where the stored energy in the inductor's magnetic field is
|
||||
restored and fed to the load.
|
||||
|
||||
!!! warning
|
||||
In this converter too, the output voltage is not isolated from the
|
||||
input voltage.
|
||||
|
||||
### Isolated SMPS
|
||||
|
||||
Isolated Switched-Mode Power Supplies use a transformer to isolate the
|
||||
input voltage from the output voltage, and thus can produce an output
|
||||
of higher or lower voltage than the input by adjusting the turns
|
||||
ratio.
|
||||
|
||||
## Pros and Cons
|
||||
|
||||
Linear regulators are simpler than SMPS, and their linear behavior
|
||||
produce a very clean output voltage, but their efficiency is directly
|
||||
proportional to the difference between the input and output voltage,
|
||||
which is dissipated as heat.
|
||||
|
||||
However, for light loads and/or when the voltage drop-out is low, LDOs
|
||||
are very useful.
|
||||
|
||||
OTOH, SMPS are more complex and require more components, but their
|
||||
efficiency is much better (typically 80-90%), resulting in less heat,
|
||||
with the drawback of a switching electrical noise pollution of both
|
||||
the input voltage (that may couple electrical switching noise back
|
||||
onto the mains power line) and the output voltage (with
|
||||
electromagnetic interference (EMI) and a ripple voltage at the
|
||||
switching frequency and all its harmonic frequencies).
|
||||
|
||||
SMPS are thus almost exclusively used when heavy loads are used and/or
|
||||
when the voltage drop-out is important.
|
||||
|
||||
[1]: https://en.wikipedia.org/wiki/Linear_regulator#Simple_shunt_regulator
|
||||
[2]: https://en.wikipedia.org/wiki/Linear_regulator#Simple_series_regulator
|
||||
[3]: https://en.wikipedia.org/wiki/Buck_converter#Concept
|
||||
|
||||
--8<--
|
||||
includes/glossary.md
|
||||
--8<--
|
||||
Reference in New Issue
Block a user