mirror of
https://github.com/FunKey-Project/picodrive-irixxxx.git
synced 2026-05-01 18:39:29 +02:00
bugfixes in sram memhandlers
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@301 be3aeb3a-fb24-0410-a615-afba39da0efa
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@@ -141,16 +141,33 @@ static
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u32 SRAMRead(u32 a)
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{
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unsigned int sreg = Pico.m.sram_reg;
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if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM
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if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM
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elprintf(EL_SRAMIO, "normal sram detected.");
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Pico.m.sram_reg|=0x10; // should be normal SRAM
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}
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if(sreg & 4) // EEPROM read
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if (sreg & 4) // EEPROM read
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return SRAMReadEEPROM();
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else // if(sreg & 1) // (sreg&5) is one of prerequisites
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return *(u8 *)(SRam.data-SRam.start+a);
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}
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#ifndef _ASM_MEMORY_C
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static
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#endif
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u32 SRAMRead16(u32 a)
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{
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u32 d;
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if (Pico.m.sram_reg & 4) {
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d = SRAMReadEEPROM();
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d |= d << 8;
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} else {
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u8 *pm=(u8 *)(SRam.data-SRam.start+a);
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d =*pm++ << 8;
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d|=*pm++;
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}
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return d;
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}
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static void SRAMWrite(u32 a, u32 d)
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{
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unsigned int sreg = Pico.m.sram_reg;
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@@ -363,8 +380,7 @@ PICO_INTERNAL_ASM u32 PicoRead16(u32 a)
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#ifndef EMU_CORE_DEBUG
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// sram
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if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
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d = SRAMRead(a);
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d |= d<<8;
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d = SRAMRead16(a);
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elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
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goto end;
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}
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@@ -400,8 +416,7 @@ PICO_INTERNAL_ASM u32 PicoRead32(u32 a)
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// sram
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if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
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d = (SRAMRead(a)<<16)|SRAMRead(a+2);
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d |= d<<8;
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d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);
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elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);
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goto end;
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}
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