162 Commits

Author	SHA1	Message	Date
kub	edf8866572	Merge from irixxxx/master:9d1ecde for repo synchronization	2020-12-05 10:21:35 +01:00
kub	9cbf2a27a3	sh2 drc, fix for mapping in register cache	2020-11-23 00:24:34 +01:00
kub	83ca9e8b19	sh2 drc, fix sh2 reg enum usage	2020-11-01 22:55:48 +01:00
kub	67a5227f09	sh2 drc, fix PIC function calling for MIPS backend	2020-10-31 21:05:27 +01:00
kub	6b0e776100	sh2 drc, fixes for cache handling on arm and mips cpus	2020-10-27 18:05:49 +01:00
kub	b7bd8d4778	sh2 drc, fix for cpu cache handling	2020-10-10 14:21:10 +02:00
kub	0621f9c506	sh2 drc, improve T bit propagation	2020-10-10 09:44:15 +02:00
kub	8ef593bbef	sh2 drc, fix for cpu cache handling	2020-10-10 09:42:55 +02:00
kub	00087a5060	sh2 drc, fix symbol clash	2020-09-17 23:50:18 +02:00
twinaphex	68329d146b	Fix non-MSVC builds	2020-08-16 04:18:22 +02:00
Alberto Fustinoni	7704fdc876	Fixed MSVC compilation, VFS	2020-08-14 17:03:28 +09:00
kub	0e96876cb3	sh2 drc, optimize standard division insns (default off, needs more scrutiny)	2020-07-14 00:07:15 +02:00
twinaphex	30620c549c	Buildfix	2020-07-13 11:59:10 +02:00
twinaphex	146970f72e	Make sure function prototype signatures match, and put typedefs into ... separate header file	2020-07-12 13:58:17 +02:00
kub	b718a54e58	sh2, fix for interpreter crash if drc is compiled in too	2020-07-09 08:42:33 +02:00
kub	f6f9a47b83	libretro, more fixes and cleanups for windows and osx	2020-07-07 19:03:08 +02:00
kub	817c9eb8f1	sh2 drc, optimisation for SH2 16x16 multiplication	2020-07-04 14:49:31 +02:00
kub	9760c3cdbf	sh2 drc, add powerpc64le backend	2020-07-04 14:49:30 +02:00
kub	35e6ff97c8	sh2: optimisations in drc	2020-07-04 14:49:30 +02:00
kub	fc2614f00f	sh2: bugfix in drc	2020-07-04 14:49:30 +02:00
kub	02a29cc8f4	sh2, optimizations to innermost run loop	2020-07-04 14:49:30 +02:00
kub	15a59e359b	sh2 timer optimization	2020-07-04 14:49:30 +02:00
kub	44a60b4593	bug fixes in drc, audio, display	2020-07-04 14:49:28 +02:00
kub	4cd464bbde	sh2 drc: optimize T bit handling for A64	2020-07-04 14:49:28 +02:00
kub	cb20bbd839	sh2 drc: fix speed regression	2020-07-04 14:49:28 +02:00
kub	26dd75aee8	sh2 drc: cleanup, fix for drc crash, for mips code emitter	2020-07-04 14:49:28 +02:00
kub	62f827c454	sh2 drc: bug fixing	2020-07-04 14:49:28 +02:00
kub	a1efdc9eed	sh2 drc, small improvements and bug fixes for code emitters	2020-07-04 14:49:28 +02:00
kub	81a39828a1	sh2 drc, improved memory management	2020-07-04 14:49:28 +02:00
kub	b71d3dfaf1	sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64	2020-07-04 14:49:28 +02:00
kub	5be12548d2	sh2 drc: optimizations for MIPS code emitting	2020-07-04 14:49:27 +02:00
kub	c3fa864a71	sh2 drc: moved host register assignment to code emitters, minor bugfixing	2020-07-04 14:49:27 +02:00
kub	855c2acc53	32x, finetuning	2020-07-04 14:49:27 +02:00
kub	8d931b641f	fix gp2x regression	2020-07-04 14:49:27 +02:00
kub	508e5ab618	sh2 drc: reorganised block mgmt code, plus some small scale optimisations	2020-07-04 14:49:27 +02:00
kub	85970fdc2f	sh2 drc: bugfix in block management	2020-07-04 14:49:27 +02:00
kub	f147cb1438	sh2 drc: bugfix in block management	2020-07-04 14:49:27 +02:00
kub	2e88630a6a	sh2 drc: speed optimization and bugfixing	2020-07-04 14:49:27 +02:00
kub	242e81baca	sh2 drc: fix i386 regression	2020-07-04 14:49:27 +02:00
kub	ea96d35b89	sh2 drc: bug fixing and optimization in register cache and branch handling	2020-07-04 14:49:27 +02:00
kub	45bc81f286	sh2 drc: drc exit, block linking and branch handling revised (overlooked commit)	2020-07-04 14:49:27 +02:00
kub	675cad8ce7	sh2 drc: drc exit, block linking and branch handling revised	2020-07-04 14:49:27 +02:00
kub	072737b2fe	sh2 drc: improved RTS call stack cache	2020-07-04 14:49:27 +02:00
kub	5ae77d6e73	sh2 drc: rework of register cache to implement basic loop optmization	2020-07-04 14:49:27 +02:00
kub	97706c3ee0	various smallish optimizations, cleanups, and bug fixes	2020-07-04 14:49:27 +02:00
kub	e666ac97c4	various small fixes and optimsations	2020-07-04 14:49:26 +02:00
kub	57f76d2cb7	sh2 drc: add aarch64 backend for A64	2020-07-04 14:49:26 +02:00
kub	57f65578f4	sh2 drc: add mipsel backend for MIPS32 Release 1 (for JZ47xx)	2020-07-04 14:49:26 +02:00
kub	a34b8bed7e	SH2 drc: register cache overhaul (bugfixing, speed, readability)	2020-07-04 14:49:26 +02:00
kub	141566aa23	SH2 drc: bug fixing and small speed improvements	2020-07-04 14:49:26 +02:00