93 Commits

Author	SHA1	Message	Date
kub	e6b80af200	libretro, build fixes ffor android/ios	2020-07-14 22:50:40 +02:00
kub	0e96876cb3	sh2 drc, optimize standard division insns (default off, needs more scrutiny)	2020-07-14 00:07:15 +02:00
kub	68f83baff3	sh2 drc, fix for x86_64 backend	2020-07-08 19:50:41 +02:00
kub	f6f9a47b83	libretro, more fixes and cleanups for windows and osx	2020-07-07 19:03:08 +02:00
kub	fbe8279503	sh2 drc, fix for SH2 T handling in Mips/RiscV	2020-07-04 14:49:31 +02:00
kub	241743af05	sh2 drc, backend 32/64 bit compatibility fixes for Mips/RiscV	2020-07-04 14:49:30 +02:00
kub	9760c3cdbf	sh2 drc, add powerpc64le backend	2020-07-04 14:49:30 +02:00
kub	b3f7eccfc8	sh2 drc, preparations for powerpc support	2020-07-04 14:49:30 +02:00
kub	af026c008d	sh2 drc: revised ARM A32 backend optimizer	2020-07-04 14:49:30 +02:00
kub	35e6ff97c8	sh2: optimisations in drc	2020-07-04 14:49:30 +02:00
kub	3adc47cb46	sh2 drc: fix for crash in generated code on x86_64	2020-07-04 14:49:29 +02:00
kub	65ae6dfdc9	audio: added SSG-EG to YM2612, plus some timing changes for SN76496+YM2612	2020-07-04 14:49:28 +02:00
kub	4cd464bbde	sh2 drc: optimize T bit handling for A64	2020-07-04 14:49:28 +02:00
kub	cb20bbd839	sh2 drc: fix speed regression	2020-07-04 14:49:28 +02:00
kub	26dd75aee8	sh2 drc: cleanup, fix for drc crash, for mips code emitter	2020-07-04 14:49:28 +02:00
kub	753eae054e	remove textrels with -fPIC/-fPIE (for android/ios)	2020-07-04 14:49:28 +02:00
kub	5e1f7e7e8b	sh2 drc, tentative MIPS32/64 Release 2 support	2020-07-04 14:49:28 +02:00
kub	62f827c454	sh2 drc: bug fixing	2020-07-04 14:49:28 +02:00
kub	58e4b59f4b	sh2 drc: fixed some RISC-V bugs	2020-07-04 14:49:28 +02:00
kub	a1efdc9eed	sh2 drc, small improvements and bug fixes for code emitters	2020-07-04 14:49:28 +02:00
kub	ef528087e7	sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64	2020-07-04 14:49:28 +02:00
kub	b71d3dfaf1	sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64	2020-07-04 14:49:28 +02:00
kub	5be12548d2	sh2 drc: optimizations for MIPS code emitting	2020-07-04 14:49:27 +02:00
kub	c3fa864a71	sh2 drc: moved host register assignment to code emitters, minor bugfixing	2020-07-04 14:49:27 +02:00
kub	8d3536852f	sh2 drc bugfix for aarch64/mips	2020-07-04 14:49:27 +02:00
kub	2e88630a6a	sh2 drc: speed optimization and bugfixing	2020-07-04 14:49:27 +02:00
kub	ea96d35b89	sh2 drc: bug fixing and optimization in register cache and branch handling	2020-07-04 14:49:27 +02:00
kub	675cad8ce7	sh2 drc: drc exit, block linking and branch handling revised	2020-07-04 14:49:27 +02:00
kub	072737b2fe	sh2 drc: improved RTS call stack cache	2020-07-04 14:49:27 +02:00
kub	97706c3ee0	various smallish optimizations, cleanups, and bug fixes	2020-07-04 14:49:27 +02:00
kub	f98ab2655d	cleanup and microoptimizations in SH2 hw handling	2020-07-04 14:49:27 +02:00
kub	6afb2662bd	configuration changes and README	2020-07-04 14:49:27 +02:00
kub	e666ac97c4	various small fixes and optimsations	2020-07-04 14:49:26 +02:00
kub	57f76d2cb7	sh2 drc: add aarch64 backend for A64	2020-07-04 14:49:26 +02:00
kub	57f65578f4	sh2 drc: add mipsel backend for MIPS32 Release 1 (for JZ47xx)	2020-07-04 14:49:26 +02:00
kub	141566aa23	SH2 drc: bug fixing and small speed improvements	2020-07-04 14:49:26 +02:00
kub	721f9c3385	sh2 drc, x86 code emitter: use x86-64 registers R8-R15	2020-07-04 14:49:26 +02:00
kub	862f2f2def	sh2 drc, change utils abi to pass sh2 PC in arg0 (reduces compiled code size)	2020-07-04 14:49:26 +02:00
kub	57f2c6a5c7	sh2 drc, keep T bit in host flags as long as possible	2020-07-04 14:49:26 +02:00
kub	1cf16a7c51	add xSR/RTS call stack cache to sh2 drc	2020-07-04 14:49:26 +02:00
kub	835adf871d	sh2 drc, add detection for in-memory polling	2020-07-04 14:49:26 +02:00
kub	0b520c1014	sh2 drc, add loop detector, handle delay/idle loops	2020-07-04 14:49:26 +02:00
kub	a0bef37586	sh2 drc, code emitter cleanup, add ARM reorder stage to reduce interlock	2020-07-04 14:49:26 +02:00
kub	6caa1fa6e1	sh2 drc, make B/W read functions signed (reduces generated code size)	2020-07-04 14:49:26 +02:00
kub	c77e3bf5e7	add literal pool to sh2 drc (for armv[456] without MOVT/W)	2020-07-04 14:49:26 +02:00
kub	1f8cc9c081	various small improvements and fixes	2020-07-04 14:49:26 +02:00
kub	65072b8181	added branch cache to sh2 drc to improve cross-tcache jump speed	2020-07-04 14:49:25 +02:00
kub	5f166c638c	sh2 memory interface optimzations	2020-07-04 14:49:25 +02:00
kub	24f21f3b8a	overhaul of the register cache (improves generated code by some 10+%)	2020-07-04 14:49:25 +02:00
kub	2d133c17d6	debug stuff, bug fixing	2020-07-04 14:49:25 +02:00