91 Commits

Author	SHA1	Message	Date
kub	e9a3de1ed4	sh2 drc, block management bugfixes and cleanup	2020-07-04 14:49:26 +02:00
kub	835adf871d	sh2 drc, add detection for in-memory polling	2020-07-04 14:49:26 +02:00
kub	0b520c1014	sh2 drc, add loop detector, handle delay/idle loops	2020-07-04 14:49:26 +02:00
kub	a0bef37586	sh2 drc, code emitter cleanup, add ARM reorder stage to reduce interlock	2020-07-04 14:49:26 +02:00
kub	6caa1fa6e1	sh2 drc, make B/W read functions signed (reduces generated code size)	2020-07-04 14:49:26 +02:00
kub	74385d04c3	sh2 drc, improved constant handling and register allocator	2020-07-04 14:49:26 +02:00
kub	c77e3bf5e7	add literal pool to sh2 drc (for armv[456] without MOVT/W)	2020-07-04 14:49:26 +02:00
kub	87316e5941	sh2 drc, reuse blocks if already previously compiled (speedup for Virtua *)	2020-07-04 14:49:26 +02:00
kub	1f8cc9c081	various small improvements and fixes	2020-07-04 14:49:26 +02:00
kub	48fdcb0390	overhaul of translation cache and sh2 literals handling	2020-07-04 14:49:25 +02:00
kub	65072b8181	added branch cache to sh2 drc to improve cross-tcache jump speed	2020-07-04 14:49:25 +02:00
kub	5f166c638c	sh2 memory interface optimzations	2020-07-04 14:49:25 +02:00
kub	24f21f3b8a	overhaul of the register cache (improves generated code by some 10+%)	2020-07-04 14:49:25 +02:00
kub	2d133c17d6	debug stuff, bug fixing	2020-07-04 14:49:25 +02:00
kub	94eb72693c	move saving SH2 SR into memory access and do so only if needed	2020-07-04 14:49:25 +02:00
kub	38e9622eb6	add 32bit memory access functions for SH2	2020-07-04 14:49:25 +02:00
kub	4eb73cb54b	sh2 drc: sh2 addr modes generalization, more const propagation, code gen optimizations	2020-07-04 14:49:25 +02:00
kub	771d8aca0f	DRC: reworked scan_block (fix register usage masks, better block and literals detection)	2020-07-04 14:49:25 +02:00
kub	59ea3b20f8	kludges for wwf raw, nfl	2020-07-04 14:49:25 +02:00
kub	4766b9309a	sh2 drc host disassembler integration for gp2x	2020-07-04 14:49:25 +02:00
notaz	6b8652a8a2	32x: implement standard/ssf2 mapper	2018-01-22 19:05:58 +01:00
notaz	fda2f31020	drc: support ms ABI	2018-01-07 01:20:00 +02:00
notaz	898d51a7fd	drc: revive x86 dynarec, support x86-64	2017-12-12 01:45:59 +02:00
notaz	98a3d79ba2	drc: arm: use movw/movt ... it's about time...	2017-12-03 17:44:33 +02:00
notaz	00468b0a9b	drc: do lit check before size_nolit is cleared	2017-12-03 17:44:33 +02:00
notaz	d602fd4f73	drc: ignore cache-through on smc check	2017-12-03 17:44:33 +02:00
notaz	f0ed9e38ad	drc: rm overlapped block entry points ... otherwise we get duplicates in hash tables	2017-12-03 17:44:33 +02:00
notaz	759c9d3846	pandora: fix build ... Fixes: df9251536d "libretro: satisfy vita's dynarec needs in a cleaner way"	2017-10-20 12:20:59 +03:00
notaz	e9a11abb3c	drop some unnecessary inlines ... apparently somebody compiles with msvc?	2017-10-14 00:53:09 +03:00
notaz	6a5b1b362e	sh2: handle some branch exceptions	2017-08-18 03:44:46 +03:00
notaz	0185b67736	allow to disable SH2 dynarec on runtime	2013-08-31 20:48:39 +03:00
notaz	895d15121b	deal with some strict aliasing issues	2013-08-20 03:20:37 +03:00
notaz	eb35ce1506	32x: some mapping corrections	2013-08-19 03:55:55 +03:00
notaz	0219d379de	fixes for idle and other stuff	2013-08-16 01:14:38 +03:00
notaz	001f73a0d6	32x: drc: emulate illegal insn ... The X-Men proto debugger makes it worth it	2013-08-14 03:37:45 +03:00
notaz	f8675e282e	32x: simplify logging a bit	2013-08-14 03:37:45 +03:00
notaz	f81107f590	32x: memhandler improvements ... - use consistent read tables (with write) - use sh2 ptr instead of id - place data_array/peri_regs in sh2 struct	2013-08-08 03:02:54 +03:00
notaz	2dbc96b1c7	preserve r9 for apple	2013-07-29 03:28:45 +03:00
notaz	ee5f7e9936	drc: dumb detection of writes to current block	2013-07-28 23:29:05 +03:00
notaz	405dfdd77f	drc: some debug improvements	2013-07-28 23:29:05 +03:00
notaz	51d86e55f6	drc: tune invalidation	2013-07-23 01:45:21 +03:00
notaz	f2dde8713e	comment adjustments	2013-07-23 01:45:21 +03:00
notaz	fa841b44c4	drc: various fixes / refactoring	2013-07-23 01:45:21 +03:00
notaz	6976a54726	drc: fix regcache and invalidation issues	2013-07-23 01:45:21 +03:00
notaz	6d7979571d	drc: debug improvements	2013-07-23 01:45:21 +03:00
notaz	bf092a3631	drc: split disassembly to separate pass ... allows easier analysis	2013-07-20 20:33:44 +03:00
notaz	d056bef851	drc: rm write irq check ... does more bad than good	2013-07-20 20:29:59 +03:00
notaz	00a725a87c	drc: rework block link tracking	2013-07-18 02:37:27 +03:00
notaz	228ee974aa	drc: rework block tracking and lookup ... - all 3 caches have their own hash tables (for now?) - block entry points have separate structures from blocks, so invalidation can now properly be done	2013-07-18 02:37:08 +03:00
notaz	e155367759	drc: some renaming	2013-07-17 00:23:56 +03:00