Add most vanilla memory load/store instructions.

--HG-- branch : dtrg-videocore
2013-05-19 00:56:56 +01:00
parent 26877d3c4f
commit fc2833d456
7 changed files with 205 additions and 106 deletions
--- a/mach/vc4/test/opcodes.s
+++ b/mach/vc4/test/opcodes.s
@@ -282,3 +282,54 @@ forward:
 	pop r16
 	pop r24
 	pop pc
+
+	nop
+
+    ld r0, (sp)
+    st r0, (sp)
+    ld r0, 4(sp)
+    st r0, 4(sp)
+    ld r0, -4(sp)
+    st r0, -4(sp)
+    ld r0, 5(sp)
+    st r0, 5(sp)
+    ld r0, -5(sp)
+    st r0, -5(sp)
+
+    ld r0, (r1)
+    st r0, (r1)
+    ld r16, (r1)
+    st r16, (r1)
+    ldh r0, (r1)
+    sth r0, (r1)
+    ldb r0, (r1)
+    stb r0, (r1)
+    ldhs r0, (r1)
+    sths r0, (r1)
+    ldh r16, (r1)
+    sth r16, (r1)
+    ldb r16, (r1)
+    stb r16, (r1)
+    ldhs r16, (r1)
+    sths r16, (r1)
+    ld r0, 0x3c (r1)
+    st r0, 0x3c (r1)
+    ld r0, 0xfff (r1)
+    st r0, 0xfff (r1)
+    ld r1, 0xffff (r0)
+    st r1, 0xffff (r0)
+    ld r0, -1 (r1)
+    st r0, -1 (r1)
+    ld r16, 0x3c (r1)
+    st r16, 0x3c (r1)
+    ld r16, 0xfff (r1)
+    st r16, 0xfff (r1)
+    ld r16, 0xffff (r0)
+    st r16, 0xffff (r0)
+    ld r16, -1 (r1)
+    st r16, -1 (r1)
+
+	ld.f r0, (r1)
+	st.f r0, (r1)
+	ld.f r0, 8 (r1)
+	st.f r0, 8 (r1)