Add iInvalid enum value for invalid instructions
Various cleanups.
This commit is contained in:
parent
d7acc8cd4d
commit
d6af9c1555
@ -99,7 +99,7 @@ enum icodeType
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/* LOW_LEVEL icode opcodes */
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enum llIcode
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{
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//iINVALID,
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iINVALID=-1,
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iCBW, /* 0 */
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iAAA,
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iAAD,
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@ -313,7 +313,7 @@ struct LLOperand
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struct LLInst
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{
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protected:
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uint32_t m_opcode; // Low level opcode identifier
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llIcode m_opcode; // Low level opcode identifier
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uint32_t flg; /* icode flags */
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LLOperand m_src; /* source operand */
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public:
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@ -326,8 +326,8 @@ public:
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std::vector<uint32_t> caseTbl2;
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int hllLabNum; /* label # for hll codegen */
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uint32_t getOpcode() const { return m_opcode;}
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void setOpcode(uint32_t op) { m_opcode=op; }
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llIcode getOpcode() const { return m_opcode;}
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void setOpcode(uint32_t op) { m_opcode=(llIcode)op; }
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bool conditionalJump()
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{
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return (getOpcode() >= iJB) and (getOpcode() < iJCXZ);
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@ -28,7 +28,7 @@ struct LLInst;
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typedef std::list<ICODE>::iterator iICODE;
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struct IDX_ARRAY : public std::vector<iICODE>
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{
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bool inList(iICODE idx)
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bool inList(iICODE idx) const
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{
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return std::find(begin(),end(),idx)!=end();
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}
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@ -54,7 +54,7 @@ public:
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ilFunction createFunction(FunctionType *f, const QString & name);
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bool valid(ilFunction iter);
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int getSymIdxByAdd(uint32_t adr);
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int getSymIdxByAddr(uint32_t adr);
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bool validSymIdx(size_t idx);
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size_t symbolSize(size_t idx);
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hlType symbolType(size_t idx);
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526
src/ast.cpp
526
src/ast.cpp
@ -13,6 +13,7 @@
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#include "project.h"
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#include <QtCore/QTextStream>
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#include <QtCore/QDebug>
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#include <boost/range.hpp>
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#include <boost/range/adaptor/filtered.hpp>
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#include <boost/range/algorithm.hpp>
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@ -29,12 +30,15 @@ using namespace boost::adaptors;
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extern int strSize (const uint8_t *, char);
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extern char *cChar(uint8_t c);
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namespace
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{
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// Conditional operator symbols in C. Index by condOp enumeration type
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static const char * const condOpSym[] = { " <= ", " < ", " == ", " != ", " > ", " >= ",
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" & ", " | ", " ^ ", " ~ ",
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" + ", " - ", " * ", " / ",
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" >> ", " << ", " % ", " && ", " || " };
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constexpr const char * condOpSym[] = { " <= ", " < ", " == ", " != ", " > ", " >= ",
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" & ", " | ", " ^ ", " ~ ",
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" + ", " - ", " * ", " / ",
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" >> ", " << ", " % ", " && ", " || " };
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/* Size of hl types */
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constexpr const int hlSize[] = {2, 1, 1, 2, 2, 4, 4, 4, 2, 2, 1, 4, 4};
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/* Local expression stack */
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//typedef struct _EXP_STK {
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@ -43,13 +47,13 @@ static const char * const condOpSym[] = { " <= ", " < ", " == ", " != ", " > ",
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//} EXP_STK; - for local expression stack
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/* Returns the integer i in C hexadecimal format */
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static const char *hexStr (uint16_t i)
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const char *hexStr (uint16_t i)
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{
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static char buf[10];
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sprintf (buf, "%s%x", (i > 9) ? "0x" : "", i);
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return (buf);
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return buf;
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}
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}
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/* Sets the du record for registers according to the du flag */
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void ICODE::setRegDU (eReg regi, operDu du_in)
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@ -62,19 +66,19 @@ void ICODE::setRegDU (eReg regi, operDu du_in)
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}
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switch (du_in)
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{
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case eDEF:
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du.def.addReg(regi);
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du1.addDef(regi);
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break;
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case eUSE:
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du.use.addReg(regi);
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break;
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case USE_DEF:
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du.addDefinedAndUsed(regi);
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du1.addDef(regi);
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break;
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case NONE: /* do nothing */
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break;
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case eDEF:
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du.def.addReg(regi);
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du1.addDef(regi);
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break;
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case eUSE:
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du.use.addReg(regi);
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break;
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case USE_DEF:
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du.addDefinedAndUsed(regi);
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du1.addDef(regi);
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break;
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case NONE: /* do nothing */
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break;
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}
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}
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@ -84,24 +88,24 @@ void ICODE::copyDU(const ICODE &duIcode, operDu _du, operDu duDu)
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{
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switch (_du)
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{
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case eDEF:
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if (duDu == eDEF)
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du.def=duIcode.du.def;
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else
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du.def=duIcode.du.use;
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break;
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case eUSE:
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if (duDu == eDEF)
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du.use = duIcode.du.def;
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else
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du.use = duIcode.du.use;
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break;
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case USE_DEF:
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du = duIcode.du;
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break;
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case NONE:
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assert(false);
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break;
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case eDEF:
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if (duDu == eDEF)
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du.def=duIcode.du.def;
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else
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du.def=duIcode.du.use;
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break;
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case eUSE:
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if (duDu == eDEF)
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du.use = duIcode.du.def;
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else
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du.use = duIcode.du.use;
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break;
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case USE_DEF:
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du = duIcode.du;
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break;
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case NONE:
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assert(false);
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break;
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}
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}
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@ -124,7 +128,7 @@ GlobalVariable::GlobalVariable(int16_t segValue, int16_t off)
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valid = true;
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ident.idType = GLOB_VAR;
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adr = opAdr(segValue, off);
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auto i=Project::get()->getSymIdxByAdd(adr);
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auto i=Project::get()->getSymIdxByAddr(adr);
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if ( not Project::get()->validSymIdx(i) )
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{
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printf ("Error, glob var not found in symtab\n");
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@ -136,7 +140,7 @@ GlobalVariable::GlobalVariable(int16_t segValue, int16_t off)
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QString GlobalVariable::walkCondExpr(Function *, int *) const
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{
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if(valid)
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return Project::get()->symtab[globIdx].name;
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return Project::get()->symbolName(globIdx);
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return "INVALID GlobalVariable";
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}
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@ -164,7 +168,7 @@ AstIdent *AstIdent::Loc(int off, LOCAL_ID *localId)
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AstIdent *AstIdent::Param(int off, const STKFRAME * argSymtab)
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{
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AstIdent *newExp;
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newExp = new AstIdent();
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newExp->ident.idType = PARAM;
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auto iter=argSymtab->findByLabel(off);
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@ -262,22 +266,22 @@ AstIdent *AstIdent::idID (const ID *retVal, LOCAL_ID *locsym, iICODE ix_)
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AstIdent *newExp=nullptr;
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switch(retVal->type)
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{
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case TYPE_LONG_SIGN:
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{
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newExp = new AstIdent();
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int idx = locsym->newLongReg (TYPE_LONG_SIGN, retVal->longId(), ix_);
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newExp->ident.idType = LONG_VAR;
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newExp->ident.idNode.longIdx = idx;
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break;
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}
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case TYPE_WORD_SIGN:
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newExp = new RegisterNode(locsym->newByteWordReg(retVal->type, retVal->id.regi),WORD_REG,locsym);
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break;
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case TYPE_BYTE_SIGN:
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newExp = new RegisterNode(locsym->newByteWordReg(retVal->type, retVal->id.regi),BYTE_REG,locsym);
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break;
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default:
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fprintf(stderr,"AstIdent::idID unhandled type %d\n",retVal->type);
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case TYPE_LONG_SIGN:
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{
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newExp = new AstIdent();
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int idx = locsym->newLongReg (TYPE_LONG_SIGN, retVal->longId(), ix_);
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newExp->ident.idType = LONG_VAR;
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newExp->ident.idNode.longIdx = idx;
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break;
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}
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case TYPE_WORD_SIGN:
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newExp = new RegisterNode(locsym->newByteWordReg(retVal->type, retVal->id.regi),WORD_REG,locsym);
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break;
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case TYPE_BYTE_SIGN:
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newExp = new RegisterNode(locsym->newByteWordReg(retVal->type, retVal->id.regi),BYTE_REG,locsym);
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break;
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default:
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fprintf(stderr,"AstIdent::idID unhandled type %d\n",retVal->type);
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}
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return (newExp);
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}
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@ -291,11 +295,11 @@ AstIdent *AstIdent::idID (const ID *retVal, LOCAL_ID *locsym, iICODE ix_)
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Expr *AstIdent::id(const LLInst &ll_insn, opLoc sd, Function * pProc, iICODE ix_,ICODE &duIcode, operDu du)
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{
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Expr *newExp;
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int idx; /* idx into pIcode->localId table */
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const LLOperand &pm(*ll_insn.get(sd));
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if ( ((sd == DST) and ll_insn.testFlags(IM_DST)) or
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((sd == SRC) and ll_insn.testFlags(IM_SRC)) or
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(sd == LHS_OP)) /* for MUL lhs */
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@ -305,13 +309,13 @@ Expr *AstIdent::id(const LLInst &ll_insn, opLoc sd, Function * pProc, iICODE ix_
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duIcode.setRegDU (rDX, du);
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duIcode.setRegDU (rAX, du);
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}
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else if ((sd == DST) and ll_insn.testFlags(IM_TMP_DST))
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{ /* implicit tmp */
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newExp = new RegisterNode(LLOperand(rTMP,2), &pProc->localId);
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duIcode.setRegDU(rTMP, (operDu)eUSE);
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}
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else if ((sd == SRC) and ll_insn.testFlags(I)) /* constant */
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newExp = new Constant(ll_insn.src().getImm2(), 2);
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else if (pm.regi == rUNDEF) /* global variable */
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@ -322,7 +326,7 @@ Expr *AstIdent::id(const LLInst &ll_insn, opLoc sd, Function * pProc, iICODE ix_
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newExp = new RegisterNode(pm, &pProc->localId);
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duIcode.setRegDU( pm.regi, du);
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}
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else if (pm.off) /* offset */
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{ // TODO: this is ABI specific, should be actually based on Function calling conv
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if ((pm.seg == rSS) and (pm.regi == INDEX_BP)) /* idx on bp */
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@ -344,20 +348,19 @@ Expr *AstIdent::id(const LLInst &ll_insn, opLoc sd, Function * pProc, iICODE ix_
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newExp = AstIdent::Other (pm.seg, pm.regi, pm.off);
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/**** check long ops, indexed global var *****/
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}
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else /* (pm->regi >= INDEXBASE and pm->off = 0) => indexed and no off */
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{
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if ((pm.seg == rDS) and (pm.regi > INDEX_BP_DI)) /* dereference */
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{
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eReg selected;
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switch (pm.regi) {
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case INDEX_SI: selected = rSI; break;
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case INDEX_DI: selected = rDI; break;
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case INDEX_BP: selected = rBP; break;
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case INDEX_BX: selected = rBX; break;
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default:
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newExp = nullptr;
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assert(false);
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case INDEX_SI: selected = rSI; break;
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case INDEX_DI: selected = rDI; break;
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case INDEX_BP: selected = rBP; break;
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case INDEX_BX: selected = rBX; break;
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default:
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newExp = nullptr;
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assert(false);
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}
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//NOTICE: was selected, 0
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newExp = new RegisterNode(LLOperand(selected, 0), &pProc->localId);
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@ -367,7 +370,7 @@ Expr *AstIdent::id(const LLInst &ll_insn, opLoc sd, Function * pProc, iICODE ix_
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else
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newExp = AstIdent::Other (pm.seg, pm.regi, 0);
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}
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return (newExp);
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return newExp;
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}
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@ -375,33 +378,30 @@ Expr *AstIdent::id(const LLInst &ll_insn, opLoc sd, Function * pProc, iICODE ix_
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condId LLInst::idType(opLoc sd) const
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{
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const LLOperand &pm((sd == SRC) ? src() : m_dst);
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if ((sd == SRC) and testFlags(I))
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return (CONSTANT);
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return CONSTANT;
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else if (pm.regi == 0)
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return (GLOB_VAR);
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return GLOB_VAR;
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else if ( pm.isReg() )
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return (REGISTER);
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else if ((pm.seg == rSS) and (pm.regi == INDEX_BP))
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return REGISTER;
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else if ((pm.seg == rSS) and (pm.regi == INDEX_BP)) // TODO: this assumes BP-based function frames !
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{
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//TODO: which pm.seg/pm.regi pairs should produce PARAM/LOCAL_VAR ?
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if (pm.off >= 0)
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return (PARAM);
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else
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return (LOCAL_VAR);
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return PARAM;
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return LOCAL_VAR;
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}
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else
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return (OTHER);
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return OTHER;
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}
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/* Size of hl types */
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int hlSize[] = {2, 1, 1, 2, 2, 4, 4, 4, 2, 2, 1, 4, 4};
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int Expr::hlTypeSize(Function * pproc) const
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{
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if (this == nullptr)
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return (2); /* for TYPE_UNKNOWN */
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return 2; /* for TYPE_UNKNOWN */
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fprintf(stderr,"hlTypeSize queried for Unkown type %d \n",m_type);
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return 2; // CC: is this correct?
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}
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@ -428,22 +428,22 @@ int AstIdent::hlTypeSize(Function *pproc) const
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{
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switch (ident.idType)
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{
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case GLOB_VAR:
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assert(false);
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return 1;
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case LOCAL_VAR:
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return (hlSize[pproc->localId.id_arr[ident.idNode.localIdx].type]);
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case PARAM:
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return (hlSize[pproc->args[ident.idNode.paramIdx].type]);
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case STRING:
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return (2);
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case LONG_VAR:
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return (4);
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case OTHER:
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return (2);
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default:
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assert(false);
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return -1;
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case GLOB_VAR:
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assert(false);
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return 1;
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case LOCAL_VAR:
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return (hlSize[pproc->localId.id_arr[ident.idNode.localIdx].type]);
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case PARAM:
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return (hlSize[pproc->args[ident.idNode.paramIdx].type]);
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case STRING:
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return 2;
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case LONG_VAR:
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return 4;
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case OTHER:
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return 2;
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default:
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assert(false);
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return -1;
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} /* eos */
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}
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hlType BinaryOperator::expType(Function *pproc) const
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@ -477,24 +477,24 @@ hlType AstIdent::expType(Function *pproc) const
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{
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switch (ident.idType)
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{
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case UNDEF:
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case CONSTANT:
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case FUNCTION:
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case REGISTER:
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case GLOB_VAR:
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case GLOB_VAR_IDX:
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assert(false);
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return TYPE_UNKNOWN;
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case LOCAL_VAR:
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return (pproc->localId.id_arr[ident.idNode.localIdx].type);
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case PARAM:
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return (pproc->args[ident.idNode.paramIdx].type);
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case STRING:
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return (TYPE_STR);
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case LONG_VAR:
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return (pproc->localId.id_arr[ident.idNode.longIdx].type);
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default:
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return (TYPE_UNKNOWN);
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case UNDEF:
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case CONSTANT:
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case FUNCTION:
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case REGISTER:
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case GLOB_VAR:
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case GLOB_VAR_IDX:
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assert(false);
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return TYPE_UNKNOWN;
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case LOCAL_VAR:
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return (pproc->localId.id_arr[ident.idNode.localIdx].type);
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case PARAM:
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return (pproc->args[ident.idNode.paramIdx].type);
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case STRING:
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return (TYPE_STR);
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case LONG_VAR:
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return (pproc->localId.id_arr[ident.idNode.longIdx].type);
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default:
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return (TYPE_UNKNOWN);
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} /* eos */
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return (TYPE_UNKNOWN);
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}
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@ -507,17 +507,17 @@ hlType AstIdent::expType(Function *pproc) const
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Expr * HlTypeSupport::performLongRemoval (eReg regi, LOCAL_ID *locId, Expr *tree)
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{
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switch (tree->m_type) {
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case BOOLEAN_OP:
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case POST_INC: case POST_DEC:
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case PRE_INC: case PRE_DEC:
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case NEGATION: case ADDRESSOF:
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case DEREFERENCE:
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case IDENTIFIER:
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return tree->performLongRemoval(regi,locId);
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break;
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default:
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fprintf(stderr,"performLongRemoval attemped on %d\n",tree->m_type);
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break;
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case BOOLEAN_OP:
|
||||
case POST_INC: case POST_DEC:
|
||||
case PRE_INC: case PRE_DEC:
|
||||
case NEGATION: case ADDRESSOF:
|
||||
case DEREFERENCE:
|
||||
case IDENTIFIER:
|
||||
return tree->performLongRemoval(regi,locId);
|
||||
break;
|
||||
default:
|
||||
fprintf(stderr,"performLongRemoval attemped on %d\n",tree->m_type);
|
||||
break;
|
||||
}
|
||||
return tree;
|
||||
}
|
||||
@ -528,7 +528,7 @@ static QString getString (int offset)
|
||||
PROG &prog(Project::get()->prog);
|
||||
QString o;
|
||||
int strLen, i;
|
||||
|
||||
|
||||
strLen = strSize (&prog.image()[offset], '\0');
|
||||
o += '"';
|
||||
for (i = 0; i < strLen; i++)
|
||||
@ -539,7 +539,7 @@ static QString getString (int offset)
|
||||
QString BinaryOperator::walkCondExpr(Function * pProc, int* numLoc) const
|
||||
{
|
||||
assert(rhs());
|
||||
|
||||
|
||||
return QString("(%1%2%3)")
|
||||
.arg((m_op!=NOT) ? lhs()->walkCondExpr(pProc, numLoc) : "")
|
||||
.arg(condOpSym[m_op])
|
||||
@ -553,67 +553,71 @@ QString AstIdent::walkCondExpr(Function *pProc, int *numLoc) const
|
||||
STKSYM * psym; /* Pointer to argument in the stack */
|
||||
QString codeContents;
|
||||
QString collectedContents;
|
||||
|
||||
|
||||
QTextStream codeOut(&codeContents);
|
||||
QTextStream o(&collectedContents);
|
||||
|
||||
|
||||
switch (ident.idType)
|
||||
{
|
||||
case LOCAL_VAR:
|
||||
o << pProc->localId.id_arr[ident.idNode.localIdx].name;
|
||||
break;
|
||||
|
||||
case PARAM:
|
||||
psym = &pProc->args[ident.idNode.paramIdx];
|
||||
if (psym->hasMacro)
|
||||
o << psym->macro<<"("<<psym->name<< ")";
|
||||
else
|
||||
o << psym->name;
|
||||
break;
|
||||
case STRING:
|
||||
o << getString (ident.idNode.strIdx);
|
||||
break;
|
||||
|
||||
case LONG_VAR:
|
||||
id = &pProc->localId.id_arr[ident.idNode.longIdx];
|
||||
if (id->name[0] != '\0') /* STK_FRAME & REG w/name*/
|
||||
o << id->name;
|
||||
else if (id->loc == REG_FRAME)
|
||||
{
|
||||
id->setLocalName(++(*numLoc));
|
||||
codeOut <<TypeContainer::typeName(id->type)<< " "<<id->name<<"; ";
|
||||
codeOut <<"/* "<<Machine_X86::regName(id->longId().h()) << ":" <<
|
||||
Machine_X86::regName(id->longId().l()) << " */\n";
|
||||
o << id->name;
|
||||
pProc->localId.propLongId (id->longId().l(),id->longId().h(), id->name);
|
||||
}
|
||||
else /* GLB_FRAME */
|
||||
{
|
||||
if (id->id.longGlb.regi == 0) /* not indexed */
|
||||
o << "[" << (id->id.longGlb.seg<<4) + id->id.longGlb.offH <<"]";
|
||||
else if (id->id.longGlb.regi == rBX)
|
||||
o << "[" << (id->id.longGlb.seg<<4) + id->id.longGlb.offH <<"][bx]";
|
||||
}
|
||||
break;
|
||||
case OTHER:
|
||||
off = ident.idNode.other.off;
|
||||
o << Machine_X86::regName(ident.idNode.other.seg)<< "[";
|
||||
o << Machine_X86::regName(ident.idNode.other.regi);
|
||||
if (off < 0)
|
||||
o << "-"<< hexStr (-off);
|
||||
else if (off>0)
|
||||
o << "+"<< hexStr (off);
|
||||
o << "]";
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
return "";
|
||||
|
||||
|
||||
case LOCAL_VAR:
|
||||
o << pProc->localId.id_arr[ident.idNode.localIdx].name;
|
||||
break;
|
||||
|
||||
case PARAM:
|
||||
psym = &pProc->args[ident.idNode.paramIdx];
|
||||
if (psym->hasMacro)
|
||||
o << psym->macro<<"("<<psym->name<< ")";
|
||||
else
|
||||
o << psym->name;
|
||||
break;
|
||||
case STRING:
|
||||
o << getString (ident.idNode.strIdx);
|
||||
break;
|
||||
|
||||
case LONG_VAR:
|
||||
id = &pProc->localId.id_arr[ident.idNode.longIdx];
|
||||
if (id->name[0] != '\0') /* STK_FRAME & REG w/name*/
|
||||
o << id->name;
|
||||
else if (id->loc == REG_FRAME)
|
||||
{
|
||||
id->setLocalName(++(*numLoc));
|
||||
codeOut <<TypeContainer::typeName(id->type)<< " "<<id->name<<"; ";
|
||||
codeOut <<"/* "<<Machine_X86::regName(id->longId().h()) << ":" <<
|
||||
Machine_X86::regName(id->longId().l()) << " */\n";
|
||||
o << id->name;
|
||||
pProc->localId.propLongId (id->longId().l(),id->longId().h(), id->name);
|
||||
}
|
||||
else /* GLB_FRAME */
|
||||
{
|
||||
if (id->id.longGlb.regi == 0) /* not indexed */
|
||||
o << "[" << (id->id.longGlb.seg<<4) + id->id.longGlb.offH <<"]";
|
||||
else if (id->id.longGlb.regi == rBX)
|
||||
o << "[" << (id->id.longGlb.seg<<4) + id->id.longGlb.offH <<"][bx]";
|
||||
else {
|
||||
qCritical() << "AstIdent::walkCondExpr unhandled LONG_VAR in GLB_FRAME";
|
||||
assert(false);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case OTHER:
|
||||
off = ident.idNode.other.off;
|
||||
o << Machine_X86::regName(ident.idNode.other.seg)<< "[";
|
||||
o << Machine_X86::regName(ident.idNode.other.regi);
|
||||
if (off < 0)
|
||||
o << "-"<< hexStr (-off);
|
||||
else if (off>0)
|
||||
o << "+"<< hexStr (off);
|
||||
o << "]";
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
return "";
|
||||
|
||||
|
||||
} /* eos */
|
||||
cCode.appendDecl(codeContents);
|
||||
return collectedContents;
|
||||
|
||||
|
||||
}
|
||||
QString UnaryOperator::wrapUnary(Function *pProc, int *numLoc,QChar op) const
|
||||
{
|
||||
@ -631,33 +635,33 @@ QString UnaryOperator::walkCondExpr(Function *pProc, int *numLoc) const
|
||||
QString outStr;
|
||||
switch(m_type)
|
||||
{
|
||||
case NEGATION:
|
||||
outStr+=wrapUnary(pProc,numLoc,'!');
|
||||
break;
|
||||
|
||||
case ADDRESSOF:
|
||||
outStr+=wrapUnary(pProc,numLoc,'&');
|
||||
break;
|
||||
|
||||
case DEREFERENCE:
|
||||
outStr+=wrapUnary(pProc,numLoc,'*');
|
||||
break;
|
||||
|
||||
case POST_INC:
|
||||
outStr += unaryExp->walkCondExpr (pProc, numLoc) + "++";
|
||||
break;
|
||||
|
||||
case POST_DEC:
|
||||
outStr += unaryExp->walkCondExpr (pProc, numLoc) + "--";
|
||||
break;
|
||||
|
||||
case PRE_INC:
|
||||
outStr += "++" + unaryExp->walkCondExpr (pProc, numLoc);
|
||||
break;
|
||||
|
||||
case PRE_DEC:
|
||||
outStr += "--" + unaryExp->walkCondExpr (pProc, numLoc);
|
||||
break;
|
||||
case NEGATION:
|
||||
outStr+=wrapUnary(pProc,numLoc,'!');
|
||||
break;
|
||||
|
||||
case ADDRESSOF:
|
||||
outStr+=wrapUnary(pProc,numLoc,'&');
|
||||
break;
|
||||
|
||||
case DEREFERENCE:
|
||||
outStr+=wrapUnary(pProc,numLoc,'*');
|
||||
break;
|
||||
|
||||
case POST_INC:
|
||||
outStr += unaryExp->walkCondExpr (pProc, numLoc) + "++";
|
||||
break;
|
||||
|
||||
case POST_DEC:
|
||||
outStr += unaryExp->walkCondExpr (pProc, numLoc) + "--";
|
||||
break;
|
||||
|
||||
case PRE_INC:
|
||||
outStr += "++" + unaryExp->walkCondExpr (pProc, numLoc);
|
||||
break;
|
||||
|
||||
case PRE_DEC:
|
||||
outStr += "--" + unaryExp->walkCondExpr (pProc, numLoc);
|
||||
break;
|
||||
}
|
||||
return outStr;
|
||||
}
|
||||
@ -665,9 +669,6 @@ QString UnaryOperator::walkCondExpr(Function *pProc, int *numLoc) const
|
||||
/* Walks the conditional expression tree and returns the result on a string */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Changes the boolean conditional operator at the root of this expression */
|
||||
void BinaryOperator::changeBoolOp (condOp newOp)
|
||||
{
|
||||
@ -689,7 +690,7 @@ bool Expr::insertSubTreeReg (AstIdent *&tree, Expr *_expr, eReg regi,const LOCAL
|
||||
* register regi */
|
||||
bool Expr::insertSubTreeReg (Expr *&tree, Expr *_expr, eReg regi,const LOCAL_ID *locsym)
|
||||
{
|
||||
|
||||
|
||||
if (tree == nullptr)
|
||||
return false;
|
||||
Expr *temp=tree->insertSubTreeReg(_expr,regi,locsym);
|
||||
@ -704,20 +705,20 @@ bool Expr::insertSubTreeReg (Expr *&tree, Expr *_expr, eReg regi,const LOCAL_ID
|
||||
Expr *UnaryOperator::insertSubTreeReg(Expr *_expr, eReg regi, const LOCAL_ID *locsym)
|
||||
{
|
||||
Expr *temp;
|
||||
|
||||
|
||||
switch (m_type) {
|
||||
case NEGATION:
|
||||
case ADDRESSOF:
|
||||
case DEREFERENCE:
|
||||
temp = unaryExp->insertSubTreeReg( _expr, regi, locsym);
|
||||
if (nullptr!=temp)
|
||||
{
|
||||
unaryExp = temp;
|
||||
return this;
|
||||
}
|
||||
return nullptr;
|
||||
default:
|
||||
fprintf(stderr,"insertSubTreeReg attempt on unhandled type %d\n",m_type);
|
||||
case NEGATION:
|
||||
case ADDRESSOF:
|
||||
case DEREFERENCE:
|
||||
temp = unaryExp->insertSubTreeReg( _expr, regi, locsym);
|
||||
if (nullptr!=temp)
|
||||
{
|
||||
unaryExp = temp;
|
||||
return this;
|
||||
}
|
||||
return nullptr;
|
||||
default:
|
||||
fprintf(stderr,"insertSubTreeReg attempt on unhandled type %d\n",m_type);
|
||||
}
|
||||
return nullptr;
|
||||
}
|
||||
@ -798,9 +799,8 @@ Expr *BinaryOperator::insertSubTreeLongReg(Expr *_expr, int longIdx)
|
||||
Expr *AstIdent::insertSubTreeLongReg(Expr *_expr, int longIdx)
|
||||
{
|
||||
if (ident.idNode.longIdx == longIdx)
|
||||
{
|
||||
return _expr;
|
||||
}
|
||||
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
@ -816,53 +816,51 @@ Expr *BinaryOperator::clone() const
|
||||
|
||||
Expr *BinaryOperator::inverse() const
|
||||
{
|
||||
static condOp invCondOp[] = {GREATER, GREATER_EQUAL, NOT_EQUAL, EQUAL,
|
||||
LESS_EQUAL, LESS, DUMMY,DUMMY,DUMMY,DUMMY,
|
||||
DUMMY, DUMMY, DUMMY, DUMMY, DUMMY, DUMMY,
|
||||
DUMMY, DBL_OR, DBL_AND};
|
||||
constexpr static condOp invCondOp[] = {GREATER, GREATER_EQUAL, NOT_EQUAL, EQUAL,
|
||||
LESS_EQUAL, LESS, DUMMY,DUMMY,DUMMY,DUMMY,
|
||||
DUMMY, DUMMY, DUMMY, DUMMY, DUMMY, DUMMY,
|
||||
DUMMY, DBL_OR, DBL_AND};
|
||||
BinaryOperator *res=reinterpret_cast<BinaryOperator *>(this->clone());
|
||||
switch (m_op)
|
||||
{
|
||||
case LESS_EQUAL: case LESS: case EQUAL:
|
||||
case NOT_EQUAL: case GREATER: case GREATER_EQUAL:
|
||||
res->m_op = invCondOp[m_op];
|
||||
return res;
|
||||
|
||||
case AND: case OR: case XOR: case NOT: case ADD:
|
||||
case SUB: case MUL: case DIV: case SHR: case SHL: case MOD:
|
||||
return UnaryOperator::Create(NEGATION, res);
|
||||
|
||||
case DBL_AND: case DBL_OR:
|
||||
res->m_op = invCondOp[m_op];
|
||||
res->m_lhs=m_lhs->inverse ();
|
||||
res->m_rhs=m_rhs->inverse ();
|
||||
return res;
|
||||
default:
|
||||
fprintf(stderr,"BinaryOperator::inverse attempt on unhandled op %d\n",m_op);
|
||||
case LESS_EQUAL: case LESS: case EQUAL:
|
||||
case NOT_EQUAL: case GREATER: case GREATER_EQUAL:
|
||||
res->m_op = invCondOp[m_op];
|
||||
return res;
|
||||
|
||||
case AND: case OR: case XOR: case NOT: case ADD:
|
||||
case SUB: case MUL: case DIV: case SHR: case SHL: case MOD:
|
||||
return UnaryOperator::Create(NEGATION, res);
|
||||
|
||||
case DBL_AND: case DBL_OR:
|
||||
res->m_op = invCondOp[m_op];
|
||||
res->m_lhs=m_lhs->inverse ();
|
||||
res->m_rhs=m_rhs->inverse ();
|
||||
return res;
|
||||
default:
|
||||
fprintf(stderr,"BinaryOperator::inverse attempt on unhandled op %d\n",m_op);
|
||||
} /* eos */
|
||||
assert(false);
|
||||
return res;
|
||||
|
||||
|
||||
}
|
||||
Expr *AstIdent::performLongRemoval(eReg regi, LOCAL_ID *locId)
|
||||
{
|
||||
eReg otherRegi; /* high or low part of long register */
|
||||
|
||||
if (ident.idType == LONG_VAR)
|
||||
{
|
||||
otherRegi = locId->getPairedRegisterAt(ident.idNode.longIdx,regi);
|
||||
delete this;
|
||||
return new RegisterNode(locId->newByteWordReg(TYPE_WORD_SIGN,otherRegi),WORD_REG,locId);
|
||||
}
|
||||
return this;
|
||||
|
||||
if (ident.idType != LONG_VAR)
|
||||
return this;
|
||||
otherRegi = locId->getPairedRegisterAt(ident.idNode.longIdx,regi);
|
||||
bool long_was_signed = locId->id_arr[ident.idNode.longIdx].isSigned();
|
||||
delete this;
|
||||
return new RegisterNode(locId->newByteWordReg(long_was_signed ? TYPE_WORD_SIGN : TYPE_WORD_UNSIGN,otherRegi),WORD_REG,locId);
|
||||
}
|
||||
|
||||
QString Constant::walkCondExpr(Function *, int *) const
|
||||
{
|
||||
if (kte.kte < 1000)
|
||||
return QString::number(kte.kte);
|
||||
else
|
||||
return "0x" + QString::number(kte.kte,16);
|
||||
return "0x" + QString::number(kte.kte,16);
|
||||
}
|
||||
|
||||
int Constant::hlTypeSize(Function *) const
|
||||
@ -870,8 +868,6 @@ int Constant::hlTypeSize(Function *) const
|
||||
return kte.size;
|
||||
}
|
||||
|
||||
|
||||
|
||||
QString FuncNode::walkCondExpr(Function *pProc, int *numLoc) const
|
||||
{
|
||||
return pProc->writeCall(call.proc,*call.args, numLoc);
|
||||
|
||||
@ -158,9 +158,9 @@ void Project::writeGlobSymTable()
|
||||
else { /* first defined */
|
||||
switch (sym.size) {
|
||||
case 1: ostr<<"uint8_t\t"; break;
|
||||
case 2: ostr<<"int\t"; break;
|
||||
case 2: ostr<<"int16_t\t"; break;
|
||||
case 4: if (sym.type == TYPE_PTR)
|
||||
ostr<<"int\t*";
|
||||
ostr<<"int32_t\t*";
|
||||
else
|
||||
ostr<<"char\t*";
|
||||
break;
|
||||
|
||||
@ -735,7 +735,7 @@ int C_CallingConvention::processCArg (Function * callee, Function * pProc, ICODE
|
||||
callee->args.adjustForArgType (numArgs, _exp->expType (pProc));
|
||||
}
|
||||
}
|
||||
res = picode->newStkArg (_exp, (llIcode)picode->ll()->getOpcode(), pProc);
|
||||
res = picode->newStkArg (_exp, picode->ll()->getOpcode(), pProc);
|
||||
/* Do not update the size of k if the expression was a segment register
|
||||
* in a near call */
|
||||
if (res == false)
|
||||
@ -850,7 +850,7 @@ void Pascal_CallingConvention::processHLI(Function *func,Expr *_exp, iICODE pico
|
||||
{
|
||||
if (pp->args.numArgs > 0)
|
||||
_exp = func->adjustActArgType(_exp, pp->args[numArgs].type);
|
||||
res = picode->newStkArg (_exp, (llIcode)picode->ll()->getOpcode(), func);
|
||||
res = picode->newStkArg (_exp, picode->ll()->getOpcode(), func);
|
||||
}
|
||||
else /* user function */
|
||||
{
|
||||
@ -863,7 +863,7 @@ void Pascal_CallingConvention::processHLI(Function *func,Expr *_exp, iICODE pico
|
||||
else
|
||||
pp->args.adjustForArgType (numArgs,_exp->expType (func));
|
||||
}
|
||||
res = picode->newStkArg (_exp,(llIcode)picode->ll()->getOpcode(), func);
|
||||
res = picode->newStkArg (_exp, picode->ll()->getOpcode(), func);
|
||||
}
|
||||
if (res == false)
|
||||
k += _exp->hlTypeSize (func);
|
||||
|
||||
@ -75,8 +75,7 @@ eReg ID::getPairedRegister(eReg first) const {
|
||||
* ix : index into icode array where this var is used */
|
||||
void LOCAL_ID::newIdent(hlType t, frameType f)
|
||||
{
|
||||
ID newid(t,f);
|
||||
id_arr.push_back(newid);
|
||||
id_arr.emplace_back(t,f);
|
||||
}
|
||||
|
||||
|
||||
@ -92,9 +91,8 @@ int LOCAL_ID::newByteWordReg(hlType t, eReg regi)
|
||||
return found-id_arr.begin();
|
||||
/* Not in table, create new identifier */
|
||||
newIdent (t, REG_FRAME);
|
||||
int idx = id_arr.size() - 1;
|
||||
id_arr[idx].id.regi = regi;
|
||||
return (idx);
|
||||
id_arr.back().id.regi = regi;
|
||||
return id_arr.size() - 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -5,12 +5,11 @@
|
||||
#include "CallGraph.h"
|
||||
#include "project.h"
|
||||
#include "Procedure.h"
|
||||
|
||||
using namespace std;
|
||||
//Project g_proj;
|
||||
|
||||
QString asm1_name, asm2_name; /* Assembler output filenames */
|
||||
SYMTAB symtab; /* Global symbol table */
|
||||
STATS stats; /* cfg statistics */
|
||||
//PROG prog; /* programs fields */
|
||||
OPTION option; /* Command line options */
|
||||
Project *Project::s_instance = nullptr;
|
||||
Project::Project() : callGraph(nullptr)
|
||||
@ -40,7 +39,7 @@ bool Project::valid(ilFunction iter)
|
||||
ilFunction Project::funcIter(Function *to_find)
|
||||
{
|
||||
auto iter=std::find_if(pProcList.begin(),pProcList.end(),
|
||||
[to_find](const Function &f)->bool {return to_find==&f;});
|
||||
[to_find](const Function &f)->bool {return to_find==&f;});
|
||||
assert(iter!=pProcList.end());
|
||||
return iter;
|
||||
}
|
||||
@ -49,8 +48,8 @@ ilFunction Project::findByEntry(uint32_t entry)
|
||||
{
|
||||
/* Search procedure list for one with appropriate entry point */
|
||||
ilFunction iter= std::find_if(pProcList.begin(),pProcList.end(),
|
||||
[entry](const Function &f) { return f.procEntry==entry; });
|
||||
return iter;
|
||||
[entry](const Function &f) { return f.procEntry==entry; });
|
||||
return iter;
|
||||
}
|
||||
|
||||
ilFunction Project::createFunction(FunctionType *f,const QString &name)
|
||||
@ -59,7 +58,7 @@ ilFunction Project::createFunction(FunctionType *f,const QString &name)
|
||||
return (++pProcList.rbegin()).base();
|
||||
}
|
||||
|
||||
int Project::getSymIdxByAdd(uint32_t adr)
|
||||
int Project::getSymIdxByAddr(uint32_t adr)
|
||||
{
|
||||
size_t i;
|
||||
for (i = 0; i < symtab.size(); i++)
|
||||
@ -98,8 +97,6 @@ Project *Project::get()
|
||||
s_instance=new Project;
|
||||
return s_instance;
|
||||
}
|
||||
|
||||
|
||||
SourceMachine *Project::machine()
|
||||
{
|
||||
return nullptr;
|
||||
|
||||
@ -69,8 +69,8 @@ static bool isLong22 (iICODE pIcode, iICODE pEnd, iICODE &off)
|
||||
// preincrement because pIcode is not checked here
|
||||
iICODE icodes[] = { ++pIcode,++pIcode,++pIcode };
|
||||
if ( icodes[1]->ll()->match(iCMP) and
|
||||
(isJCond ((llIcode)icodes[0]->ll()->getOpcode())) and
|
||||
(isJCond ((llIcode)icodes[2]->ll()->getOpcode())))
|
||||
(isJCond (icodes[0]->ll()->getOpcode())) and
|
||||
(isJCond (icodes[2]->ll()->getOpcode())))
|
||||
{
|
||||
off = initial_icode;
|
||||
advance(off,2);
|
||||
@ -500,7 +500,7 @@ int Function::findForwardLongUses(int loc_ident_idx, const ID &pLocId, iICODE be
|
||||
* JX lab
|
||||
* => HLI_JCOND (regH:regL X 0) lab
|
||||
* This is better code than HLI_JCOND (HI(regH:regL) | LO(regH:regL)) */
|
||||
else if (pIcode->ll()->match(iOR) and (next1 != pEnd) and (isJCond ((llIcode)next1->ll()->getOpcode())))
|
||||
else if (pIcode->ll()->match(iOR) and (next1 != pEnd) and (isJCond (next1->ll()->getOpcode())))
|
||||
{
|
||||
if (pLocId.longId().srcDstRegMatch(pIcode,pIcode))
|
||||
{
|
||||
|
||||
601
src/scanner.cpp
601
src/scanner.cpp
@ -1,5 +1,5 @@
|
||||
/*****************************************************************************
|
||||
* dcc project scanner module
|
||||
* dcc project scanner module
|
||||
* Implements a simple state driven scanner to convert 8086 machine code into
|
||||
* I-code
|
||||
* (C) Cristina Cifuentes, Jeff Ledermann
|
||||
@ -19,7 +19,6 @@
|
||||
#define S_EXT 0x000200 /* sign extend */
|
||||
#define OP386 0x000400 /* 386 op-code */
|
||||
#define NSP 0x000800 /* NOT_HLL if SP is src or dst */
|
||||
// defined in Enums.h #define ICODEMASK 0xFF00FF /* Masks off parser flags */
|
||||
|
||||
static void rm(int i);
|
||||
static void modrm(int i);
|
||||
@ -51,276 +50,276 @@ static void none1(int i);
|
||||
static void none2(int i);
|
||||
static void checkInt(int i);
|
||||
|
||||
#define iZERO (llIcode)0 // For neatness
|
||||
#define IC llIcode
|
||||
#define IC llIcode
|
||||
|
||||
static struct {
|
||||
struct StateTabelEntry {
|
||||
void (*state1)(int);
|
||||
void (*state2)(int);
|
||||
uint32_t flg;
|
||||
llIcode opcode;
|
||||
} stateTable[] = {
|
||||
{ modrm, none2, B , iADD }, /* 00 */
|
||||
{ modrm, none2, 0 , iADD }, /* 01 */
|
||||
{ modrm, none2, TO_REG | B , iADD }, /* 02 */
|
||||
{ modrm, none2, TO_REG , iADD }, /* 03 */
|
||||
{ data1, axImp, B , iADD }, /* 04 */
|
||||
{ data2, axImp, 0 , iADD }, /* 05 */
|
||||
{ segop, none2, NO_SRC , iPUSH }, /* 06 */
|
||||
{ segop, none2, NO_SRC , iPOP }, /* 07 */
|
||||
{ modrm, none2, B , iOR }, /* 08 */
|
||||
{ modrm, none2, NSP , iOR }, /* 09 */
|
||||
{ modrm, none2, TO_REG | B , iOR }, /* 0A */
|
||||
{ modrm, none2, TO_REG | NSP , iOR }, /* 0B */
|
||||
{ data1, axImp, B , iOR }, /* 0C */
|
||||
{ data2, axImp, 0 , iOR }, /* 0D */
|
||||
{ segop, none2, NO_SRC , iPUSH }, /* 0E */
|
||||
{ none1, none2, OP386 , iZERO }, /* 0F */
|
||||
{ modrm, none2, B , iADC }, /* 10 */
|
||||
{ modrm, none2, NSP , iADC }, /* 11 */
|
||||
{ modrm, none2, TO_REG | B , iADC }, /* 12 */
|
||||
{ modrm, none2, TO_REG | NSP , iADC }, /* 13 */
|
||||
{ data1, axImp, B , iADC }, /* 14 */
|
||||
{ data2, axImp, 0 , iADC }, /* 15 */
|
||||
{ segop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 16 */
|
||||
{ segop, none2, NOT_HLL | NO_SRC , iPOP }, /* 17 */
|
||||
{ modrm, none2, B , iSBB }, /* 18 */
|
||||
{ modrm, none2, NSP , iSBB }, /* 19 */
|
||||
{ modrm, none2, TO_REG | B , iSBB }, /* 1A */
|
||||
{ modrm, none2, TO_REG | NSP , iSBB }, /* 1B */
|
||||
{ data1, axImp, B , iSBB }, /* 1C */
|
||||
{ data2, axImp, 0 , iSBB }, /* 1D */
|
||||
{ segop, none2, NO_SRC , iPUSH }, /* 1E */
|
||||
{ segop, none2, NO_SRC , iPOP }, /* 1F */
|
||||
{ modrm, none2, B , iAND }, /* 20 */
|
||||
{ modrm, none2, NSP , iAND }, /* 21 */
|
||||
{ modrm, none2, TO_REG | B , iAND }, /* 22 */
|
||||
{ modrm, none2, TO_REG | NSP , iAND }, /* 23 */
|
||||
{ data1, axImp, B , iAND }, /* 24 */
|
||||
{ data2, axImp, 0 , iAND }, /* 25 */
|
||||
{ prefix, none2, 0 , (IC)rES}, /* 26 */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iDAA }, /* 27 */
|
||||
{ modrm, none2, B , iSUB }, /* 28 */
|
||||
{ modrm, none2, 0 , iSUB }, /* 29 */
|
||||
{ modrm, none2, TO_REG | B , iSUB }, /* 2A */
|
||||
{ modrm, none2, TO_REG , iSUB }, /* 2B */
|
||||
{ data1, axImp, B , iSUB }, /* 2C */
|
||||
{ data2, axImp, 0 , iSUB }, /* 2D */
|
||||
{ prefix, none2, 0 , (IC)rCS}, /* 2E */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iDAS }, /* 2F */
|
||||
{ modrm, none2, B , iXOR }, /* 30 */
|
||||
{ modrm, none2, NSP , iXOR }, /* 31 */
|
||||
{ modrm, none2, TO_REG | B , iXOR }, /* 32 */
|
||||
{ modrm, none2, TO_REG | NSP , iXOR }, /* 33 */
|
||||
{ data1, axImp, B , iXOR }, /* 34 */
|
||||
{ data2, axImp, 0 , iXOR }, /* 35 */
|
||||
{ prefix, none2, 0 , (IC)rSS}, /* 36 */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iAAA }, /* 37 */
|
||||
{ modrm, none2, B , iCMP }, /* 38 */
|
||||
{ modrm, none2, NSP , iCMP }, /* 39 */
|
||||
{ modrm, none2, TO_REG | B , iCMP }, /* 3A */
|
||||
{ modrm, none2, TO_REG | NSP , iCMP }, /* 3B */
|
||||
{ data1, axImp, B , iCMP }, /* 3C */
|
||||
{ data2, axImp, 0 , iCMP }, /* 3D */
|
||||
{ prefix, none2, 0 , (IC)rDS}, /* 3E */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iAAS }, /* 3F */
|
||||
{ regop, none2, 0 , iINC }, /* 40 */
|
||||
{ regop, none2, 0 , iINC }, /* 41 */
|
||||
{ regop, none2, 0 , iINC }, /* 42 */
|
||||
{ regop, none2, 0 , iINC }, /* 43 */
|
||||
{ regop, none2, NOT_HLL , iINC }, /* 44 */
|
||||
{ regop, none2, 0 , iINC }, /* 45 */
|
||||
{ regop, none2, 0 , iINC }, /* 46 */
|
||||
{ regop, none2, 0 , iINC }, /* 47 */
|
||||
{ regop, none2, 0 , iDEC }, /* 48 */
|
||||
{ regop, none2, 0 , iDEC }, /* 49 */
|
||||
{ regop, none2, 0 , iDEC }, /* 4A */
|
||||
{ regop, none2, 0 , iDEC }, /* 4B */
|
||||
{ regop, none2, NOT_HLL , iDEC }, /* 4C */
|
||||
{ regop, none2, 0 , iDEC }, /* 4D */
|
||||
{ regop, none2, 0 , iDEC }, /* 4E */
|
||||
{ regop, none2, 0 , iDEC }, /* 4F */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 50 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 51 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 52 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 53 */
|
||||
{ regop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 54 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 55 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 56 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 57 */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 58 */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 59 */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5A */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5B */
|
||||
{ regop, none2, NOT_HLL | NO_SRC , iPOP }, /* 5C */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5D */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5E */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5F */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPUSHA}, /* 60 */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPOPA }, /* 61 */
|
||||
{ memOnly, modrm, TO_REG | NSP , iBOUND}, /* 62 */
|
||||
{ none1, none2, OP386 , iZERO }, /* 63 */
|
||||
{ none1, none2, OP386 , iZERO }, /* 64 */
|
||||
{ none1, none2, OP386 , iZERO }, /* 65 */
|
||||
{ none1, none2, OP386 , iZERO }, /* 66 */
|
||||
{ none1, none2, OP386 , iZERO }, /* 67 */
|
||||
{ data2, none2, NO_SRC , iPUSH }, /* 68 */
|
||||
{ modrm, data2, TO_REG | NSP , iIMUL }, /* 69 */
|
||||
{ data1, none2, S_EXT | NO_SRC , iPUSH }, /* 6A */
|
||||
{ modrm, data1, TO_REG | NSP | S_EXT , iIMUL }, /* 6B */
|
||||
{ strop, memImp, NOT_HLL | B|IM_OPS , iINS }, /* 6C */
|
||||
{ strop, memImp, NOT_HLL | IM_OPS , iINS }, /* 6D */
|
||||
{ strop, memImp, NOT_HLL | B|IM_OPS , iOUTS }, /* 6E */
|
||||
{ strop, memImp, NOT_HLL | IM_OPS , iOUTS }, /* 6F */
|
||||
{ dispS, none2, NOT_HLL , iJO }, /* 70 */
|
||||
{ dispS, none2, NOT_HLL , iJNO }, /* 71 */
|
||||
{ dispS, none2, 0 , iJB }, /* 72 */
|
||||
{ dispS, none2, 0 , iJAE }, /* 73 */
|
||||
{ dispS, none2, 0 , iJE }, /* 74 */
|
||||
{ dispS, none2, 0 , iJNE }, /* 75 */
|
||||
{ dispS, none2, 0 , iJBE }, /* 76 */
|
||||
{ dispS, none2, 0 , iJA }, /* 77 */
|
||||
{ dispS, none2, 0 , iJS }, /* 78 */
|
||||
{ dispS, none2, 0 , iJNS }, /* 79 */
|
||||
{ dispS, none2, NOT_HLL , iJP }, /* 7A */
|
||||
{ dispS, none2, NOT_HLL , iJNP }, /* 7B */
|
||||
{ dispS, none2, 0 , iJL }, /* 7C */
|
||||
{ dispS, none2, 0 , iJGE }, /* 7D */
|
||||
{ dispS, none2, 0 , iJLE }, /* 7E */
|
||||
{ dispS, none2, 0 , iJG }, /* 7F */
|
||||
{ immed, data1, B , iZERO }, /* 80 */
|
||||
{ immed, data2, NSP , iZERO }, /* 81 */
|
||||
{ immed, data1, B , iZERO }, /* 82 */ /* ?? */
|
||||
{ immed, data1, NSP | S_EXT , iZERO }, /* 83 */
|
||||
{ modrm, none2, TO_REG | B , iTEST }, /* 84 */
|
||||
{ modrm, none2, TO_REG | NSP , iTEST }, /* 85 */
|
||||
{ modrm, none2, TO_REG | B , iXCHG }, /* 86 */
|
||||
{ modrm, none2, TO_REG | NSP , iXCHG }, /* 87 */
|
||||
{ modrm, none2, B , iMOV }, /* 88 */
|
||||
{ modrm, none2, 0 , iMOV }, /* 89 */
|
||||
{ modrm, none2, TO_REG | B , iMOV }, /* 8A */
|
||||
{ modrm, none2, TO_REG , iMOV }, /* 8B */
|
||||
{ segrm, none2, NSP , iMOV }, /* 8C */
|
||||
{ memOnly, modrm, TO_REG | NSP , iLEA }, /* 8D */
|
||||
{ segrm, none2, TO_REG | NSP , iMOV }, /* 8E */
|
||||
{ memReg0, none2, NO_SRC , iPOP }, /* 8F */
|
||||
{ none1, none2, NO_OPS , iNOP }, /* 90 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 91 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 92 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 93 */
|
||||
{ regop, axImp, NOT_HLL , iXCHG }, /* 94 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 95 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 96 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 97 */
|
||||
{ alImp, axImp, SRC_B | S_EXT , iSIGNEX}, /* 98 */
|
||||
{axSrcIm, axImp, IM_DST | S_EXT , iSIGNEX}, /* 99 */
|
||||
{ dispF, none2, TO_REG , iCALLF }, /* 9A */ // TO_REG set to use SRC when processing setAddress
|
||||
{ none1, none2, FLOAT_OP| NO_OPS , iWAIT }, /* 9B */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPUSHF}, /* 9C */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPOPF }, /* 9D */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iSAHF }, /* 9E */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iLAHF }, /* 9F */
|
||||
{ dispM, axImp, B , iMOV }, /* A0 */
|
||||
{ dispM, axImp, 0 , iMOV }, /* A1 */
|
||||
{ dispM, axImp, TO_REG | B , iMOV }, /* A2 */
|
||||
{ dispM, axImp, TO_REG , iMOV }, /* A3 */
|
||||
{ strop, memImp, B | IM_OPS , iMOVS }, /* A4 */
|
||||
{ strop, memImp, IM_OPS , iMOVS }, /* A5 */
|
||||
{ strop, memImp, B | IM_OPS , iCMPS }, /* A6 */
|
||||
{ strop, memImp, IM_OPS , iCMPS }, /* A7 */
|
||||
{ data1, axImp, B , iTEST }, /* A8 */
|
||||
{ data2, axImp, 0 , iTEST }, /* A9 */
|
||||
{ strop, memImp, B | IM_OPS , iSTOS }, /* AA */
|
||||
{ strop, memImp, IM_OPS , iSTOS }, /* AB */
|
||||
{ strop, memImp, B | IM_OPS , iLODS }, /* AC */
|
||||
{ strop, memImp, IM_OPS , iLODS }, /* AD */
|
||||
{ strop, memImp, B | IM_OPS , iSCAS }, /* AE */
|
||||
{ strop, memImp, IM_OPS , iSCAS }, /* AF */
|
||||
{ regop, data1, B , iMOV }, /* B0 */
|
||||
{ regop, data1, B , iMOV }, /* B1 */
|
||||
{ regop, data1, B , iMOV }, /* B2 */
|
||||
{ regop, data1, B , iMOV }, /* B3 */
|
||||
{ regop, data1, B , iMOV }, /* B4 */
|
||||
{ regop, data1, B , iMOV }, /* B5 */
|
||||
{ regop, data1, B , iMOV }, /* B6 */
|
||||
{ regop, data1, B , iMOV }, /* B7 */
|
||||
{ regop, data2, 0 , iMOV }, /* B8 */
|
||||
{ regop, data2, 0 , iMOV }, /* B9 */
|
||||
{ regop, data2, 0 , iMOV }, /* BA */
|
||||
{ regop, data2, 0 , iMOV }, /* BB */
|
||||
{ regop, data2, NOT_HLL , iMOV }, /* BC */
|
||||
{ regop, data2, 0 , iMOV }, /* BD */
|
||||
{ regop, data2, 0 , iMOV }, /* BE */
|
||||
{ regop, data2, 0 , iMOV }, /* BF */
|
||||
{ shift, data1, B , iZERO }, /* C0 */
|
||||
{ shift, data1, NSP | SRC_B , iZERO }, /* C1 */
|
||||
{ data2, none2, 0 , iRET }, /* C2 */
|
||||
{ none1, none2, NO_OPS , iRET }, /* C3 */
|
||||
{ memOnly, modrm, TO_REG | NSP , iLES }, /* C4 */
|
||||
{ memOnly, modrm, TO_REG | NSP , iLDS }, /* C5 */
|
||||
{ memReg0, data1, B , iMOV }, /* C6 */
|
||||
{ memReg0, data2, 0 , iMOV }, /* C7 */
|
||||
{ data2, data1, 0 , iENTER}, /* C8 */
|
||||
{ none1, none2, NO_OPS , iLEAVE}, /* C9 */
|
||||
{ data2, none2, 0 , iRETF }, /* CA */
|
||||
{ none1, none2, NO_OPS , iRETF }, /* CB */
|
||||
{ const3, none2, NOT_HLL , iINT }, /* CC */
|
||||
{ data1,checkInt, NOT_HLL , iINT }, /* CD */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iINTO }, /* CE */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iIRET }, /* Cf */
|
||||
{ shift, const1, B , iZERO }, /* D0 */
|
||||
{ shift, const1, SRC_B , iZERO }, /* D1 */
|
||||
{ shift, none1, B , iZERO }, /* D2 */
|
||||
{ shift, none1, SRC_B , iZERO }, /* D3 */
|
||||
{ data1, axImp, NOT_HLL , iAAM }, /* D4 */
|
||||
{ data1, axImp, NOT_HLL , iAAD }, /* D5 */
|
||||
{ none1, none2, 0 , iZERO }, /* D6 */
|
||||
{ memImp, axImp, NOT_HLL | B| IM_OPS , iXLAT }, /* D7 */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* D8 */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* D9 */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DA */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DB */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DC */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DD */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DE */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* Df */
|
||||
{ dispS, none2, 0 , iLOOPNE}, /* E0 */
|
||||
{ dispS, none2, 0 , iLOOPE}, /* E1 */
|
||||
{ dispS, none2, 0 , iLOOP }, /* E2 */
|
||||
{ dispS, none2, 0 , iJCXZ }, /* E3 */
|
||||
{ data1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* E4 */
|
||||
{ data1, axImp, NOT_HLL | NO_SRC , iIN }, /* E5 */
|
||||
{ data1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* E6 */
|
||||
{ data1, axImp, NOT_HLL | NO_SRC , iOUT }, /* E7 */
|
||||
{ dispN, none2, 0 , iCALL }, /* E8 */
|
||||
{ dispN, none2, 0 , iJMP }, /* E9 */
|
||||
{ dispF, none2, 0 , iJMPF }, /* EA */
|
||||
{ dispS, none2, 0 , iJMP }, /* EB */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* EC */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iIN }, /* ED */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* EE */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iOUT }, /* EF */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iLOCK }, /* F0 */
|
||||
{ none1, none2, 0 , iZERO }, /* F1 */
|
||||
{ prefix, none2, 0 , iREPNE}, /* F2 */
|
||||
{ prefix, none2, 0 , iREPE }, /* F3 */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iHLT }, /* F4 */
|
||||
{ none1, none2, NO_OPS , iCMC }, /* F5 */
|
||||
{ arith, none1, B , iZERO }, /* F6 */
|
||||
{ arith, none1, NSP , iZERO }, /* F7 */
|
||||
{ none1, none2, NO_OPS , iCLC }, /* F8 */
|
||||
{ none1, none2, NO_OPS , iSTC }, /* F9 */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iCLI }, /* FA */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iSTI }, /* FB */
|
||||
{ none1, none2, NO_OPS , iCLD }, /* FC */
|
||||
{ none1, none2, NO_OPS , iSTD }, /* FD */
|
||||
{ trans, none1, B , iZERO }, /* FE */
|
||||
{ trans, none1, NSP , iZERO } /* FF */
|
||||
};
|
||||
static const StateTabelEntry stateTable[] = {
|
||||
{ modrm, none2, B , iADD }, /* 00 */
|
||||
{ modrm, none2, 0 , iADD }, /* 01 */
|
||||
{ modrm, none2, TO_REG | B , iADD }, /* 02 */
|
||||
{ modrm, none2, TO_REG , iADD }, /* 03 */
|
||||
{ data1, axImp, B , iADD }, /* 04 */
|
||||
{ data2, axImp, 0 , iADD }, /* 05 */
|
||||
{ segop, none2, NO_SRC , iPUSH }, /* 06 */
|
||||
{ segop, none2, NO_SRC , iPOP }, /* 07 */
|
||||
{ modrm, none2, B , iOR }, /* 08 */
|
||||
{ modrm, none2, NSP , iOR }, /* 09 */
|
||||
{ modrm, none2, TO_REG | B , iOR }, /* 0A */
|
||||
{ modrm, none2, TO_REG | NSP , iOR }, /* 0B */
|
||||
{ data1, axImp, B , iOR }, /* 0C */
|
||||
{ data2, axImp, 0 , iOR }, /* 0D */
|
||||
{ segop, none2, NO_SRC , iPUSH }, /* 0E */
|
||||
{ none1, none2, OP386 , iINVALID }, /* 0F */
|
||||
{ modrm, none2, B , iADC }, /* 10 */
|
||||
{ modrm, none2, NSP , iADC }, /* 11 */
|
||||
{ modrm, none2, TO_REG | B , iADC }, /* 12 */
|
||||
{ modrm, none2, TO_REG | NSP , iADC }, /* 13 */
|
||||
{ data1, axImp, B , iADC }, /* 14 */
|
||||
{ data2, axImp, 0 , iADC }, /* 15 */
|
||||
{ segop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 16 */
|
||||
{ segop, none2, NOT_HLL | NO_SRC , iPOP }, /* 17 */
|
||||
{ modrm, none2, B , iSBB }, /* 18 */
|
||||
{ modrm, none2, NSP , iSBB }, /* 19 */
|
||||
{ modrm, none2, TO_REG | B , iSBB }, /* 1A */
|
||||
{ modrm, none2, TO_REG | NSP , iSBB }, /* 1B */
|
||||
{ data1, axImp, B , iSBB }, /* 1C */
|
||||
{ data2, axImp, 0 , iSBB }, /* 1D */
|
||||
{ segop, none2, NO_SRC , iPUSH }, /* 1E */
|
||||
{ segop, none2, NO_SRC , iPOP }, /* 1F */
|
||||
{ modrm, none2, B , iAND }, /* 20 */
|
||||
{ modrm, none2, NSP , iAND }, /* 21 */
|
||||
{ modrm, none2, TO_REG | B , iAND }, /* 22 */
|
||||
{ modrm, none2, TO_REG | NSP , iAND }, /* 23 */
|
||||
{ data1, axImp, B , iAND }, /* 24 */
|
||||
{ data2, axImp, 0 , iAND }, /* 25 */
|
||||
{ prefix, none2, 0 , (IC)rES}, /* 26 */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iDAA }, /* 27 */
|
||||
{ modrm, none2, B , iSUB }, /* 28 */
|
||||
{ modrm, none2, 0 , iSUB }, /* 29 */
|
||||
{ modrm, none2, TO_REG | B , iSUB }, /* 2A */
|
||||
{ modrm, none2, TO_REG , iSUB }, /* 2B */
|
||||
{ data1, axImp, B , iSUB }, /* 2C */
|
||||
{ data2, axImp, 0 , iSUB }, /* 2D */
|
||||
{ prefix, none2, 0 , (IC)rCS}, /* 2E */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iDAS }, /* 2F */
|
||||
{ modrm, none2, B , iXOR }, /* 30 */
|
||||
{ modrm, none2, NSP , iXOR }, /* 31 */
|
||||
{ modrm, none2, TO_REG | B , iXOR }, /* 32 */
|
||||
{ modrm, none2, TO_REG | NSP , iXOR }, /* 33 */
|
||||
{ data1, axImp, B , iXOR }, /* 34 */
|
||||
{ data2, axImp, 0 , iXOR }, /* 35 */
|
||||
{ prefix, none2, 0 , (IC)rSS}, /* 36 */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iAAA }, /* 37 */
|
||||
{ modrm, none2, B , iCMP }, /* 38 */
|
||||
{ modrm, none2, NSP , iCMP }, /* 39 */
|
||||
{ modrm, none2, TO_REG | B , iCMP }, /* 3A */
|
||||
{ modrm, none2, TO_REG | NSP , iCMP }, /* 3B */
|
||||
{ data1, axImp, B , iCMP }, /* 3C */
|
||||
{ data2, axImp, 0 , iCMP }, /* 3D */
|
||||
{ prefix, none2, 0 , (IC)rDS}, /* 3E */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iAAS }, /* 3F */
|
||||
{ regop, none2, 0 , iINC }, /* 40 */
|
||||
{ regop, none2, 0 , iINC }, /* 41 */
|
||||
{ regop, none2, 0 , iINC }, /* 42 */
|
||||
{ regop, none2, 0 , iINC }, /* 43 */
|
||||
{ regop, none2, NOT_HLL , iINC }, /* 44 */
|
||||
{ regop, none2, 0 , iINC }, /* 45 */
|
||||
{ regop, none2, 0 , iINC }, /* 46 */
|
||||
{ regop, none2, 0 , iINC }, /* 47 */
|
||||
{ regop, none2, 0 , iDEC }, /* 48 */
|
||||
{ regop, none2, 0 , iDEC }, /* 49 */
|
||||
{ regop, none2, 0 , iDEC }, /* 4A */
|
||||
{ regop, none2, 0 , iDEC }, /* 4B */
|
||||
{ regop, none2, NOT_HLL , iDEC }, /* 4C */
|
||||
{ regop, none2, 0 , iDEC }, /* 4D */
|
||||
{ regop, none2, 0 , iDEC }, /* 4E */
|
||||
{ regop, none2, 0 , iDEC }, /* 4F */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 50 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 51 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 52 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 53 */
|
||||
{ regop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 54 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 55 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 56 */
|
||||
{ regop, none2, NO_SRC , iPUSH }, /* 57 */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 58 */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 59 */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5A */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5B */
|
||||
{ regop, none2, NOT_HLL | NO_SRC , iPOP }, /* 5C */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5D */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5E */
|
||||
{ regop, none2, NO_SRC , iPOP }, /* 5F */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPUSHA}, /* 60 */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPOPA }, /* 61 */
|
||||
{ memOnly, modrm, TO_REG | NSP , iBOUND}, /* 62 */
|
||||
{ none1, none2, OP386 , iINVALID }, /* 63 */
|
||||
{ none1, none2, OP386 , iINVALID }, /* 64 */
|
||||
{ none1, none2, OP386 , iINVALID }, /* 65 */
|
||||
{ none1, none2, OP386 , iINVALID }, /* 66 */
|
||||
{ none1, none2, OP386 , iINVALID }, /* 67 */
|
||||
{ data2, none2, NO_SRC , iPUSH }, /* 68 */
|
||||
{ modrm, data2, TO_REG | NSP , iIMUL }, /* 69 */
|
||||
{ data1, none2, S_EXT | NO_SRC , iPUSH }, /* 6A */
|
||||
{ modrm, data1, TO_REG | NSP | S_EXT , iIMUL }, /* 6B */
|
||||
{ strop, memImp, NOT_HLL | B|IM_OPS , iINS }, /* 6C */
|
||||
{ strop, memImp, NOT_HLL | IM_OPS , iINS }, /* 6D */
|
||||
{ strop, memImp, NOT_HLL | B|IM_OPS , iOUTS }, /* 6E */
|
||||
{ strop, memImp, NOT_HLL | IM_OPS , iOUTS }, /* 6F */
|
||||
{ dispS, none2, NOT_HLL , iJO }, /* 70 */
|
||||
{ dispS, none2, NOT_HLL , iJNO }, /* 71 */
|
||||
{ dispS, none2, 0 , iJB }, /* 72 */
|
||||
{ dispS, none2, 0 , iJAE }, /* 73 */
|
||||
{ dispS, none2, 0 , iJE }, /* 74 */
|
||||
{ dispS, none2, 0 , iJNE }, /* 75 */
|
||||
{ dispS, none2, 0 , iJBE }, /* 76 */
|
||||
{ dispS, none2, 0 , iJA }, /* 77 */
|
||||
{ dispS, none2, 0 , iJS }, /* 78 */
|
||||
{ dispS, none2, 0 , iJNS }, /* 79 */
|
||||
{ dispS, none2, NOT_HLL , iJP }, /* 7A */
|
||||
{ dispS, none2, NOT_HLL , iJNP }, /* 7B */
|
||||
{ dispS, none2, 0 , iJL }, /* 7C */
|
||||
{ dispS, none2, 0 , iJGE }, /* 7D */
|
||||
{ dispS, none2, 0 , iJLE }, /* 7E */
|
||||
{ dispS, none2, 0 , iJG }, /* 7F */
|
||||
{ immed, data1, B , iINVALID }, /* 80 */
|
||||
{ immed, data2, NSP , iINVALID }, /* 81 */
|
||||
{ immed, data1, B , iINVALID }, /* 82 */ /* ?? */
|
||||
{ immed, data1, NSP | S_EXT , iINVALID }, /* 83 */
|
||||
{ modrm, none2, TO_REG | B , iTEST }, /* 84 */
|
||||
{ modrm, none2, TO_REG | NSP , iTEST }, /* 85 */
|
||||
{ modrm, none2, TO_REG | B , iXCHG }, /* 86 */
|
||||
{ modrm, none2, TO_REG | NSP , iXCHG }, /* 87 */
|
||||
{ modrm, none2, B , iMOV }, /* 88 */
|
||||
{ modrm, none2, 0 , iMOV }, /* 89 */
|
||||
{ modrm, none2, TO_REG | B , iMOV }, /* 8A */
|
||||
{ modrm, none2, TO_REG , iMOV }, /* 8B */
|
||||
{ segrm, none2, NSP , iMOV }, /* 8C */
|
||||
{ memOnly, modrm, TO_REG | NSP , iLEA }, /* 8D */
|
||||
{ segrm, none2, TO_REG | NSP , iMOV }, /* 8E */
|
||||
{ memReg0, none2, NO_SRC , iPOP }, /* 8F */
|
||||
{ none1, none2, NO_OPS , iNOP }, /* 90 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 91 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 92 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 93 */
|
||||
{ regop, axImp, NOT_HLL , iXCHG }, /* 94 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 95 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 96 */
|
||||
{ regop, axImp, 0 , iXCHG }, /* 97 */
|
||||
{ alImp, axImp, SRC_B | S_EXT , iSIGNEX}, /* 98 */
|
||||
{axSrcIm, axImp, IM_DST | S_EXT , iSIGNEX}, /* 99 */
|
||||
{ dispF, none2, TO_REG , iCALLF }, /* 9A */ // TO_REG set to use SRC when processing setAddress
|
||||
{ none1, none2, FLOAT_OP| NO_OPS , iWAIT }, /* 9B */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPUSHF}, /* 9C */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iPOPF }, /* 9D */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iSAHF }, /* 9E */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iLAHF }, /* 9F */
|
||||
{ dispM, axImp, B , iMOV }, /* A0 */
|
||||
{ dispM, axImp, 0 , iMOV }, /* A1 */
|
||||
{ dispM, axImp, TO_REG | B , iMOV }, /* A2 */
|
||||
{ dispM, axImp, TO_REG , iMOV }, /* A3 */
|
||||
{ strop, memImp, B | IM_OPS , iMOVS }, /* A4 */
|
||||
{ strop, memImp, IM_OPS , iMOVS }, /* A5 */
|
||||
{ strop, memImp, B | IM_OPS , iCMPS }, /* A6 */
|
||||
{ strop, memImp, IM_OPS , iCMPS }, /* A7 */
|
||||
{ data1, axImp, B , iTEST }, /* A8 */
|
||||
{ data2, axImp, 0 , iTEST }, /* A9 */
|
||||
{ strop, memImp, B | IM_OPS , iSTOS }, /* AA */
|
||||
{ strop, memImp, IM_OPS , iSTOS }, /* AB */
|
||||
{ strop, memImp, B | IM_OPS , iLODS }, /* AC */
|
||||
{ strop, memImp, IM_OPS , iLODS }, /* AD */
|
||||
{ strop, memImp, B | IM_OPS , iSCAS }, /* AE */
|
||||
{ strop, memImp, IM_OPS , iSCAS }, /* AF */
|
||||
{ regop, data1, B , iMOV }, /* B0 */
|
||||
{ regop, data1, B , iMOV }, /* B1 */
|
||||
{ regop, data1, B , iMOV }, /* B2 */
|
||||
{ regop, data1, B , iMOV }, /* B3 */
|
||||
{ regop, data1, B , iMOV }, /* B4 */
|
||||
{ regop, data1, B , iMOV }, /* B5 */
|
||||
{ regop, data1, B , iMOV }, /* B6 */
|
||||
{ regop, data1, B , iMOV }, /* B7 */
|
||||
{ regop, data2, 0 , iMOV }, /* B8 */
|
||||
{ regop, data2, 0 , iMOV }, /* B9 */
|
||||
{ regop, data2, 0 , iMOV }, /* BA */
|
||||
{ regop, data2, 0 , iMOV }, /* BB */
|
||||
{ regop, data2, NOT_HLL , iMOV }, /* BC */
|
||||
{ regop, data2, 0 , iMOV }, /* BD */
|
||||
{ regop, data2, 0 , iMOV }, /* BE */
|
||||
{ regop, data2, 0 , iMOV }, /* BF */
|
||||
{ shift, data1, B , iINVALID }, /* C0 */
|
||||
{ shift, data1, NSP | SRC_B , iINVALID }, /* C1 */
|
||||
{ data2, none2, 0 , iRET }, /* C2 */
|
||||
{ none1, none2, NO_OPS , iRET }, /* C3 */
|
||||
{ memOnly, modrm, TO_REG | NSP , iLES }, /* C4 */
|
||||
{ memOnly, modrm, TO_REG | NSP , iLDS }, /* C5 */
|
||||
{ memReg0, data1, B , iMOV }, /* C6 */
|
||||
{ memReg0, data2, 0 , iMOV }, /* C7 */
|
||||
{ data2, data1, 0 , iENTER}, /* C8 */
|
||||
{ none1, none2, NO_OPS , iLEAVE}, /* C9 */
|
||||
{ data2, none2, 0 , iRETF }, /* CA */
|
||||
{ none1, none2, NO_OPS , iRETF }, /* CB */
|
||||
{ const3, none2, NOT_HLL , iINT }, /* CC */
|
||||
{ data1,checkInt, NOT_HLL , iINT }, /* CD */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iINTO }, /* CE */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iIRET }, /* Cf */
|
||||
{ shift, const1, B , iINVALID }, /* D0 */
|
||||
{ shift, const1, SRC_B , iINVALID }, /* D1 */
|
||||
{ shift, none1, B , iINVALID }, /* D2 */
|
||||
{ shift, none1, SRC_B , iINVALID }, /* D3 */
|
||||
{ data1, axImp, NOT_HLL , iAAM }, /* D4 */
|
||||
{ data1, axImp, NOT_HLL , iAAD }, /* D5 */
|
||||
{ none1, none2, 0 , iINVALID }, /* D6 */
|
||||
{ memImp, axImp, NOT_HLL | B| IM_OPS , iXLAT }, /* D7 */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* D8 */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* D9 */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DA */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DB */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DC */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DD */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* DE */
|
||||
{ escop, none2, FLOAT_OP , iESC }, /* Df */
|
||||
{ dispS, none2, 0 , iLOOPNE}, /* E0 */
|
||||
{ dispS, none2, 0 , iLOOPE}, /* E1 */
|
||||
{ dispS, none2, 0 , iLOOP }, /* E2 */
|
||||
{ dispS, none2, 0 , iJCXZ }, /* E3 */
|
||||
{ data1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* E4 */
|
||||
{ data1, axImp, NOT_HLL | NO_SRC , iIN }, /* E5 */
|
||||
{ data1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* E6 */
|
||||
{ data1, axImp, NOT_HLL | NO_SRC , iOUT }, /* E7 */
|
||||
{ dispN, none2, 0 , iCALL }, /* E8 */
|
||||
{ dispN, none2, 0 , iJMP }, /* E9 */
|
||||
{ dispF, none2, 0 , iJMPF }, /* EA */
|
||||
{ dispS, none2, 0 , iJMP }, /* EB */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* EC */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iIN }, /* ED */
|
||||
{ none1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* EE */
|
||||
{ none1, axImp, NOT_HLL | NO_SRC , iOUT }, /* EF */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iLOCK }, /* F0 */
|
||||
{ none1, none2, 0 , iINVALID }, /* F1 */
|
||||
{ prefix, none2, 0 , iREPNE}, /* F2 */
|
||||
{ prefix, none2, 0 , iREPE }, /* F3 */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iHLT }, /* F4 */
|
||||
{ none1, none2, NO_OPS , iCMC }, /* F5 */
|
||||
{ arith, none1, B , iINVALID }, /* F6 */
|
||||
{ arith, none1, NSP , iINVALID }, /* F7 */
|
||||
{ none1, none2, NO_OPS , iCLC }, /* F8 */
|
||||
{ none1, none2, NO_OPS , iSTC }, /* F9 */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iCLI }, /* FA */
|
||||
{ none1, none2, NOT_HLL | NO_OPS , iSTI }, /* FB */
|
||||
{ none1, none2, NO_OPS , iCLD }, /* FC */
|
||||
{ none1, none2, NO_OPS , iSTD }, /* FD */
|
||||
{ trans, none1, B , iINVALID }, /* FE */
|
||||
{ trans, none1, NSP , iINVALID } /* FF */
|
||||
} ;
|
||||
|
||||
static uint16_t SegPrefix, RepPrefix;
|
||||
static const uint8_t *pInst; /* Ptr. to current uint8_t of instruction */
|
||||
static ICODE * pIcode; /* Ptr to Icode record filled in by scan() */
|
||||
static const uint8_t *pInst; /* Ptr. to current uint8_t of instruction */
|
||||
static ICODE * pIcode; /* Ptr to Icode record filled in by scan() */
|
||||
|
||||
|
||||
static void decodeBranchTgt(x86_insn_t &insn)
|
||||
@ -338,7 +337,7 @@ static void decodeBranchTgt(x86_insn_t &insn)
|
||||
pIcode->ll()->replaceSrc((uint32_t)addr);
|
||||
pIcode->ll()->setFlags(I);
|
||||
// PROG &prog(Project::get()->prog);
|
||||
// long off = (short)getWord(); /* Signed displacement */
|
||||
// long off = (short)getWord(); /* Signed displacement */
|
||||
// assert(addr==(uint32_t)(off + (unsigned)(pInst - prog.image())));
|
||||
|
||||
}
|
||||
@ -538,7 +537,7 @@ eErrorId scan(uint32_t ip, ICODE &p)
|
||||
int op;
|
||||
p = ICODE();
|
||||
p.type = LOW_LEVEL_ICODE;
|
||||
p.ll()->label = ip; /* ip is absolute offset into image*/
|
||||
p.ll()->label = ip; /* ip is absolute offset into image*/
|
||||
if (ip >= (uint32_t)prog.cbImage)
|
||||
{
|
||||
return (IP_OUT_OF_RANGE);
|
||||
@ -557,13 +556,13 @@ eErrorId scan(uint32_t ip, ICODE &p)
|
||||
|
||||
do
|
||||
{
|
||||
op = *pInst++; /* First state - trivial */
|
||||
op = *pInst++; /* First state - trivial */
|
||||
/* Convert to Icode.opcode */
|
||||
p.ll()->set(stateTable[op].opcode,stateTable[op].flg & ICODEMASK);
|
||||
(*stateTable[op].state1)(op); /* Second state */
|
||||
(*stateTable[op].state2)(op); /* Third state */
|
||||
(*stateTable[op].state1)(op); /* Second state */
|
||||
(*stateTable[op].state2)(op); /* Third state */
|
||||
|
||||
} while (stateTable[op].state1 == prefix); /* Loop if prefix */
|
||||
} while (stateTable[op].state1 == prefix); /* Loop if prefix */
|
||||
if(p.insn.group == x86_insn_t::insn_controlflow)
|
||||
{
|
||||
if(p.insn.x86_get_branch_target())
|
||||
@ -571,7 +570,7 @@ eErrorId scan(uint32_t ip, ICODE &p)
|
||||
}
|
||||
// LLOperand conv = convertOperand(*p.insn.get_dest());
|
||||
// assert(conv==p.ll()->dst);
|
||||
if (p.ll()->getOpcode())
|
||||
if (p.ll()->getOpcode()!=iINVALID)
|
||||
{
|
||||
/* Save bytes of image used */
|
||||
p.ll()->numBytes = (uint8_t)((pInst - prog.image()) - ip);
|
||||
@ -591,8 +590,8 @@ eErrorId scan(uint32_t ip, ICODE &p)
|
||||
static bool relocItem(const uint8_t *p)
|
||||
{
|
||||
PROG &prog(Project::get()->prog);
|
||||
int i;
|
||||
uint32_t off = p - prog.image();
|
||||
int i;
|
||||
uint32_t off = p - prog.image();
|
||||
|
||||
for (i = 0; i < prog.cReloc; i++)
|
||||
if (prog.relocTable[i] == off)
|
||||
@ -623,9 +622,9 @@ static int signex(uint8_t b)
|
||||
|
||||
/****************************************************************************
|
||||
* setAddress - Updates the source or destination field for the current
|
||||
* icode, based on fdst and the TO_REG flag.
|
||||
* Note: fdst == true is for the r/m part of the field (dest, unless TO_REG)
|
||||
* fdst == false is for reg part of the field
|
||||
* icode, based on fdst and the TO_REG flag.
|
||||
* Note: fdst == true is for the r/m part of the field (dest, unless TO_REG)
|
||||
* fdst == false is for reg part of the field
|
||||
***************************************************************************/
|
||||
static void setAddress(int i, bool fdst, uint16_t seg, int16_t reg, uint16_t off)
|
||||
{
|
||||
@ -635,19 +634,19 @@ static void setAddress(int i, bool fdst, uint16_t seg, int16_t reg, uint16_t off
|
||||
/* Set segment. A later procedure (lookupAddr in proclist.c) will
|
||||
* provide the value of this segment in the field segValue.
|
||||
*/
|
||||
if (seg) /* segment override */
|
||||
if (seg) /* segment override */
|
||||
{
|
||||
pm->seg = pm->segOver = (eReg)seg;
|
||||
}
|
||||
else
|
||||
{ /* no override, check indexed register */
|
||||
{ /* no override, check indexed register */
|
||||
if ((reg >= INDEX_BX_SI) and (reg == INDEX_BP_SI or reg == INDEX_BP_DI or reg == INDEX_BP))
|
||||
{
|
||||
pm->seg = rSS; /* indexed on bp */
|
||||
pm->seg = rSS; /* indexed on bp */
|
||||
}
|
||||
else
|
||||
{
|
||||
pm->seg = rDS; /* any other indexed reg */
|
||||
pm->seg = rDS; /* any other indexed reg */
|
||||
}
|
||||
}
|
||||
|
||||
@ -658,7 +657,7 @@ static void setAddress(int i, bool fdst, uint16_t seg, int16_t reg, uint16_t off
|
||||
pm->regi = Machine_X86::subRegL(pm->regi);
|
||||
}
|
||||
|
||||
if (seg) /* So we can catch invalid use of segment overrides */
|
||||
if (seg) /* So we can catch invalid use of segment overrides */
|
||||
{
|
||||
SegPrefix = 0;
|
||||
}
|
||||
@ -674,7 +673,7 @@ static void rm(int i)
|
||||
uint8_t rm = *pInst++ & 7;
|
||||
|
||||
switch (mod) {
|
||||
case 0: /* No disp unless rm == 6 */
|
||||
case 0: /* No disp unless rm == 6 */
|
||||
if (rm == 6) {
|
||||
setAddress(i, true, SegPrefix, 0, getWord());
|
||||
pIcode->ll()->setFlags(WORD_OFF);
|
||||
@ -683,16 +682,16 @@ static void rm(int i)
|
||||
setAddress(i, true, SegPrefix, rm + INDEX_BX_SI, 0);
|
||||
break;
|
||||
|
||||
case 1: /* 1 uint8_t disp */
|
||||
case 1: /* 1 uint8_t disp */
|
||||
setAddress(i, true, SegPrefix, rm+INDEX_BX_SI, (uint16_t)signex(*pInst++));
|
||||
break;
|
||||
|
||||
case 2: /* 2 uint8_t disp */
|
||||
case 2: /* 2 uint8_t disp */
|
||||
setAddress(i, true, SegPrefix, rm + INDEX_BX_SI, getWord());
|
||||
pIcode->ll()->setFlags(WORD_OFF);
|
||||
break;
|
||||
|
||||
case 3: /* reg */
|
||||
case 3: /* reg */
|
||||
setAddress(i, true, 0, rm + rAX, 0);
|
||||
break;
|
||||
}
|
||||
@ -718,7 +717,7 @@ static void modrm(int i)
|
||||
****************************************************************************/
|
||||
static void segrm(int i)
|
||||
{
|
||||
int reg = REG(*pInst) + rES;
|
||||
int reg = REG(*pInst) + rES;
|
||||
|
||||
if (reg > rDS or (reg == rCS and (stateTable[i].flg & TO_REG)))
|
||||
pIcode->ll()->setOpcode((llIcode)0); // setCBW because it has that index
|
||||
@ -787,7 +786,7 @@ static void memImp(int i)
|
||||
static void memOnly(int )
|
||||
{
|
||||
if ((*pInst & 0xC0) == 0xC0)
|
||||
pIcode->ll()->setOpcode((llIcode)0);
|
||||
pIcode->ll()->setOpcode(iINVALID);
|
||||
}
|
||||
|
||||
|
||||
@ -797,7 +796,7 @@ static void memOnly(int )
|
||||
static void memReg0(int i)
|
||||
{
|
||||
if (REG(*pInst) or (*pInst & 0xC0) == 0xC0)
|
||||
pIcode->ll()->setOpcode((llIcode)0);
|
||||
pIcode->ll()->setOpcode(iINVALID);
|
||||
else
|
||||
rm(i);
|
||||
}
|
||||
@ -814,7 +813,7 @@ static void immed(int i)
|
||||
rm(i);
|
||||
|
||||
if (pIcode->ll()->getOpcode() == iADD or pIcode->ll()->getOpcode() == iSUB)
|
||||
pIcode->ll()->clrFlags(NOT_HLL); /* Allow ADD/SUB SP, immed */
|
||||
pIcode->ll()->clrFlags(NOT_HLL); /* Allow ADD/SUB SP, immed */
|
||||
}
|
||||
|
||||
|
||||
@ -826,7 +825,7 @@ static void shift(int i)
|
||||
static llIcode shiftTable[8] =
|
||||
{
|
||||
(llIcode)iROL, (llIcode)iROR, (llIcode)iRCL, (llIcode)iRCR,
|
||||
(llIcode)iSHL, (llIcode)iSHR, (llIcode)0, (llIcode)iSAR};
|
||||
(llIcode)iSHL, (llIcode)iSHR, (llIcode)0, (llIcode)iSAR};
|
||||
|
||||
pIcode->ll()->setOpcode(shiftTable[REG(*pInst)]);
|
||||
rm(i);
|
||||
@ -841,8 +840,8 @@ static void trans(int i)
|
||||
{
|
||||
static llIcode transTable[8] =
|
||||
{
|
||||
(llIcode)iINC, iDEC, (llIcode)iCALL, (llIcode)iCALLF,
|
||||
(llIcode)iJMP, (llIcode)iJMPF,(llIcode)iPUSH, (llIcode)0
|
||||
iINC, iDEC, iCALL, iCALLF,
|
||||
iJMP, iJMPF,iPUSH, (llIcode)0
|
||||
};
|
||||
LLInst *ll = pIcode->ll();
|
||||
// if(transTable[REG(*pInst)]==iPUSH) {
|
||||
@ -868,8 +867,8 @@ static void arith(int i)
|
||||
uint8_t opcode;
|
||||
static llIcode arithTable[8] =
|
||||
{
|
||||
iTEST, (llIcode)0, iNOT, iNEG,
|
||||
iMUL , iIMUL, iDIV, iIDIV
|
||||
iTEST, iINVALID, iNOT, iNEG,
|
||||
iMUL , iIMUL, iDIV, iIDIV
|
||||
};
|
||||
opcode = arithTable[REG(*pInst)];
|
||||
pIcode->ll()->setOpcode((llIcode)opcode);
|
||||
@ -884,7 +883,7 @@ static void arith(int i)
|
||||
else if (not (opcode == iNOT or opcode == iNEG))
|
||||
{
|
||||
pIcode->ll()->replaceSrc( pIcode->ll()->m_dst );
|
||||
setAddress(i, true, 0, rAX, 0); /* dst = AX */
|
||||
setAddress(i, true, 0, rAX, 0); /* dst = AX */
|
||||
}
|
||||
else if (opcode == iNEG or opcode == iNOT)
|
||||
pIcode->ll()->setFlags(NO_SRC);
|
||||
@ -919,7 +918,7 @@ static void data2(int )
|
||||
* but this field is being used as the number of bytes to allocate
|
||||
* on the stack. The procedure level is stored in the immediate
|
||||
* field. There is no source operand; therefore, the flag flg is
|
||||
* set to NO_OPS. */
|
||||
* set to NO_OPS. */
|
||||
if (pIcode->ll()->getOpcode() == iENTER)
|
||||
{
|
||||
pIcode->ll()->m_dst.off = getWord();
|
||||
@ -946,7 +945,7 @@ static void dispN(int )
|
||||
{
|
||||
|
||||
//PROG &prog(Project::get()->prog);
|
||||
/*long off = (short)*/getWord(); /* Signed displacement */
|
||||
/*long off = (short)*/getWord(); /* Signed displacement */
|
||||
|
||||
/* Note: the result of the subtraction could be between 32k and 64k, and
|
||||
still be positive; it is an offset from prog.Image. So this must be
|
||||
@ -960,7 +959,7 @@ static void dispN(int )
|
||||
***************************************************************************/
|
||||
static void dispS(int )
|
||||
{
|
||||
/*long off =*/ signex(*pInst++); /* Signed displacement */
|
||||
/*long off =*/ signex(*pInst++); /* Signed displacement */
|
||||
|
||||
// decodeBranchTgt();
|
||||
}
|
||||
@ -985,7 +984,7 @@ static void dispF(int i)
|
||||
****************************************************************************/
|
||||
static void prefix(int )
|
||||
{
|
||||
if (pIcode->ll()->getOpcode() == iREPE or pIcode->ll()->getOpcode() == iREPNE)
|
||||
if ((pIcode->ll()->getOpcode() == iREPE) or (pIcode->ll()->getOpcode() == iREPNE))
|
||||
RepPrefix = pIcode->ll()->getOpcode();
|
||||
else
|
||||
SegPrefix = pIcode->ll()->getOpcode();
|
||||
@ -993,8 +992,8 @@ static void prefix(int )
|
||||
|
||||
inline void BumpOpcode(LLInst &ll)
|
||||
{
|
||||
llIcode ic((llIcode)ll.getOpcode());
|
||||
ic = (llIcode)(((int)ic)+1); // Bump this icode via the int type
|
||||
llIcode ic(ll.getOpcode());
|
||||
ic = (llIcode)(((int)ic)+1); // Bump this icode via the int type
|
||||
ll.setOpcode(ic);
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user