112 lines
3.1 KiB
C++
112 lines
3.1 KiB
C++
/*****************************************************************************
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* dcc project Universal Decompilation Module
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* This is supposedly a machine independant and language independant module
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* that just plays with abstract cfg's and intervals and such like.
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* (C) Cristina Cifuentes
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****************************************************************************/
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#include <list>
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#include <cassert>
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#include <stdio.h>
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#include "dcc.h"
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#include "disassem.h"
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#include "project.h"
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extern Project g_proj;
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//static void displayCFG(Function * pProc);
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//static void displayDfs(BB * pBB);
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/****************************************************************************
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* udm
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****************************************************************************/
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void Function::buildCFG(Disassembler &ds)
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{
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if(flg & PROC_ISLIB)
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return; // Ignore library functions
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createCFG();
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if (option.VeryVerbose)
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displayCFG();
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compressCFG(); // Remove redundancies and add in-edge information
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if (option.asm2)
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{
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ds.disassem(this); // Print 2nd pass assembler listing
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return;
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}
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/* Idiom analysis and propagation of long type */
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lowLevelAnalysis();
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/* Generate HIGH_LEVEL icodes whenever possible */
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highLevelGen();
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}
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void Function::controlFlowAnalysis()
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{
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if (flg & PROC_ISLIB)
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return; /* Ignore library functions */
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derSeq *derivedG=nullptr;
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/* Make cfg reducible and build derived sequences */
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derivedG=checkReducibility();
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if (option.VeryVerbose)
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derivedG->display();
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/* Structure the graph */
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structure(derivedG);
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/* Check for compound conditions */
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compoundCond ();
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if (option.verbose)
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{
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printf("\nDepth first traversal - Proc %s\n", name.c_str());
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(*m_actual_cfg.begin())->displayDfs();
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//m_cfg.front()->displayDfs();
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}
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/* Free storage occupied by this procedure */
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freeDerivedSeq(*derivedG);
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}
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void udm(void)
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{
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/* Build the control flow graph, find idioms, and convert low-level
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* icodes to high-level ones */
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Disassembler ds(2);
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for (auto iter = Project::get()->pProcList.rbegin(); iter!=Project::get()->pProcList.rend(); ++iter)
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{
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iter->buildCFG(ds);
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}
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if (option.asm2)
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return;
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/* Data flow analysis - eliminate condition codes, extraneous registers
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* and intermediate instructions. Find expressions by forward
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* substitution algorithm */
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LivenessSet live_regs;
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Project::get()->pProcList.front().dataFlow (live_regs);
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/* Control flow analysis - structuring algorithm */
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for (auto iter = Project::get()->pProcList.rbegin(); iter!=Project::get()->pProcList.rend(); ++iter)
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{
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iter->controlFlowAnalysis();
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}
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}
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/****************************************************************************
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* displayCFG - Displays the Basic Block list
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***************************************************************************/
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void Function::displayCFG()
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{
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printf("\nBasic Block List - Proc %s", name.c_str());
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for (BB *pBB : /*m_cfg*/m_actual_cfg)
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{
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pBB->display();
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}
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}
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