743 lines
22 KiB
C++
743 lines
22 KiB
C++
/****************************************************************************
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* dcc project disassembler
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* (C) Cristina Cifuentes, Mike van Emmerik, Jeff Ledermann
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****************************************************************************/
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#include <stdint.h>
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#include <vector>
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#include <map>
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#include <sstream>
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#include <iomanip>
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#include <stdio.h>
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#include <string.h>
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#include "dcc.h"
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#include "symtab.h"
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#include "disassem.h"
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#include "project.h"
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// Note: for the time being, there is no interactive disassembler
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// for unix
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using namespace std;
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#define POS_LAB 15 /* Position of label */
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#define POS_OPC 20 /* Position of opcode */
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#define POS_OPR 25 /* Position of operand */
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#define WID_PTR 10 /* Width of the "xword ptr" lingo */
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#define POS_OPR2 POS_OPR+WID_PTR /* Position of operand after "xword ptr" */
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#define POS_CMT 54 /* Position of comment */
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static const char *szFlops0C[] =
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{
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"FCHS", "FABS", "???", "???", "FTST", "FXAM", "???", "???"
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};
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static const char *szFlops0D[] =
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{
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"FLD1", "FLDL2T","FLDL2E","FLDP1", "FLDLG2","FLDLN2","FLDZ", "???"
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};
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static const char *szFlops0E[] =
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{
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"F2XM1", "FYL2X", "FPTAN", "FPATAN","FXTRACT","FPREM1","FDECSTP","FINCSTP"
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};
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static const char *szFlops0F[] =
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{
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"FPREM", "FYLXP1","FSQRT", "FSINCOS","FRNDINT","FSCALE","FSIN","FCOS"
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};
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static const char *szFlops15[] =
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{
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"???", "FUCOMPP", "???", "???", "???", "???", "???", "???"
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};
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static const char *szFlops1C[] =
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{
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"???", "???", "FCLEX", "FINIT", "FTST", "FXAM", "???", "???"
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};
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static const char *szFlops33[] =
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{
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"???", "FCOMPP", "???", "???", "???", "???", "???", "???"
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};
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static const char *szFlops3C[] =
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{
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"FSTSWAX","???", "???", "???", "???", "???", "???", "???"
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};
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static const char *szPtr[2] = { "word ptr ", "byte ptr " };
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static void formatRM(ostringstream &p, uint32_t flg, const LLOperand &pm);
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static ostringstream &strDst(ostringstream &os, uint32_t flg, const LLOperand &pm);
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static char *strHex(uint32_t d);
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//static int checkScanned(uint32_t pcCur);
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//static void setProc(Function * proc);
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//static void dispData(uint16_t dataSeg);
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boolT callArg(uint16_t off, char *temp); /* Check for procedure name */
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//static FILE *dis_g_fp;
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static CIcodeRec pc;
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static int cb, j, numIcode, allocIcode;
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static map<int,int> pl;
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static uint32_t nextInst;
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static boolT fImpure;
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//static int g_lab;
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static Function * pProc; /* Points to current proc struct */
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struct POSSTACK_ENTRY
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{
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int ic; /* An icode offset */
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Function * pProc; /* A pointer to a PROCEDURE structure */
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} ;
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static vector<POSSTACK_ENTRY> posStack; /* position stack */
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static uint8_t iPS; /* Index into the stack */
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// These are "curses equivalent" functions. (Used to use curses for all this,
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// but it was too much of a distribution hassle
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#define printfd(x) printf(x)
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#define dis_newline() printf("\n")
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#define dis_show() // Nothing to do unless using Curses
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void LLInst::findJumpTargets(CIcodeRec &_pc)
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{
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if (testFlags(I) && ! testFlags(JMP_ICODE) && isJmpInst())
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{
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/* Replace the immediate operand with an icode index */
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iICODE labTgt=_pc.labelSrch(src().getImm2());
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if (labTgt!=_pc.end())
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{
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m_src.SetImmediateOp(labTgt->loc_ip);
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/* This icode is the target of a jump */
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labTgt->ll()->setFlags(TARGET);
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setFlags(JMP_ICODE); /* So its not done twice */
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}
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else
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{
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/* This jump cannot be linked to a label */
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setFlags(NO_LABEL);
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}
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}
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}
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/*****************************************************************************
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* disassem - Prints a disassembled listing of a procedure.
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* pass == 1 generates output on file .a1
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* pass == 2 generates output on file .a2
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* pass == 3 generates output on file .b
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****************************************************************************/
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void Disassembler::disassem(Function * ppProc)
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{
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pProc = ppProc; /* Save the passes pProc */
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createSymTables();
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allocIcode = numIcode = pProc->Icode.size();
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cb = allocIcode * sizeof(ICODE);
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if (numIcode == 0)
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{
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return; /* No Icode */
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}
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/* Open the output file (.a1 or .a2 only) */
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if (pass != 3)
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{
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auto p = (pass == 1)? asm1_name: asm2_name;
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m_fp.open(p,ios_base::app);
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if (!m_fp.is_open())
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{
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fatalError(CANNOT_OPEN, p);
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}
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}
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/* Create temporary code array */
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// Mike: needs objectising!
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pc=pProc->Icode;
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if (pass == 1)
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{
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/* Bind jump offsets to labels */
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//for (i = 0; i < numIcode; i++)
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for( ICODE &icode : pc)
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{
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LLInst *ll=icode.ll();
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ll->findJumpTargets(pc);
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}
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}
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/* Create label array to keep track of location => label name */
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pl.clear();
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/* Write procedure header */
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if (pass != 3)
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{
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std::string near_far=(pProc->flg & PROC_FAR)? "FAR": "NEAR";
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m_fp << "\t\t"<<pProc->name<<" PROC "<< near_far<<"\n";
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}
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/* Loop over array printing each record */
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nextInst = 0;
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for( ICODE &icode : pc)
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{
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this->dis1Line(*icode.ll(),icode.loc_ip,pass);
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}
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/* Write procedure epilogue */
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if (pass != 3)
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{
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m_fp << "\n\t\t"<<pProc->name<<" ENDP\n\n";
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m_fp.close();
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}
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pc.clear();
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destroySymTables();
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}
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/****************************************************************************
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* dis1Line() - disassemble one line to stream fp *
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* i is index into Icode for this proc *
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* It is assumed that icode i is already scanned *
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****************************************************************************/
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void Disassembler::dis1Line(LLInst &inst,int loc_ip, int pass)
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{
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PROG &prog(Project::get()->prog);
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ostringstream oper_stream;
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ostringstream hex_bytes;
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ostringstream result_stream;
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ostringstream opcode_with_mods;
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ostringstream operands_s;
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oper_stream << uppercase;
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hex_bytes << uppercase;
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/* Disassembly stage 1 --
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* Do not try to display NO_CODE entries or synthetic instructions,
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* other than JMPs, that have been introduced for def/use analysis. */
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if ((option.asm1) &&
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( inst.testFlags(NO_CODE) ||
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(inst.testFlags(SYNTHETIC) && (inst.getOpcode() != iJMP))))
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{
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return;
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}
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else if (inst.testFlags(NO_CODE))
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{
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return;
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}
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if (inst.testFlags(TARGET | CASE))
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{
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if (pass == 3)
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cCode.appendCode("\n"); /* Print to c code buffer */
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else
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m_fp<< "\n"; /* No, print to the stream */
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}
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/* Find next instruction label and print hex bytes */
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if (inst.testFlags(SYNTHETIC))
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nextInst = inst.label;
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else
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{
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cb = (uint32_t) inst.numBytes;
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nextInst = inst.label + cb;
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/* Output hexa code in program image */
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if (pass != 3)
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{
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for (j = 0; j < cb; j++)
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{
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hex_bytes << hex << setw(2) << setfill('0') << uint16_t(prog.Image[inst.label + j]);
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}
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hex_bytes << ' ';
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}
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}
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oper_stream << setw(POS_LAB) << left<< hex_bytes.str();
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/* Check if there is a symbol here */
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selectTable(Label);
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oper_stream << setw(5)<<left; // align for the labels
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{
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ostringstream lab_contents;
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if (readVal(lab_contents, inst.label, 0))
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{
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lab_contents << ':'; /* Also removes the null */
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}
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else if (inst.testFlags(TARGET)) /* Symbols override Lnn labels */
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{
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/* Print label */
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if (pl.count(loc_ip)==0)
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{
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pl[loc_ip] = ++g_lab;
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}
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lab_contents<< "L"<<pl[loc_ip]<<':';
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}
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oper_stream<< lab_contents.str();
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}
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if ((inst.getOpcode()==iSIGNEX )&& inst.testFlags(B))
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{
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inst.setOpcode(iCBW);
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}
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opcode_with_mods<<Machine_X86::opcodeName(inst.getOpcode());
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switch ( inst.getOpcode() )
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{
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case iADD: case iADC: case iSUB: case iSBB: case iAND: case iOR:
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case iXOR: case iTEST: case iCMP: case iMOV: case iLEA: case iXCHG:
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strDst(operands_s,inst.getFlag(), inst.dst);
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inst.strSrc(operands_s);
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break;
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case iESC:
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inst.flops(operands_s);
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break;
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case iSAR: case iSHL: case iSHR: case iRCL: case iRCR: case iROL:
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case iROR:
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strDst(operands_s,inst.getFlag() | I, inst.dst);
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if(inst.testFlags(I))
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inst.strSrc(operands_s);
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else
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operands_s<<", cl";
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break;
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case iINC: case iDEC: case iNEG: case iNOT: case iPOP:
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strDst(operands_s,inst.getFlag() | I, inst.dst);
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break;
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case iPUSH:
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if (inst.testFlags(I))
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{
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operands_s<<strHex(inst.src().getImm2());
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}
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else
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{
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strDst(operands_s,inst.getFlag() | I, inst.dst);
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}
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break;
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case iDIV: case iIDIV: case iMUL: case iIMUL: case iMOD:
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if (inst.testFlags(I))
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{
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strDst(operands_s,inst.getFlag(), inst.dst) <<", ";
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formatRM(operands_s, inst.getFlag(), inst.src());
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inst.strSrc(operands_s);
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}
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else
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strDst(operands_s,inst.getFlag() | I, inst.src());
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break;
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case iLDS: case iLES: case iBOUND:
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strDst(operands_s,inst.getFlag(), inst.dst)<<", dword ptr";
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inst.strSrc(operands_s,true);
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break;
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case iJB: case iJBE: case iJAE: case iJA:
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case iJL: case iJLE: case iJGE: case iJG:
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case iJE: case iJNE: case iJS: case iJNS:
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case iJO: case iJNO: case iJP: case iJNP:
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case iJCXZ:case iLOOP: case iLOOPE:case iLOOPNE:
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case iJMP: case iJMPF:
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/* Check if there is a symbol here */
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{
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ICODE *lab=pc.GetIcode(inst.src().getImm2());
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selectTable(Label);
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if ((inst.src().getImm2() < (uint32_t)numIcode) && /* Ensure in range */
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readVal(operands_s, lab->ll()->label, 0))
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{
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break; /* Symbolic label. Done */
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}
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}
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if (inst.testFlags(NO_LABEL))
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{
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//strcpy(p + WID_PTR, strHex(pIcode->ll()->immed.op));
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operands_s<<strHex(inst.src().getImm2());
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}
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else if (inst.testFlags(I) )
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{
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j = inst.src().getImm2();
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if (pl.count(j)==0) /* Forward jump */
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{
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pl[j] = ++g_lab;
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}
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if (inst.getOpcode() == iJMPF)
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{
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operands_s<<" far ptr ";
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}
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operands_s<<"L"<<pl[j];
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}
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else if (inst.getOpcode() == iJMPF)
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{
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operands_s<<"dword ptr";
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inst.strSrc(operands_s,true);
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}
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else
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{
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strDst(operands_s,I, inst.src());
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}
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break;
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case iCALL: case iCALLF:
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if (inst.testFlags(I))
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{
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if((inst.getOpcode() == iCALL))
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operands_s<< "near";
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else
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operands_s<< " far";
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operands_s<<" ptr "<<(inst.src().proc.proc)->name;
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}
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else if (inst.getOpcode() == iCALLF)
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{
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operands_s<<"dword ptr ";
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inst.strSrc(operands_s,true);
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}
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else
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strDst(operands_s,I, inst.src());
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break;
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case iENTER:
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operands_s<<strHex(inst.dst.off)<<", ";
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operands_s<<strHex(inst.src().getImm2());
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break;
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case iRET: case iRETF: case iINT:
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if (inst.testFlags(I))
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{
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operands_s<<strHex(inst.src().getImm2());
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}
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break;
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case iCMPS: case iREPNE_CMPS: case iREPE_CMPS:
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case iSCAS: case iREPNE_SCAS: case iREPE_SCAS:
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case iSTOS: case iREP_STOS:
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case iLODS: case iREP_LODS:
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case iMOVS: case iREP_MOVS:
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case iINS: case iREP_INS:
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case iOUTS: case iREP_OUTS:
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if (inst.src().segOver)
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{
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bool is_dx_src=(inst.getOpcode() == iOUTS || inst.getOpcode() == iREP_OUTS);
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if(is_dx_src)
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operands_s<<"dx, "<<szPtr[inst.getFlag() & B];
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else
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operands_s<<szPtr[inst.getFlag() & B];
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if (inst.getOpcode() == iLODS ||
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inst.getOpcode() == iREP_LODS ||
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inst.getOpcode() == iOUTS ||
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inst.getOpcode() == iREP_OUTS)
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{
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operands_s<<Machine_X86::regName(inst.src().segOver); // szWreg[src.segOver-rAX]
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}
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else
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{
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operands_s<<"es:[di], "<<Machine_X86::regName(inst.src().segOver);
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}
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operands_s<<":[si]";
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}
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else
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{
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(inst.getFlag() & B)? opcode_with_mods<< "B": opcode_with_mods<< "W";
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}
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break;
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case iXLAT:
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if (inst.src().segOver)
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{
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operands_s<<" "<<szPtr[1];
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operands_s<<Machine_X86::regName(inst.src().segOver)<<":[bx]";
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}
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break;
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case iIN:
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(inst.getFlag() & B)? operands_s<<"al, " : operands_s<< "ax, ";
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(inst.testFlags(I))? operands_s << strHex(inst.src().getImm2()) : operands_s<< "dx";
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break;
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case iOUT:
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{
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std::string d1=((inst.testFlags(I))? strHex(inst.src().getImm2()): "dx");
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std::string d2=((inst.getFlag() & B) ? ", al": ", ax");
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operands_s<<d1 << d2;
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}
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break;
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default:
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break;
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}
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oper_stream << setw(15) << left <<opcode_with_mods.str();
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oper_stream << operands_s.str();
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/* Comments */
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if (inst.testFlags(SYNTHETIC))
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{
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fImpure = false;
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}
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else
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{
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for (j = inst.label, fImpure = 0; j > 0 && j < (int)nextInst; j++)
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{
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fImpure |= BITMAP(j, BM_DATA);
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}
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}
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result_stream << setw(54) << left << oper_stream.str();
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/* Check for user supplied comment */
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selectTable(Comment);
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ostringstream cbuf;
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if (readVal(cbuf, inst.label, 0))
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{
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result_stream <<"; "<<cbuf.str();
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}
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else if (fImpure || (inst.testFlags(SWITCH | CASE | SEG_IMMED | IMPURE | SYNTHETIC | TERMINATES)))
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{
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if (inst.testFlags(CASE))
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{
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result_stream << ";Case l"<< inst.caseEntry;
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}
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if (inst.testFlags(SWITCH))
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{
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result_stream << ";Switch ";
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}
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if (fImpure)
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{
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result_stream << ";Accessed as data ";
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}
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if (inst.testFlags(IMPURE))
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{
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result_stream << ";Impure operand ";
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}
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if (inst.testFlags(SEG_IMMED))
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{
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result_stream << ";Segment constant";
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}
|
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if (inst.testFlags(TERMINATES))
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{
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result_stream << ";Exit to DOS";
|
|
}
|
|
}
|
|
|
|
/* Comment on iINT icodes */
|
|
if (inst.getOpcode() == iINT)
|
|
inst.writeIntComment(result_stream);
|
|
|
|
/* Display output line */
|
|
if(pass==3)
|
|
{
|
|
/* output to .b code buffer */
|
|
if (inst.testFlags(SYNTHETIC))
|
|
result_stream<<";Synthetic inst";
|
|
if (pass == 3) /* output to .b code buffer */
|
|
cCode.appendCode("%s\n", result_stream.str().c_str());
|
|
|
|
}
|
|
else
|
|
{
|
|
char buf[12];
|
|
/* output to .a1 or .a2 file */
|
|
if (not inst.testFlags(SYNTHETIC) )
|
|
{
|
|
sprintf(buf,"%03d %06X",loc_ip, inst.label);
|
|
}
|
|
else /* SYNTHETIC instruction */
|
|
{
|
|
sprintf(buf,"%03d ",loc_ip);
|
|
result_stream<<";Synthetic inst";
|
|
}
|
|
m_fp<<buf<< " " << result_stream.str() << "\n";
|
|
}
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
* formatRM
|
|
***************************************************************************/
|
|
static void formatRM(std::ostringstream &p, uint32_t flg, const LLOperand &pm)
|
|
{
|
|
//char seg[4];
|
|
|
|
if (pm.segOver)
|
|
{
|
|
p <<Machine_X86::regName(pm.segOver)<<':';
|
|
}
|
|
|
|
if (pm.regi == rUNDEF)
|
|
{
|
|
p<<"["<<strHex((uint32_t)pm.off)<<"]";
|
|
}
|
|
else if (pm.isReg())
|
|
{
|
|
p<<Machine_X86::regName(pm.regi);
|
|
}
|
|
|
|
else if (pm.off)
|
|
{
|
|
if (pm.off < 0)
|
|
{
|
|
p <<"["<<Machine_X86::regName(pm.regi)<<"-"<<strHex((uint32_t)(- pm.off))<<"]";
|
|
}
|
|
else
|
|
{
|
|
p <<"["<<Machine_X86::regName(pm.regi)<<"+"<<strHex((uint32_t)(pm.off))<<"]";
|
|
}
|
|
}
|
|
else
|
|
p <<"["<<Machine_X86::regName(pm.regi)<<"]";
|
|
}
|
|
|
|
|
|
/*****************************************************************************
|
|
* strDst
|
|
****************************************************************************/
|
|
static ostringstream & strDst(ostringstream &os,uint32_t flg, const LLOperand &pm)
|
|
{
|
|
/* Immediates to memory require size descriptor */
|
|
//os << setw(WID_PTR);
|
|
if ((flg & I) and not pm.isReg())
|
|
os << szPtr[flg & B];
|
|
formatRM(os, flg, pm);
|
|
return os;
|
|
}
|
|
|
|
|
|
/****************************************************************************
|
|
* strSrc *
|
|
****************************************************************************/
|
|
ostringstream &LLInst::strSrc(ostringstream &os,bool skip_comma)
|
|
{
|
|
if(false==skip_comma)
|
|
os<<", ";
|
|
if (testFlags(I))
|
|
os<<strHex(src().getImm2());
|
|
else if (testFlags(IM_SRC)) /* level 2 */
|
|
os<<"dx:ax";
|
|
else
|
|
formatRM(os, getFlag(), src());
|
|
|
|
return os;
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
* strHex *
|
|
****************************************************************************/
|
|
static char *strHex(uint32_t d)
|
|
{
|
|
static char buf[10];
|
|
|
|
d &= 0xFFFF;
|
|
sprintf(buf, "0%lX%s", d, (d > 9)? "h": "");
|
|
return (buf + (buf[1] <= '9'));
|
|
}
|
|
|
|
/****************************************************************************
|
|
* interactDis - interactive disassembler *
|
|
****************************************************************************/
|
|
void interactDis(Function * initProc, int initIC)
|
|
{
|
|
printf("Sorry - interactive disasassembler option not available for Unix\n");
|
|
return;
|
|
}
|
|
|
|
/* Handle the floating point opcodes (icode iESC) */
|
|
void LLInst::flops(std::ostringstream &out)
|
|
{
|
|
char bf[30];
|
|
uint8_t op = (uint8_t)src().getImm2();
|
|
|
|
/* Note that op is set to the escape number, e.g.
|
|
esc 0x38 is FILD */
|
|
|
|
if ( not dst.isReg() )
|
|
{
|
|
/* The mod/rm mod bits are not set to 11 (i.e. register). This is the normal floating point opcode */
|
|
out<<Machine_X86::floatOpName(op)<<' ';
|
|
out <<setw(10);
|
|
if ((op == 0x29) || (op == 0x1F))
|
|
{
|
|
out << "tbyte ptr ";
|
|
}
|
|
else switch (op & 0x30)
|
|
{
|
|
case 0x00:
|
|
case 0x10:
|
|
out << "dword ptr ";
|
|
break;
|
|
case 0x20:
|
|
out << "qword ptr ";
|
|
break;
|
|
case 0x30:
|
|
switch (op)
|
|
{
|
|
case 0x3C: /* FBLD */
|
|
case 0x3E: /* FBSTP */
|
|
out << "tbyte ptr ";
|
|
break;
|
|
case 0x3D: /* FILD 64 bit */
|
|
case 0x3F: /* FISTP 64 bit */
|
|
out << "qword ptr ";
|
|
break;
|
|
|
|
default:
|
|
out << "uint16_t ptr ";
|
|
break;
|
|
}
|
|
}
|
|
|
|
formatRM(out, getFlag(), dst);
|
|
}
|
|
else
|
|
{
|
|
/* The mod/rm mod bits are set to 11 (i.e. register).
|
|
Could be specials (0x0C-0x0F, etc), or the st(i) versions of
|
|
normal opcodes. Because the opcodes are slightly different for
|
|
this case (e.g. op=04 means FSUB if reg != 3, but FSUBR for
|
|
reg == 3), a separate table is used (szFlops2). */
|
|
int destRegIdx=dst.regi - rAX;
|
|
switch (op)
|
|
{
|
|
case 0x0C:
|
|
out << szFlops0C[destRegIdx];
|
|
break;
|
|
case 0x0D:
|
|
out << szFlops0D[destRegIdx];
|
|
break;
|
|
case 0x0E:
|
|
out << szFlops0E[destRegIdx];
|
|
break;
|
|
case 0x0F:
|
|
out << szFlops0F[destRegIdx];
|
|
break;
|
|
case 0x15:
|
|
out << szFlops15[destRegIdx];
|
|
break;
|
|
case 0x1C:
|
|
out << szFlops1C[destRegIdx];
|
|
break;
|
|
case 0x33:
|
|
out << szFlops33[destRegIdx];
|
|
break;
|
|
case 0x3C:
|
|
out << szFlops3C[destRegIdx];
|
|
break;
|
|
default:
|
|
out << Machine_X86::floatOpName(0x40+op);
|
|
if ((op >= 0x20) && (op <= 0x27))
|
|
{
|
|
/* This is the ST(i), ST form. */
|
|
out << "ST("<<destRegIdx - rAX<<"),ST";
|
|
}
|
|
else
|
|
{
|
|
/* ST, ST(i) */
|
|
out << "ST,ST("<<destRegIdx;
|
|
}
|
|
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
|