Add some temporary disabled code for each peripheral
(copied from io.c)
This commit is contained in:
@@ -7,3 +7,38 @@
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*
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******************************************************************************/
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#if 0
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case 0xb5:
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read
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w1 = ws_ioRam[0xb5];
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if (w1 & 0x40)
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{
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w2 = 0x00;
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w2 = (ws_key_start << 1) | (ws_key_button_a << 2) | (ws_key_button_b << 3);
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retVal = (uint8_t)((w1 & 0xf0) | w2);
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break;
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}
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if (w1 & 0x20)
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{
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w2 = 0x00;
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w2 = (ws_key_x1 << 0) | (ws_key_x2 << 1) | (ws_key_x3 << 2) | (ws_key_x4 << 3);
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retVal = (uint8_t)((w1 & 0xf0) | w2);
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break;
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}
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if (w1 & 0x10)
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{
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w2 = 0x00;
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w2 = (ws_key_y1 << 0) | (ws_key_y2 << 1) | (ws_key_y3 << 2) | (ws_key_y4 << 3);
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retVal = (uint8_t)((w1 & 0xf0) | w2);
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}
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write:
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#endif
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@@ -7,3 +7,51 @@
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*
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******************************************************************************/
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#if 0
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Shall we split color and crystal, there are some subtles differences on some registers
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READ
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case 0x62:
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switch (ws_get_system())
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{
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case WS_SYSTEM_AUTODETECT:
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case WS_SYSTEM_MONO:
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case WS_SYSTEM_COLOR:
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retVal = 0x00;
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break;
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case WS_SYSTEM_CRYSTAL:
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retVal = 0x80;
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break;
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}
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break;
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WRITE
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if ((port == 0xA0) && (ws_ioRam[port] & 0x01) && (~value & 0x01))
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{
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value |= 0x01;
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}
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case 0xA0:
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/* Force cart handshake to be set */
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ws_ioRam[port] |= 0x80;
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if (value & 0x01)
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{
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Log(TLOG_WARNING, "A0", "Oh yeah %02X BABY", value);
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#ifdef USE_PAGED_MEMORY_ACCESS
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uint32_t romSize;
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uint8_t *rom = getRom(&romSize);
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set_memory_bank(0xF, ws_get_page_ptr(rom, romSize, (ws_ioRam[0xC0] & 0x0F << 4) + 0x0F));
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#endif
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}
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break;
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#endif
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@@ -7,3 +7,48 @@
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*
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******************************************************************************/
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#if 0
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Need to check how to differenciate all the DMA types.
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WRITE:
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case 0x48: // DMA
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// bit 7 set to start dma transfer
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if (value & 0x80)
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{
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uint32_t dma_start = (ws_ioRam[0x41] << 8) | (ws_ioRam[0x40]) | (ws_ioRam[0x42] << 16);
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uint32_t dma_dest = (ws_ioRam[0x45] << 8) | (ws_ioRam[0x44]) | (ws_ioRam[0x43] << 16);
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uint32_t dma_size = (ws_ioRam[0x47] << 8) | (ws_ioRam[0x46]);
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uint8_t dma_inc = (value & 0x01) ? -1: 1;
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Log(TLOG_VERBOSE, "DMA", "Starting DMA from %08X to %08X (len: %08X, inc: %d)",
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dma_start, dma_dest, dma_size, dma_inc);
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for (uint32_t ix = 0 ; ix < dma_size ; ix++)
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{
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mem_writemem20(dma_dest, mem_readmem20(dma_start));
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dma_start += dma_inc;
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dma_dest += dma_inc;
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}
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ws_ioRam[0x47] = 0;
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ws_ioRam[0x46] = 0;
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ws_ioRam[0x41] = (uint8_t)(dma_start >> 8);
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ws_ioRam[0x40] = (uint8_t)(dma_start & 0xff);
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ws_ioRam[0x45] = (uint8_t)(dma_dest >> 8);
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ws_ioRam[0x44] = (uint8_t)(dma_dest & 0xff);
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ws_ioRam[0x48] = 0;
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}
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break;
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#endif
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@@ -7,3 +7,71 @@
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*
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******************************************************************************/
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#if 0
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READ
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case 0xA0:
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case 0xAA:
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case 0xAB:
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case 0xAC:
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case 0xAD:
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retVal = ws_gpu_port_read(port);
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WRITE
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case 0x00:
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Log(TLOG_DEBUG, "GPU", "Screen enabled: W2:%c W2M:%c, SW:%c, S:%c, S2:%c, S1:%c",
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(value & 0x20)?'Y':'N',
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(value & 0x10)?'I':'O',
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(value & 0x08)?'Y':'N',
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(value & 0x04)?'Y':'N',
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(value & 0x02)?'Y':'N',
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(value & 0x01)?'Y':'N');
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break;
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case 0x04:
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if (ws_gpu_operatingInColor)
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{
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Log(TLOG_DEBUG, "GPU", "Sprite base: %04X", (value & 0x1F) << 9);
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}
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else
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{
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Log(TLOG_DEBUG, "GPU", "Sprite base: %04X", (value & 0x3F) << 9);
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}
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break;
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case 0x07:
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if (ws_gpu_operatingInColor)
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{
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Log(TLOG_DEBUG, "GPU", "Sprite Screen1 base: %04X", (value & 0x7) << 11);
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Log(TLOG_DEBUG, "GPU", "Sprite Screen2 base: %04X", (value & 0x70) << (11-4));
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}
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else
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{
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Log(TLOG_DEBUG, "GPU", "Sprite Screen1 base: %04X", (value & 0xF) << 11);
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Log(TLOG_DEBUG, "GPU", "Sprite Screen2 base: %04X", (value & 0xF0) << (11-4));
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}
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break;
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case 0x10:
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//Log(TLOG_DEBUG, "GPU", "Sprite Screen1 X scroll: %d", value);
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break;
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case 0x11:
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//Log(TLOG_DEBUG, "GPU", "Sprite Screen1 T scroll: %d", value);
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break;
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case 0x12:
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//Log(TLOG_DEBUG, "GPU", "Sprite Screen2 X scroll: %d", value);
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break;
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case 0x13:
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//Log(TLOG_DEBUG, "GPU", "Sprite Screen2 Y scroll: %d", value);
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break;
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case 0x15:
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Log(TLOG_DEBUG, "io", "Icons %c %c %c %c %c %c %c %c", (value >> 7) & 1 ? '?' : ' ', (value >> 6) & 1 ? '?' : ' ',
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(value >> 5) & 1 ? '3' : ' ', (value >> 4) & 1 ? '2' : ' ', (value >> 3) & 1 ? '1' : ' ',
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(value >> 2) & 1 ? 'H' : ' ', (value >> 1) & 1 ? 'V' : ' ', (value >> 0) & 1 ? 'S' : ' ');
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break;
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#endif
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@@ -7,3 +7,49 @@
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*
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******************************************************************************/
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#if 0
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READ
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case 0x62:
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switch (ws_get_system())
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{
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case WS_SYSTEM_AUTODETECT:
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case WS_SYSTEM_MONO:
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case WS_SYSTEM_COLOR:
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retVal = 0x00;
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break;
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case WS_SYSTEM_CRYSTAL:
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retVal = 0x80;
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break;
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}
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break;
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WRITE
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if ((port == 0xA0) && (ws_ioRam[port] & 0x01) && (~value & 0x01))
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{
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value |= 0x01;
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}
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case 0xA0:
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/* Force cart handshake to be set */
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ws_ioRam[port] |= 0x80;
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if (value & 0x01)
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{
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Log(TLOG_WARNING, "A0", "Oh yeah %02X BABY", value);
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#ifdef USE_PAGED_MEMORY_ACCESS
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uint32_t romSize;
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uint8_t *rom = getRom(&romSize);
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set_memory_bank(0xF, ws_get_page_ptr(rom, romSize, (ws_ioRam[0xC0] & 0x0F << 4) + 0x0F));
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#endif
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}
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break;
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#endif
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@@ -9,3 +9,73 @@
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*
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******************************************************************************/
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#if 0
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READ
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case 0xc0 : // ???
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retVal = ((ws_ioRam[0xc0] & 0xf) | 0x20);
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goto exit;
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case 0xD0:
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retVal = 0;
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goto exit;
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case 0xCC:
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case 0xCD:
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retVal = 0;
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break;
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WRITE
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case 0xC0:
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{
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/* page 4 to F */
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uint32_t romSize;
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uint8_t *rom = getRom(&romSize);
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for (int i = 0x04 ; i < 0x10 ; i++)
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{
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set_memory_bank(i, ws_get_page_ptr(rom, romSize, (value << 4) + i));
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}
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if (!(ws_ioRam[0xA0] & 0x01))
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{
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set_irom_overlay();
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}
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break;
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}
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case 0xC1:
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/* Sram bank */
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if (sramSize > 0)
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{
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uint32_t sramSize;
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uint8_t *sram = getSram(&sramSize);
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set_memory_bank(0x1, ws_get_page_ptr(sram, sramSize, value));
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}
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break;
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case 0xC2:
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{
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/* page 4 to F */
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uint32_t romSize;
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uint8_t *rom = getRom(&romSize);
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/* Page 2 */
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set_memory_bank(0x2, ws_get_page_ptr(rom, romSize, value));
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break;
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}
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case 0xC3:
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{
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/* page 4 to F */
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uint32_t romSize;
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uint8_t *rom = getRom(&romSize);
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/* Page 3 */
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set_memory_bank(0x3, ws_get_page_ptr(rom, romSize, value));
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break;
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}
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#endif
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Block a user