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Move everything in the root folder

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Godzil
2020-01-15 19:06:45 +00:00
parent ec2a2f937f
commit f592057e48
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source/nec/nec.cpp Normal file
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#ifndef __NEC_H_
#define __NEC_H_
#include "necintrf.h"
typedef enum { ES, CS, SS, DS } SREGS;
typedef enum { AW, CW, DW, BW, SP, BP, IX, IY } WREGS;
typedef enum { AL,AH,CL,CH,DL,DH,BL,BH,SPL,SPH,BPL,BPH,IXL,IXH,IYL,IYH } BREGS;
#pragma pack(1)
typedef union
{
/* eight general registers */
uint16_t w[8]; /* viewed as 16 bits registers */
uint8_t b[16]; /* or as 8 bit registers */
} necbasicregs;
typedef struct
{
necbasicregs regs;
uint16_t sregs[4];
uint16_t ip;
int32_t SignVal;
int32_t AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
uint32_t TF, IF, DF, MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
uint32_t int_vector;
uint32_t pending_irq;
uint32_t nmi_state;
uint32_t irq_state;
int (*irq_callback)(int irqline);
} nec_Regs;
#pragma pack()
#define NEC_NMI_INT_VECTOR 2
/* Cpu types, steps of 8 to help the cycle count calculation */
#define V33 0
#define V30 8
#define V20 16
#ifndef FALSE
#define FALSE 0
#define TRUE 1
#endif
/* parameter x = result, y = source 1, z = source 2 */
#define SetTF(x) (I.TF = (x))
#define SetIF(x) (I.IF = (x))
#define SetDF(x) (I.DF = (x))
#define SetMD(x) (I.MF = (x)) /* OB [19.07.99] Mode Flag V30 */
#define SetCFB(x) (I.CarryVal = (x) & 0x100)
#define SetCFW(x) (I.CarryVal = (x) & 0x10000)
#define SetAF(x,y,z) (I.AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
#define SetSF(x) (I.SignVal = (x))
#define SetZF(x) (I.ZeroVal = (x))
#define SetPF(x) (I.ParityVal = (x))
#define SetSZPF_Byte(x) (I.SignVal=I.ZeroVal=I.ParityVal=(int8_t)(x))
#define SetSZPF_Word(x) (I.SignVal=I.ZeroVal=I.ParityVal=(int16_t)(x))
#define SetOFW_Add(x,y,z) (I.OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
#define SetOFB_Add(x,y,z) (I.OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
#define SetOFW_Sub(x,y,z) (I.OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
#define SetOFB_Sub(x,y,z) (I.OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
#define ADDB { uint32_t res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(uint8_t)res; }
#define ADDW { uint32_t res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(uint16_t)res; }
#define SUBB { uint32_t res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(uint8_t)res; }
#define SUBW { uint32_t res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(uint16_t)res; }
#define ORB dst|=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Byte(dst)
#define ORW dst|=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Word(dst)
#define ANDB dst&=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Byte(dst)
#define ANDW dst&=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Word(dst)
#define XORB dst^=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Byte(dst)
#define XORW dst^=src; I.CarryVal=I.OverVal=I.AuxVal=0; SetSZPF_Word(dst)
#define CF (I.CarryVal!=0)
#define SF (I.SignVal<0)
#define ZF (I.ZeroVal==0)
#define PF parity_table[(uint8_t)I.ParityVal]
#define AF (I.AuxVal!=0)
#define OF (I.OverVal!=0)
#define MD (I.MF!=0)
/************************************************************************/
#define SegBase(Seg) (I.sregs[Seg] << 4)
#define DefaultBase(Seg) ((seg_prefix && (Seg==DS || Seg==SS)) ? prefix_base : I.sregs[Seg] << 4)
#define GetMemB(Seg,Off) (/*nec_ICount-=((Off)&1)?1:0,*/ (uint8_t)cpu_readmem20((DefaultBase(Seg)+(Off))))
#define GetMemW(Seg,Off) (/*nec_ICount-=((Off)&1)?1:0,*/ (uint16_t) cpu_readmem20((DefaultBase(Seg)+(Off))) + (cpu_readmem20((DefaultBase(Seg)+((Off)+1)))<<8) )
#define PutMemB(Seg,Off,x) { /*nec_ICount-=((Off)&1)?1:0*/; cpu_writemem20((DefaultBase(Seg)+(Off)),(x)); }
#define PutMemW(Seg,Off,x) { /*nec_ICount-=((Off)&1)?1:0*/; PutMemB(Seg,Off,(x)&0xff); PutMemB(Seg,(Off)+1,(uint8_t)((x)>>8)); }
/* Todo: Remove these later - plus readword could overflow */
#define ReadByte(ea) (/*nec_ICount-=((ea)&1)?1:0,*/ (uint8_t)cpu_readmem20((ea)))
#define ReadWord(ea) (/*nec_ICount-=((ea)&1)?1:0,*/ cpu_readmem20((ea))+(cpu_readmem20(((ea)+1))<<8))
#define WriteByte(ea,val) { /*nec_ICount-=((ea)&1)?1:0*/; cpu_writemem20((ea),val); }
#define WriteWord(ea,val) { /*nec_ICount-=((ea)&1)?1:0*/; cpu_writemem20((ea),(uint8_t)(val)); cpu_writemem20(((ea)+1),(val)>>8); }
#define read_port(port) cpu_readport(port)
#define write_port(port,val) cpu_writeport(port,val)
#define FETCH (cpu_readop_arg((I.sregs[CS]<<4)+I.ip++))
#define FETCHOP (cpu_readop((I.sregs[CS]<<4)+I.ip++))
#define FETCHWORD(var) { var=cpu_readop_arg((((I.sregs[CS]<<4)+I.ip)))+(cpu_readop_arg((((I.sregs[CS]<<4)+I.ip+1)))<<8); I.ip+=2; }
#define PUSH(val) { I.regs.w[SP]-=2; WriteWord((((I.sregs[SS]<<4)+I.regs.w[SP])),val); }
#define POP(var) { var = ReadWord((((I.sregs[SS]<<4)+I.regs.w[SP]))); I.regs.w[SP]+=2; }
#define PEEK(addr) ((uint8_t)cpu_readop_arg(addr))
#define PEEKOP(addr) ((uint8_t)cpu_readop(addr))
#define GetModRM uint32_t ModRM=cpu_readop_arg((I.sregs[CS]<<4)+I.ip++)
/* Cycle count macros:
CLK - cycle count is the same on all processors
CLKS - cycle count differs between processors, list all counts
CLKW - cycle count for word read/write differs for odd/even source/destination address
CLKM - cycle count for reg/mem instructions
CLKR - cycle count for reg/mem instructions with different counts for odd/even addresses
Prefetch & buswait time is not emulated.
Extra cycles for PUSH'ing or POP'ing registers to odd addresses is not emulated.
#define CLK(all) nec_ICount-=all
#define CLKS(v20,v30,v33) { const uint32_t ccount=(v20<<16)|(v30<<8)|v33; nec_ICount-=(ccount>>cpu_type)&0x7f; }
#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e) { const uint32_t ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; nec_ICount-=(I.ip&1)?((ocount>>cpu_type)&0x7f):((ecount>>cpu_type)&0x7f); }
#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const uint32_t ccount=(v20<<16)|(v30<<8)|v33, mcount=(v20m<<16)|(v30m<<8)|v33m; nec_ICount-=( ModRM >=0xc0 )?((ccount>>cpu_type)&0x7f):((mcount>>cpu_type)&0x7f); }
#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall) { const uint32_t ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; if (ModRM >=0xc0) nec_ICount-=vall; else nec_ICount-=(I.ip&1)?((ocount>>cpu_type)&0x7f):((ecount>>cpu_type)&0x7f); }
*/
#define CLKS(v20,v30,v33) { const uint32_t ccount=(v20<<16)|(v30<<8)|v33; nec_ICount-=(ccount>>cpu_type)&0x7f; }
#define CLK(all) nec_ICount-=all
#define CLKW(v30MZo,v30MZe) { nec_ICount-=(I.ip&1)?v30MZo:v30MZe; }
#define CLKM(v30MZm,v30MZ) { nec_ICount-=( ModRM >=0xc0 )?v30MZ:v30MZm; }
#define CLKR(v30MZo,v30MZe,vall) { if (ModRM >=0xc0) nec_ICount-=vall; else nec_ICount-=(I.ip&1)?v30MZo:v30MZe; }
#define CompressFlags() (uint16_t)(CF | (PF << 2) | (AF << 4) | (ZF << 6) \
| (SF << 7) | (I.TF << 8) | (I.IF << 9) \
| (I.DF << 10) | (OF << 11))
#define ExpandFlags(f) \
{ \
I.CarryVal = (f) & 1; \
I.ParityVal = !((f) & 4); \
I.AuxVal = (f) & 16; \
I.ZeroVal = !((f) & 64); \
I.SignVal = (f) & 128 ? -1 : 0; \
I.TF = ((f) & 256) == 256; \
I.IF = ((f) & 512) == 512; \
I.DF = ((f) & 1024) == 1024; \
I.OverVal = (f) & 2048; \
I.MF = ((f) & 0x8000) == 0x8000; \
}
#define IncWordReg(Reg) \
uint16_t tmp = (uint16_t)I.regs.w[Reg]; \
uint16_t tmp1 = tmp+1; \
I.OverVal = (tmp == 0x7fff); \
SetAF(tmp1,tmp,1); \
SetSZPF_Word(tmp1); \
I.regs.w[Reg]=tmp1
#define DecWordReg(Reg) \
uint16_t tmp = (uint16_t)I.regs.w[Reg]; \
uint16_t tmp1 = tmp-1; \
I.OverVal = (tmp == 0x8000); \
SetAF(tmp1,tmp,1); \
SetSZPF_Word(tmp1); \
I.regs.w[Reg]=tmp1
#define JMP(flag) \
int tmp = (int)((int8_t)FETCH); \
if (flag) \
{ \
I.ip = (uint16_t)(I.ip+tmp); \
nec_ICount-=3; \
return; \
}
#define ADJ4(param1,param2) \
if (AF || ((I.regs.b[AL] & 0xf) > 9)) \
{ \
int tmp; \
I.regs.b[AL] = tmp = I.regs.b[AL] + param1; \
I.AuxVal = 1; \
} \
if (CF || (I.regs.b[AL] > 0x9f)) \
{ \
I.regs.b[AL] += param2; \
I.CarryVal = 1; \
} \
SetSZPF_Byte(I.regs.b[AL])
#define ADJB(param1,param2) \
if (AF || ((I.regs.b[AL] & 0xf) > 9)) \
{ \
I.regs.b[AL] += param1; \
I.regs.b[AH] += param2; \
I.AuxVal = 1; \
I.CarryVal = 1; \
} \
else \
{ \
I.AuxVal = 0; \
I.CarryVal = 0; \
} \
I.regs.b[AL] &= 0x0F
#define BITOP_BYTE \
ModRM = FETCH; \
if (ModRM >= 0xc0) { \
tmp=I.regs.b[Mod_RM.RM.b[ModRM]]; \
} \
else { \
(*GetEA[ModRM])(); \
tmp=ReadByte(EA); \
}
#define BITOP_WORD \
ModRM = FETCH; \
if (ModRM >= 0xc0) { \
tmp=I.regs.w[Mod_RM.RM.w[ModRM]]; \
} \
else { \
(*GetEA[ModRM])(); \
tmp=ReadWord(EA); \
}
#define BIT_NOT \
if (tmp & (1<<tmp2)) \
tmp &= ~(1<<tmp2); \
else \
tmp |= (1<<tmp2)
#define XchgAWReg(Reg) \
uint16_t tmp; \
tmp = I.regs.w[Reg]; \
I.regs.w[Reg] = I.regs.w[AW]; \
I.regs.w[AW] = tmp
#define ROL_BYTE I.CarryVal = dst & 0x80; dst = (dst << 1)+CF
#define ROL_WORD I.CarryVal = dst & 0x8000; dst = (dst << 1)+CF
#define ROR_BYTE I.CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<7)
#define ROR_WORD I.CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<15)
#define ROLC_BYTE dst = (dst << 1) + CF; SetCFB(dst)
#define ROLC_WORD dst = (dst << 1) + CF; SetCFW(dst)
#define RORC_BYTE dst = (CF<<8)+dst; I.CarryVal = dst & 0x01; dst >>= 1
#define RORC_WORD dst = (CF<<16)+dst; I.CarryVal = dst & 0x01; dst >>= 1
#define SHL_BYTE(c) dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(uint8_t)dst)
#define SHL_WORD(c) dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(uint16_t)dst)
#define SHR_BYTE(c) dst >>= c-1; I.CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(uint8_t)dst)
#define SHR_WORD(c) dst >>= c-1; I.CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(uint16_t)dst)
#define SHRA_BYTE(c) dst = ((int8_t)dst) >> (c-1); I.CarryVal = dst & 0x1; dst = ((int8_t)((uint8_t)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(uint8_t)dst)
#define SHRA_WORD(c) dst = ((int16_t)dst) >> (c-1); I.CarryVal = dst & 0x1; dst = ((int16_t)((uint16_t)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(uint16_t)dst)
#define DIVUB \
uresult = I.regs.w[AW]; \
uresult2 = uresult % tmp; \
if ((uresult /= tmp) > 0xff) { \
nec_interrupt(0,0); break; \
} else { \
I.regs.b[AL] = uresult; \
I.regs.b[AH] = uresult2; \
}
#define DIVB \
result = (int16_t)I.regs.w[AW]; \
result2 = result % (int16_t)((int8_t)tmp); \
if ((result /= (int16_t)((int8_t)tmp)) > 0xff) { \
nec_interrupt(0,0); break; \
} else { \
I.regs.b[AL] = result; \
I.regs.b[AH] = result2; \
}
#define DIVUW \
uresult = (((uint32_t)I.regs.w[DW]) << 16) | I.regs.w[AW];\
uresult2 = uresult % tmp; \
if ((uresult /= tmp) > 0xffff) { \
nec_interrupt(0,0); break; \
} else { \
I.regs.w[AW]=uresult; \
I.regs.w[DW]=uresult2; \
}
#define DIVW \
result = ((uint32_t)I.regs.w[DW] << 16) + I.regs.w[AW]; \
result2 = result % (int32_t)((int16_t)tmp); \
if ((result /= (int32_t)((int16_t)tmp)) > 0xffff) { \
nec_interrupt(0,0); break; \
} else { \
I.regs.w[AW]=result; \
I.regs.w[DW]=result2; \
}
#define ADD4S { \
int i,v1,v2,result; \
int count = (I.regs.b[CL]+1)/2; \
uint16_t di = I.regs.w[IY]; \
uint16_t si = I.regs.w[IX]; \
I.ZeroVal = I.CarryVal = 0; \
for (i=0;i<count;i++) { \
tmp = GetMemB(DS, si); \
tmp2 = GetMemB(ES, di); \
v1 = (tmp>>4)*10 + (tmp&0xf); \
v2 = (tmp2>>4)*10 + (tmp2&0xf); \
result = v1+v2+I.CarryVal; \
I.CarryVal = result > 99 ? 1 : 0; \
result = result % 100; \
v1 = ((result/10)<<4) | (result % 10); \
PutMemB(ES, di,v1); \
if (v1) I.ZeroVal = 1; \
si++; \
di++; \
} \
}
#define SUB4S { \
int count = (I.regs.b[CL]+1)/2; \
int i,v1,v2,result; \
uint16_t di = I.regs.w[IY]; \
uint16_t si = I.regs.w[IX]; \
I.ZeroVal = I.CarryVal = 0; \
for (i=0;i<count;i++) { \
tmp = GetMemB(ES, di); \
tmp2 = GetMemB(DS, si); \
v1 = (tmp>>4)*10 + (tmp&0xf); \
v2 = (tmp2>>4)*10 + (tmp2&0xf); \
if (v1 < (v2+I.CarryVal)) { \
v1+=100; \
result = v1-(v2+I.CarryVal); \
I.CarryVal = 1; \
} else { \
result = v1-(v2+I.CarryVal); \
I.CarryVal = 0; \
} \
v1 = ((result/10)<<4) | (result % 10); \
PutMemB(ES, di,v1); \
if (v1) I.ZeroVal = 1; \
si++; \
di++; \
} \
}
#define CMP4S { \
int count = (I.regs.b[CL]+1)/2; \
int i,v1,v2,result; \
uint16_t di = I.regs.w[IY]; \
uint16_t si = I.regs.w[IX]; \
I.ZeroVal = I.CarryVal = 0; \
for (i=0;i<count;i++) { \
tmp = GetMemB(ES, di); \
tmp2 = GetMemB(DS, si); \
v1 = (tmp>>4)*10 + (tmp&0xf); \
v2 = (tmp2>>4)*10 + (tmp2&0xf); \
if (v1 < (v2+I.CarryVal)) { \
v1+=100; \
result = v1-(v2+I.CarryVal); \
I.CarryVal = 1; \
} else { \
result = v1-(v2+I.CarryVal); \
I.CarryVal = 0; \
} \
v1 = ((result/10)<<4) | (result % 10); \
if (v1) I.ZeroVal = 1; \
si++; \
di++; \
} \
}
#endif /* __NEC_H_ */

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static uint32_t EA;
static uint16_t EO;
static uint16_t E16;
static unsigned EA_000(void)
{
EO=I.regs.w[BW]+I.regs.w[IX];
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_001(void)
{
EO=I.regs.w[BW]+I.regs.w[IY];
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_002(void)
{
EO=I.regs.w[BP]+I.regs.w[IX];
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_003(void)
{
EO=I.regs.w[BP]+I.regs.w[IY];
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_004(void)
{
EO=I.regs.w[IX];
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_005(void)
{
EO=I.regs.w[IY];
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_006(void)
{
EO=FETCH;
EO+=FETCH<<8;
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_007(void)
{
EO=I.regs.w[BW];
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_100(void)
{
EO=(I.regs.w[BW]+I.regs.w[IX]+(int8_t)FETCH);
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_101(void)
{
EO=(I.regs.w[BW]+I.regs.w[IY]+(int8_t)FETCH);
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_102(void)
{
EO=(I.regs.w[BP]+I.regs.w[IX]+(int8_t)FETCH);
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_103(void)
{
EO=(I.regs.w[BP]+I.regs.w[IY]+(int8_t)FETCH);
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_104(void)
{
EO=(I.regs.w[IX]+(int8_t)FETCH);
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_105(void)
{
EO=(I.regs.w[IY]+(int8_t)FETCH);
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_106(void)
{
EO=(I.regs.w[BP]+(int8_t)FETCH);
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_107(void)
{
EO=(I.regs.w[BW]+(int8_t)FETCH);
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_200(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[BW]+I.regs.w[IX]+(int16_t)E16;
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_201(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[BW]+I.regs.w[IY]+(int16_t)E16;
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_202(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[BP]+I.regs.w[IX]+(int16_t)E16;
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_203(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[BP]+I.regs.w[IY]+(int16_t)E16;
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_204(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[IX]+(int16_t)E16;
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_205(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[IY]+(int16_t)E16;
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned EA_206(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[BP]+(int16_t)E16;
EA=DefaultBase(SS)+EO;
return EA;
}
static unsigned EA_207(void)
{
E16=FETCH;
E16+=FETCH<<8;
EO=I.regs.w[BW]+(int16_t)E16;
EA=DefaultBase(DS)+EO;
return EA;
}
static unsigned (*GetEA[192])(void)=
{
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_100, EA_101, EA_102, EA_103, EA_104, EA_105, EA_106, EA_107,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207,
EA_200, EA_201, EA_202, EA_203, EA_204, EA_205, EA_206, EA_207
};

507
source/nec/necinstr.h Normal file
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static void i_add_br8(void);
static void i_add_wr16(void);
static void i_add_r8b(void);
static void i_add_r16w(void);
static void i_add_ald8(void);
static void i_add_axd16(void);
static void i_push_es(void);
static void i_pop_es(void);
static void i_or_br8(void);
static void i_or_r8b(void);
static void i_or_wr16(void);
static void i_or_r16w(void);
static void i_or_ald8(void);
static void i_or_axd16(void);
static void i_push_cs(void);
static void i_pre_nec(void);
static void i_adc_br8(void);
static void i_adc_wr16(void);
static void i_adc_r8b(void);
static void i_adc_r16w(void);
static void i_adc_ald8(void);
static void i_adc_axd16(void);
static void i_push_ss(void);
static void i_pop_ss(void);
static void i_sbb_br8(void);
static void i_sbb_wr16(void);
static void i_sbb_r8b(void);
static void i_sbb_r16w(void);
static void i_sbb_ald8(void);
static void i_sbb_axd16(void);
static void i_push_ds(void);
static void i_pop_ds(void);
static void i_and_br8(void);
static void i_and_r8b(void);
static void i_and_wr16(void);
static void i_and_r16w(void);
static void i_and_ald8(void);
static void i_and_axd16(void);
static void i_es(void);
static void i_daa(void);
static void i_sub_br8(void);
static void i_sub_wr16(void);
static void i_sub_r8b(void);
static void i_sub_r16w(void);
static void i_sub_ald8(void);
static void i_sub_axd16(void);
static void i_cs(void);
static void i_das(void);
static void i_xor_br8(void);
static void i_xor_r8b(void);
static void i_xor_wr16(void);
static void i_xor_r16w(void);
static void i_xor_ald8(void);
static void i_xor_axd16(void);
static void i_ss(void);
static void i_aaa(void);
static void i_cmp_br8(void);
static void i_cmp_wr16(void);
static void i_cmp_r8b(void);
static void i_cmp_r16w(void);
static void i_cmp_ald8(void);
static void i_cmp_axd16(void);
static void i_ds(void);
static void i_aas(void);
static void i_inc_ax(void);
static void i_inc_cx(void);
static void i_inc_dx(void);
static void i_inc_bx(void);
static void i_inc_sp(void);
static void i_inc_bp(void);
static void i_inc_si(void);
static void i_inc_di(void);
static void i_dec_ax(void);
static void i_dec_cx(void);
static void i_dec_dx(void);
static void i_dec_bx(void);
static void i_dec_sp(void);
static void i_dec_bp(void);
static void i_dec_si(void);
static void i_dec_di(void);
static void i_push_ax(void);
static void i_push_cx(void);
static void i_push_dx(void);
static void i_push_bx(void);
static void i_push_sp(void);
static void i_push_bp(void);
static void i_push_si(void);
static void i_push_di(void);
static void i_pop_ax(void);
static void i_pop_cx(void);
static void i_pop_dx(void);
static void i_pop_bx(void);
static void i_pop_sp(void);
static void i_pop_bp(void);
static void i_pop_si(void);
static void i_pop_di(void);
static void i_pusha(void);
static void i_popa(void);
static void i_chkind(void);
static void i_repnc(void);
static void i_repc(void);
static void i_push_d16(void);
static void i_imul_d16(void);
static void i_push_d8(void);
static void i_imul_d8(void);
static void i_insb(void);
static void i_insw(void);
static void i_outsb(void);
static void i_outsw(void);
static void i_jo(void);
static void i_jno(void);
static void i_jc(void);
static void i_jnc(void);
static void i_jz(void);
static void i_jnz(void);
static void i_jce(void);
static void i_jnce(void);
static void i_js(void);
static void i_jns(void);
static void i_jp(void);
static void i_jnp(void);
static void i_jl(void);
static void i_jnl(void);
static void i_jle(void);
static void i_jnle(void);
static void i_80pre(void);
static void i_82pre(void);
static void i_81pre(void);
static void i_83pre(void);
static void i_test_br8(void);
static void i_test_wr16(void);
static void i_xchg_br8(void);
static void i_xchg_wr16(void);
static void i_mov_br8(void);
static void i_mov_r8b(void);
static void i_mov_wr16(void);
static void i_mov_r16w(void);
static void i_mov_wsreg(void);
static void i_lea(void);
static void i_mov_sregw(void);
static void i_invalid(void);
static void i_popw(void);
static void i_nop(void);
static void i_xchg_axcx(void);
static void i_xchg_axdx(void);
static void i_xchg_axbx(void);
static void i_xchg_axsp(void);
static void i_xchg_axbp(void);
static void i_xchg_axsi(void);
static void i_xchg_axdi(void);
static void i_cbw(void);
static void i_cwd(void);
static void i_call_far(void);
static void i_pushf(void);
static void i_popf(void);
static void i_sahf(void);
static void i_lahf(void);
static void i_mov_aldisp(void);
static void i_mov_axdisp(void);
static void i_mov_dispal(void);
static void i_mov_dispax(void);
static void i_movsb(void);
static void i_movsw(void);
static void i_cmpsb(void);
static void i_cmpsw(void);
static void i_test_ald8(void);
static void i_test_axd16(void);
static void i_stosb(void);
static void i_stosw(void);
static void i_lodsb(void);
static void i_lodsw(void);
static void i_scasb(void);
static void i_scasw(void);
static void i_mov_ald8(void);
static void i_mov_cld8(void);
static void i_mov_dld8(void);
static void i_mov_bld8(void);
static void i_mov_ahd8(void);
static void i_mov_chd8(void);
static void i_mov_dhd8(void);
static void i_mov_bhd8(void);
static void i_mov_axd16(void);
static void i_mov_cxd16(void);
static void i_mov_dxd16(void);
static void i_mov_bxd16(void);
static void i_mov_spd16(void);
static void i_mov_bpd16(void);
static void i_mov_sid16(void);
static void i_mov_did16(void);
static void i_rotshft_bd8(void);
static void i_rotshft_wd8(void);
static void i_ret_d16(void);
static void i_ret(void);
static void i_les_dw(void);
static void i_lds_dw(void);
static void i_mov_bd8(void);
static void i_mov_wd16(void);
static void i_enter(void);
static void i_leave(void);
static void i_retf_d16(void);
static void i_retf(void);
static void i_int3(void);
static void i_int(void);
static void i_into(void);
static void i_iret(void);
static void i_rotshft_b(void);
static void i_rotshft_w(void);
static void i_rotshft_bcl(void);
static void i_rotshft_wcl(void);
static void i_aam(void);
static void i_aad(void);
static void i_setalc(void);
static void i_trans(void);
static void i_fpo(void);
static void i_loopne(void);
static void i_loope(void);
static void i_loop(void);
static void i_jcxz(void);
static void i_inal(void);
static void i_inax(void);
static void i_outal(void);
static void i_outax(void);
static void i_call_d16(void);
static void i_jmp_d16(void);
static void i_jmp_far(void);
static void i_jmp_d8(void);
static void i_inaldx(void);
static void i_inaxdx(void);
static void i_outdxal(void);
static void i_outdxax(void);
static void i_lock(void);
static void i_repne(void);
static void i_repe(void);
static void i_hlt(void);
static void i_cmc(void);
static void i_f6pre(void);
static void i_f7pre(void);
static void i_clc(void);
static void i_stc(void);
static void i_di(void);
static void i_ei(void);
static void i_cld(void);
static void i_std(void);
static void i_fepre(void);
static void i_ffpre(void);
static void i_wait(void);
void (*nec_instruction[256])(void) =
{
i_add_br8, /* 0x00 */
i_add_wr16, /* 0x01 */
i_add_r8b, /* 0x02 */
i_add_r16w, /* 0x03 */
i_add_ald8, /* 0x04 */
i_add_axd16, /* 0x05 */
i_push_es, /* 0x06 */
i_pop_es, /* 0x07 */
i_or_br8, /* 0x08 */
i_or_wr16, /* 0x09 */
i_or_r8b, /* 0x0a */
i_or_r16w, /* 0x0b */
i_or_ald8, /* 0x0c */
i_or_axd16, /* 0x0d */
i_push_cs, /* 0x0e */
i_pre_nec /* 0x0f */,
i_adc_br8, /* 0x10 */
i_adc_wr16, /* 0x11 */
i_adc_r8b, /* 0x12 */
i_adc_r16w, /* 0x13 */
i_adc_ald8, /* 0x14 */
i_adc_axd16, /* 0x15 */
i_push_ss, /* 0x16 */
i_pop_ss, /* 0x17 */
i_sbb_br8, /* 0x18 */
i_sbb_wr16, /* 0x19 */
i_sbb_r8b, /* 0x1a */
i_sbb_r16w, /* 0x1b */
i_sbb_ald8, /* 0x1c */
i_sbb_axd16, /* 0x1d */
i_push_ds, /* 0x1e */
i_pop_ds, /* 0x1f */
i_and_br8, /* 0x20 */
i_and_wr16, /* 0x21 */
i_and_r8b, /* 0x22 */
i_and_r16w, /* 0x23 */
i_and_ald8, /* 0x24 */
i_and_axd16, /* 0x25 */
i_es, /* 0x26 */
i_daa, /* 0x27 */
i_sub_br8, /* 0x28 */
i_sub_wr16, /* 0x29 */
i_sub_r8b, /* 0x2a */
i_sub_r16w, /* 0x2b */
i_sub_ald8, /* 0x2c */
i_sub_axd16, /* 0x2d */
i_cs, /* 0x2e */
i_das, /* 0x2f */
i_xor_br8, /* 0x30 */
i_xor_wr16, /* 0x31 */
i_xor_r8b, /* 0x32 */
i_xor_r16w, /* 0x33 */
i_xor_ald8, /* 0x34 */
i_xor_axd16, /* 0x35 */
i_ss, /* 0x36 */
i_aaa, /* 0x37 */
i_cmp_br8, /* 0x38 */
i_cmp_wr16, /* 0x39 */
i_cmp_r8b, /* 0x3a */
i_cmp_r16w, /* 0x3b */
i_cmp_ald8, /* 0x3c */
i_cmp_axd16, /* 0x3d */
i_ds, /* 0x3e */
i_aas, /* 0x3f */
i_inc_ax, /* 0x40 */
i_inc_cx, /* 0x41 */
i_inc_dx, /* 0x42 */
i_inc_bx, /* 0x43 */
i_inc_sp, /* 0x44 */
i_inc_bp, /* 0x45 */
i_inc_si, /* 0x46 */
i_inc_di, /* 0x47 */
i_dec_ax, /* 0x48 */
i_dec_cx, /* 0x49 */
i_dec_dx, /* 0x4a */
i_dec_bx, /* 0x4b */
i_dec_sp, /* 0x4c */
i_dec_bp, /* 0x4d */
i_dec_si, /* 0x4e */
i_dec_di, /* 0x4f */
i_push_ax, /* 0x50 */
i_push_cx, /* 0x51 */
i_push_dx, /* 0x52 */
i_push_bx, /* 0x53 */
i_push_sp, /* 0x54 */
i_push_bp, /* 0x55 */
i_push_si, /* 0x56 */
i_push_di, /* 0x57 */
i_pop_ax, /* 0x58 */
i_pop_cx, /* 0x59 */
i_pop_dx, /* 0x5a */
i_pop_bx, /* 0x5b */
i_pop_sp, /* 0x5c */
i_pop_bp, /* 0x5d */
i_pop_si, /* 0x5e */
i_pop_di, /* 0x5f */
i_pusha, /* 0x60 */
i_popa, /* 0x61 */
i_chkind, /* 0x62 */
i_invalid, /* 0x63 */
i_repnc, /* 0x64 */
i_repc, /* 0x65 */
i_invalid, /* 0x66 */
i_invalid, /* 0x67 */
i_push_d16, /* 0x68 */
i_imul_d16, /* 0x69 */
i_push_d8, /* 0x6a */
i_imul_d8, /* 0x6b */
i_insb, /* 0x6c */
i_insw, /* 0x6d */
i_outsb, /* 0x6e */
i_outsw, /* 0x6f */
i_jo, /* 0x70 */
i_jno, /* 0x71 */
i_jc, /* 0x72 */
i_jnc, /* 0x73 */
i_jz, /* 0x74 */
i_jnz, /* 0x75 */
i_jce, /* 0x76 */
i_jnce, /* 0x77 */
i_js, /* 0x78 */
i_jns, /* 0x79 */
i_jp, /* 0x7a */
i_jnp, /* 0x7b */
i_jl, /* 0x7c */
i_jnl, /* 0x7d */
i_jle, /* 0x7e */
i_jnle, /* 0x7f */
i_80pre, /* 0x80 */
i_81pre, /* 0x81 */
i_82pre, /* 0x82 */
i_83pre, /* 0x83 */
i_test_br8, /* 0x84 */
i_test_wr16, /* 0x85 */
i_xchg_br8, /* 0x86 */
i_xchg_wr16, /* 0x87 */
i_mov_br8, /* 0x88 */
i_mov_wr16, /* 0x89 */
i_mov_r8b, /* 0x8a */
i_mov_r16w, /* 0x8b */
i_mov_wsreg, /* 0x8c */
i_lea, /* 0x8d */
i_mov_sregw, /* 0x8e */
i_popw, /* 0x8f */
i_nop, /* 0x90 */
i_xchg_axcx, /* 0x91 */
i_xchg_axdx, /* 0x92 */
i_xchg_axbx, /* 0x93 */
i_xchg_axsp, /* 0x94 */
i_xchg_axbp, /* 0x95 */
i_xchg_axsi, /* 0x97 */
i_xchg_axdi, /* 0x97 */
i_cbw, /* 0x98 */
i_cwd, /* 0x99 */
i_call_far, /* 0x9a */
i_wait, /* 0x9b */
i_pushf, /* 0x9c */
i_popf, /* 0x9d */
i_sahf, /* 0x9e */
i_lahf, /* 0x9f */
i_mov_aldisp, /* 0xa0 */
i_mov_axdisp, /* 0xa1 */
i_mov_dispal, /* 0xa2 */
i_mov_dispax, /* 0xa3 */
i_movsb, /* 0xa4 */
i_movsw, /* 0xa5 */
i_cmpsb, /* 0xa6 */
i_cmpsw, /* 0xa7 */
i_test_ald8, /* 0xa8 */
i_test_axd16, /* 0xa9 */
i_stosb, /* 0xaa */
i_stosw, /* 0xab */
i_lodsb, /* 0xac */
i_lodsw, /* 0xad */
i_scasb, /* 0xae */
i_scasw, /* 0xaf */
i_mov_ald8, /* 0xb0 */
i_mov_cld8, /* 0xb1 */
i_mov_dld8, /* 0xb2 */
i_mov_bld8, /* 0xb3 */
i_mov_ahd8, /* 0xb4 */
i_mov_chd8, /* 0xb5 */
i_mov_dhd8, /* 0xb6 */
i_mov_bhd8, /* 0xb7 */
i_mov_axd16, /* 0xb8 */
i_mov_cxd16, /* 0xb9 */
i_mov_dxd16, /* 0xba */
i_mov_bxd16, /* 0xbb */
i_mov_spd16, /* 0xbc */
i_mov_bpd16, /* 0xbd */
i_mov_sid16, /* 0xbe */
i_mov_did16, /* 0xbf */
i_rotshft_bd8, /* 0xc0 */
i_rotshft_wd8, /* 0xc1 */
i_ret_d16, /* 0xc2 */
i_ret, /* 0xc3 */
i_les_dw, /* 0xc4 */
i_lds_dw, /* 0xc5 */
i_mov_bd8, /* 0xc6 */
i_mov_wd16, /* 0xc7 */
i_enter, /* 0xc8 */
i_leave, /* 0xc9 */
i_retf_d16, /* 0xca */
i_retf, /* 0xcb */
i_int3, /* 0xcc */
i_int, /* 0xcd */
i_into, /* 0xce */
i_iret, /* 0xcf */
i_rotshft_b, /* 0xd0 */
i_rotshft_w, /* 0xd1 */
i_rotshft_bcl, /* 0xd2 */
i_rotshft_wcl, /* 0xd3 */
i_aam, /* 0xd4 */
i_aad, /* 0xd5 */
i_setalc,
i_trans, /* 0xd7 */
i_fpo, /* 0xd8 */
i_fpo, /* 0xd9 */
i_fpo, /* 0xda */
i_fpo, /* 0xdb */
i_fpo, /* 0xdc */
i_fpo, /* 0xdd */
i_fpo, /* 0xde */
i_fpo, /* 0xdf */
i_loopne, /* 0xe0 */
i_loope, /* 0xe1 */
i_loop, /* 0xe2 */
i_jcxz, /* 0xe3 */
i_inal, /* 0xe4 */
i_inax, /* 0xe5 */
i_outal, /* 0xe6 */
i_outax, /* 0xe7 */
i_call_d16, /* 0xe8 */
i_jmp_d16, /* 0xe9 */
i_jmp_far, /* 0xea */
i_jmp_d8, /* 0xeb */
i_inaldx, /* 0xec */
i_inaxdx, /* 0xed */
i_outdxal, /* 0xee */
i_outdxax, /* 0xef */
i_lock, /* 0xf0 */
i_invalid, /* 0xf1 */
i_repne, /* 0xf2 */
i_repe, /* 0xf3 */
i_hlt, /* 0xf4 */
i_cmc, /* 0xf5 */
i_f6pre, /* 0xf6 */
i_f7pre, /* 0xf7 */
i_clc, /* 0xf8 */
i_stc, /* 0xf9 */
i_di, /* 0xfa */
i_ei, /* 0xfb */
i_cld, /* 0xfc */
i_std, /* 0xfd */
i_fepre, /* 0xfe */
i_ffpre /* 0xff */
};

77
source/nec/necintrf.h Normal file
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@@ -0,0 +1,77 @@
/* ASG 971222 -- rewrote this interface */
#ifndef __NECITRF_H_
#define __NECITRF_H_
enum
{
NEC_IP=1, NEC_AW, NEC_CW, NEC_DW, NEC_BW, NEC_SP, NEC_BP, NEC_IX, NEC_IY,
NEC_FLAGS, NEC_ES, NEC_CS, NEC_SS, NEC_DS,
NEC_VECTOR, NEC_PENDING, NEC_NMI_STATE, NEC_IRQ_STATE
};
/* Public variables */
extern int nec_ICount;
/* Public functions */
/*
#define v20_ICount nec_ICount
extern void v20_init(void);
extern void v20_reset(void *param);
extern void v20_exit(void);
extern int v20_execute(int cycles);
extern unsigned v20_get_context(void *dst);
extern void v20_set_context(void *src);
extern unsigned v20_get_reg(int regnum);
extern void v20_set_reg(int regnum, unsigned val);
extern void v20_set_irq_line(int irqline, int state);
extern void v20_set_irq_callback(int (*callback)(int irqline));
extern const char *v20_info(void *context, int regnum);
extern unsigned v20_dasm(char *buffer, unsigned pc);
#define v30_ICount nec_ICount
extern void v30_init(void);
extern void v30_reset(void *param);
extern void v30_exit(void);
extern int v30_execute(int cycles);
extern unsigned v30_get_context(void *dst);
extern void v30_set_context(void *src);
extern unsigned v30_get_reg(int regnum);
extern void v30_set_reg(int regnum, unsigned val);
extern void v30_set_irq_line(int irqline, int state);
extern void v30_set_irq_callback(int (*callback)(int irqline));
extern const char *v30_info(void *context, int regnum);
extern unsigned v30_dasm(char *buffer, unsigned pc);
#define v33_ICount nec_ICount
extern void v33_init(void);
extern void v33_reset(void *param);
extern void v33_exit(void);
extern int v33_execute(int cycles);
extern unsigned v33_get_context(void *dst);
extern void v33_set_context(void *src);
extern unsigned v33_get_reg(int regnum);
extern void v33_set_reg(int regnum, unsigned val);
extern void v33_set_irq_line(int irqline, int state);
extern void v33_set_irq_callback(int (*callback)(int irqline));
extern const char *v33_info(void *context, int regnum);
extern unsigned v33_dasm(char *buffer, unsigned pc);
*/
void nec_set_irq_line(int irqline, int state);
void nec_set_reg(int regnum, uint32_t val);
int nec_execute(int cycles);
unsigned nec_get_reg(int regnum);
void nec_reset (void *param);
void nec_int(uint16_t vector);
uint8_t cpu_readport(uint8_t);
void cpu_writeport(uint32_t, uint8_t);
#define cpu_readop cpu_readmem20
#define cpu_readop_arg cpu_readmem20
void cpu_writemem20(uint32_t, uint8_t);
uint8_t cpu_readmem20(uint32_t);
#endif /* __NECITRF_H_ */

107
source/nec/necmodrm.h Normal file
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@@ -0,0 +1,107 @@
static struct
{
struct
{
WREGS w[256];
BREGS b[256];
} reg;
struct
{
WREGS w[256];
BREGS b[256];
} RM;
} Mod_RM;
#define RegWord(ModRM) I.regs.w[Mod_RM.reg.w[ModRM]]
#define RegByte(ModRM) I.regs.b[Mod_RM.reg.b[ModRM]]
#define GetRMWord(ModRM) \
((ModRM) >= 0xc0 ? I.regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(), ReadWord( EA ) ))
#define PutbackRMWord(ModRM,val) \
{ \
if (ModRM >= 0xc0) I.regs.w[Mod_RM.RM.w[ModRM]]=val; \
else WriteWord(EA,val); \
}
#define GetnextRMWord ReadWord((EA&0xf0000)|((EA+2)&0xffff))
#define PutRMWord(ModRM,val) \
{ \
if (ModRM >= 0xc0) \
I.regs.w[Mod_RM.RM.w[ModRM]]=val; \
else { \
(*GetEA[ModRM])(); \
WriteWord( EA ,val); \
} \
}
#define PutImmRMWord(ModRM) \
{ \
int16_t val; \
if (ModRM >= 0xc0) \
FETCHWORD(I.regs.w[Mod_RM.RM.w[ModRM]]) \
else { \
(*GetEA[ModRM])(); \
FETCHWORD(val) \
WriteWord( EA , val); \
} \
}
#define GetRMByte(ModRM) \
((ModRM) >= 0xc0 ? I.regs.b[Mod_RM.RM.b[ModRM]] : ReadByte( (*GetEA[ModRM])() ))
#define PutRMByte(ModRM,val) \
{ \
if (ModRM >= 0xc0) \
I.regs.b[Mod_RM.RM.b[ModRM]]=val; \
else \
WriteByte( (*GetEA[ModRM])() ,val); \
}
#define PutImmRMByte(ModRM) \
{ \
if (ModRM >= 0xc0) \
I.regs.b[Mod_RM.RM.b[ModRM]]=FETCH; \
else { \
(*GetEA[ModRM])(); \
WriteByte( EA , FETCH ); \
} \
}
#define PutbackRMByte(ModRM,val) \
{ \
if (ModRM >= 0xc0) \
I.regs.b[Mod_RM.RM.b[ModRM]]=val; \
else \
WriteByte(EA,val); \
}
#define DEF_br8 \
uint32_t ModRM = FETCH,src,dst; \
src = RegByte(ModRM); \
dst = GetRMByte(ModRM)
#define DEF_wr16 \
uint32_t ModRM = FETCH,src,dst; \
src = RegWord(ModRM); \
dst = GetRMWord(ModRM)
#define DEF_r8b \
uint32_t ModRM = FETCH,src,dst; \
dst = RegByte(ModRM); \
src = GetRMByte(ModRM)
#define DEF_r16w \
uint32_t ModRM = FETCH,src,dst; \
dst = RegWord(ModRM); \
src = GetRMWord(ModRM)
#define DEF_ald8 \
uint32_t src = FETCH; \
uint32_t dst = I.regs.b[AL]
#define DEF_axd16 \
uint32_t src = FETCH; \
uint32_t dst = I.regs.w[AW]; \
src += (FETCH << 8)