b1abbf6bfe
Now support the BW and Color IROM Internal EEPROM support is now nearly correct (still some odd thing happening)
974 lines
19 KiB
C++
974 lines
19 KiB
C++
////////////////////////////////////////////////////////////////////////////////
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// I/O ports
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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//
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//
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//////////////////////////////////////////////////////////////////////////////
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <fcntl.h>
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#include <time.h>
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#include <unistd.h> /* UNIX standard function definitions */
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#include <errno.h> /* Error number definitions */
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#include <termios.h> /* POSIX terminal control definitions */
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#include <sys/mman.h>
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#include "log.h"
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#include "rom.h"
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#include "./nec/nec.h"
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#include "initialIo.h"
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#include "gpu.h"
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#include "audio.h"
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#include "memory.h"
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extern uint8 *externalEeprom;
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extern uint32 externalEepromAddressMask;
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extern uint32 romAddressMask;
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extern char *internalEeprom;
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uint8_t iee_WriteEnable = false;
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uint8_t iee_SelAddress = 0;
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uint8 *ws_ioRam=NULL;
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uint8 ws_key_start;
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uint8 ws_key_left;
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uint8 ws_key_right;
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uint8 ws_key_up;
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uint8 ws_key_down;
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uint8 ws_key_button_1;
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uint8 ws_key_button_2;
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uint8 ws_key_flipped;
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int rtcDataRegisterReadCount=0;
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////////////////////////////////////////////////////////////////////////////////
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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void ws_io_reset(void)
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{
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ws_key_start=0;
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ws_key_left=0;
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ws_key_right=0;
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ws_key_up=0;
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ws_key_down=0;
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ws_key_button_1=0;
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ws_key_button_2=0;
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int i;
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for (i=0; i<0x100; i++)
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{
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ws_ioRam[i]= initialIoValue[i];
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}
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/*for (i=0; i<0xc9; i++)
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{
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cpu_writeport(i,initialIoValue[i]);
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}*/
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rtcDataRegisterReadCount=0;
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}
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////////////////////////////////////////////////////////////////////////////////
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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void ws_io_init(void)
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{
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if (ws_ioRam==NULL)
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{
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ws_ioRam=(uint8*)malloc(0x100);
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}
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ws_io_reset();
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ws_key_flipped=0;
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}
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////////////////////////////////////////////////////////////////////////////////
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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void ws_io_flipControls(void)
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{
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ws_key_flipped=!ws_key_flipped;
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}
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////////////////////////////////////////////////////////////////////////////////
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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void ws_io_done(void)
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{
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if (ws_ioRam==NULL)
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{
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free(ws_ioRam);
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}
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}
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/* Serial port */
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#define BDR_9600 (0)
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#define BDR_38400 (1)
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#define SERIAL_PORT "/dev/tty.USA19H141P1.1"
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int serialfd = -1;
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int serial_have_data = 0;
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unsigned char serial_data = 0;
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int serial_speed = BDR_9600;
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void open_serial()
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{
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if (serialfd < 0)
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{
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serialfd = open(SERIAL_PORT, O_RDWR | O_NOCTTY | O_NDELAY);
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//set_baudrate(serial_speed);
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serial_have_data = 0;
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}
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}
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void set_baudrate(int speed)
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{
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struct termios options;
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if (serialfd < 0)
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{
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return;
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}
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tcgetattr(serialfd, &options);
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options.c_cflag &= ~PARENB;
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options.c_cflag &= ~CSTOPB;
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options.c_cflag &= ~CSIZE;
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options.c_cflag |= CS8;
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if (speed == BDR_9600)
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{
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cfsetispeed(&options, B9600);
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}
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else
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{
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cfsetospeed(&options, B38400);
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}
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#if 0
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options.c_cflag &= ~CNEW_RTSCTS;
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#else
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options.c_cflag &= ~CRTSCTS;
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#endif
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options.c_cflag |= (CLOCAL | CREAD);
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options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
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options.c_oflag &= ~OPOST;
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tcsetattr(serialfd, TCSANOW, &options);
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/* Make sure read is not blocking */
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fcntl(serialfd, F_SETFL, FNDELAY);
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}
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void close_serial()
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{
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close(serialfd);
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serialfd = -1;
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}
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void nec_int(DWORD wektor);
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void check_serial_data()
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{
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unsigned char buf[10];
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int f;
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if (serialfd < 0)
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{
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return;
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}
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if (serial_have_data == 0)
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{
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f = read(serialfd, buf, 1);
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if (f > 0)
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{
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printf("Ho [%d]!\n", f);
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fflush(stdout);
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serial_have_data = 0x01;
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serial_data = buf[0];
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}
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}
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if(serial_have_data > 0)
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{
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/* Gen an int if enabled */
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if(ws_ioRam[0xB2] & 0x04)
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{
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ws_ioRam[0xb6] &= ~ 0x04;
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printf("INNNNNTTTT!!!!!!!");
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nec_int((ws_ioRam[0xb0]+3)*4);
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}
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}
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}
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unsigned char read_serial()
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{
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unsigned char buf[10];
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int f;
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if (serialfd < 0)
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{
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return 0xFF;
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}
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if (serial_have_data > 0)
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{
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serial_have_data = 0;
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return serial_data;
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}
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f = read(serialfd, buf, 1);
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if (f == 1)
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{
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return buf[0];
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}
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return 0x42;
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}
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void write_serial(unsigned char value)
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{
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if (serialfd < 0)
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{
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return;
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}
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write(serialfd, &value, 1);
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}
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////////////////////////////////////////////////////////////////////////////////
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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BYTE cpu_readport(BYTE port)
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{
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int w1,w2;
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BYTE retVal = 0;
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/*if ((port >= 0xBA) && (port <= 0xBE))
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{
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printf("Reading IEEP %02X\n", port);
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}*/
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switch (port)
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{
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case 0x4e:
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case 0x4f:
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case 0x50:
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case 0x51:
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case 0x80:
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case 0x81:
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case 0x82:
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case 0x83:
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case 0x84:
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case 0x85:
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case 0x86:
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case 0x87:
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case 0x88:
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case 0x89:
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case 0x8a:
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case 0x8b:
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case 0x8c:
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case 0x8d:
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case 0x8e:
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case 0x8f:
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case 0x90:
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case 0x91:
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case 0x92:
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case 0x93:
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case 0x94:
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return(ws_audio_port_read(port));
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//case 0xaa: return 0xff;
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/*case 0xb3: // ???
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if (ws_ioRam[0xb3]<0x80)
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return 0;
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if (ws_ioRam[0xb3]<0xc0)
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return 0x84;
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return 0xc4;*/
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case 0xb5:
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w1=ws_ioRam[0xb5];
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if(w1&0x40)
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{
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w2=0x00;
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if (ws_key_flipped)
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{
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w2=(ws_key_start<<1);
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}
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else
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{
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w2=(ws_key_start<<1)|(ws_key_button_1<<2)|(ws_key_button_2<<3);
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}
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return (uint8)((w1&0xf0)|w2);
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}
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if(w1&0x20)
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{
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w2=0x00;
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if (ws_key_flipped)
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{
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w2=(ws_key_button_1)|(ws_key_button_2<<2);
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}
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else
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{
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w2=(ws_key_up<<0)|(ws_key_right<<1)|(ws_key_down<<2)|(ws_key_left<<3);
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}
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return (uint8)((w1&0xf0)|w2);
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}
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if(w1&0x10)
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{
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w2=0x00;
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if (ws_key_flipped)
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{
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w2=(ws_key_up<<1)|(ws_key_right<<2)|(ws_key_down<<3)|(ws_key_left);
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}
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return (uint8)((w1&0xf0)|w2);
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}
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break;
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case 0xbe: // internal eeprom status/command register
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// ack eeprom write
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if(ws_ioRam[0xbe]&0x20)
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{
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return ws_ioRam[0xbe]|2;
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}
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// ack eeprom read
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if(ws_ioRam[0xbe]&0x10)
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{
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return ws_ioRam[0xbe]|1;
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}
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// else ack both
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return ws_ioRam[0xbe]|3;
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case 0xba: // eeprom even byte read
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return internalEeprom[iee_SelAddress];
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case 0xbb: // eeprom odd byte read
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return internalEeprom[iee_SelAddress + 1];
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case 0xc0 : // ???
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retVal = ((ws_ioRam[0xc0]&0xf)|0x20);
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goto exit;
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case 0xc4: // external eeprom even byte read
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w1=(((((WORD)ws_ioRam[0xc7])<<8)|((WORD)ws_ioRam[0xc6]))<<1)&(externalEepromAddressMask);
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retVal = externalEeprom[w1];
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goto exit;
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case 0xc5: // external eeprom odd byte read
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w1=(((((WORD)ws_ioRam[0xc7])<<8)|((WORD)ws_ioRam[0xc6]))<<1)&(externalEepromAddressMask);
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retVal = externalEeprom[w1+1];
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goto exit;
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case 0xc8: // external eeprom status/command register
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// ack eeprom write
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if(ws_ioRam[0xc8]&0x20)
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{
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retVal = ws_ioRam[0xc8]|2;
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goto exit;
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}
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// ack eeprom read
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if(ws_ioRam[0xc8]&0x10)
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{
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retVal = ws_ioRam[0xc8]|1;
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goto exit;
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}
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// else ack both
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retVal = ws_ioRam[0xc8]|3;
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goto exit;
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case 0xca : // RTC Command and status register
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// set ack to always 1
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retVal = (ws_ioRam[0xca]|0x80);
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goto exit;
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case 0xcb : // RTC data register
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if(ws_ioRam[0xca]==0x15) // get time command
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{
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struct tm *newtime;
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time_t long_time;
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time( &long_time );
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newtime = localtime( &long_time );
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#define BCD(value) ((value/10)<<4)|(value%10)
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switch(rtcDataRegisterReadCount)
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{
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case 0:
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rtcDataRegisterReadCount++;
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retVal = BCD(newtime->tm_year-100);
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goto exit;
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case 1:
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rtcDataRegisterReadCount++;
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retVal = BCD(newtime->tm_mon);
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goto exit;
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case 2:
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rtcDataRegisterReadCount++;
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retVal = BCD(newtime->tm_mday);
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goto exit;
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case 3:
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rtcDataRegisterReadCount++;
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retVal = BCD(newtime->tm_wday);
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goto exit;
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case 4:
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rtcDataRegisterReadCount++;
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retVal = BCD(newtime->tm_hour);
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goto exit;
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case 5:
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rtcDataRegisterReadCount++;
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retVal = BCD(newtime->tm_min);
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goto exit;
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case 6:
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rtcDataRegisterReadCount=0;
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retVal = BCD(newtime->tm_sec);
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goto exit;
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}
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return 0;
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}
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else
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{
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// set ack
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retVal = (ws_ioRam[0xcb]|0x80);
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goto exit;
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}
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case 0xD0:
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retVal = 0;
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goto exit;
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/* Serial port link.. */
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case 0xB1:
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retVal = read_serial();
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printf("RS232: Read %02X\n", retVal);
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goto exit;
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case 0xB3:
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check_serial_data();
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if (ws_ioRam[0xB3] & 0x80)
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{
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retVal = (ws_ioRam[0xB3] & ~1) | serial_have_data | 0x04;
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}
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else
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{
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retVal = 0x00;
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}
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printf("<<<<RS232STA: %02X [%c%c%cxx%c%c%c]\n", retVal,
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(retVal & 0x80)?'E':'d',
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(retVal & 0x40)?'3':'9',
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(retVal & 0x20)?'R':'n',
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(retVal & 0x04)?'E':'f',
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(retVal & 0x02)?'V':'n',
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(retVal & 0x01)?'D':'e'
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);
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goto exit;
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default:
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if (port > 0xD0)
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{
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printf("ReadIO %02X <= %02X\n", port, retVal);
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}
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break;
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}
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retVal = ws_gpu_port_read(port);
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exit:
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return retVal;
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}
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////////////////////////////////////////////////////////////////////////////////
|
|
//
|
|
////////////////////////////////////////////////////////////////////////////////
|
|
//
|
|
//
|
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//
|
|
//
|
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//
|
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//
|
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//
|
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////////////////////////////////////////////////////////////////////////////////
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void cpu_writeport(DWORD port,BYTE value)
|
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{
|
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//unsigned short F0dbg = 0;
|
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int w1; //,w2;
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int unknown_io_port=0;
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|
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/*if ((port >= 0xBA) && (port <= 0xBE))
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{
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printf("Writing IEEP %02X <= %02X\n", port, value);
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}*/
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|
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if ((ws_ioRam[port]==value) && (port < 0xF0) && ((port < 0xB0) || (port > 0xBF)) )
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{
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return;
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}
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|
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ws_ioRam[port]=value;
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|
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switch (port)
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{
|
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/* GPU IOs */
|
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case 0x00:
|
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case 0x01:
|
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case 0x02:
|
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case 0x03:
|
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case 0x04:
|
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case 0x05:
|
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case 0x06:
|
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case 0x07:
|
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case 0x08:
|
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case 0x09:
|
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case 0x0A:
|
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case 0x0B:
|
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case 0x0C:
|
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case 0x0D:
|
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case 0x0E:
|
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case 0x0F:
|
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case 0x10:
|
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case 0x11:
|
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case 0x12:
|
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case 0x13:
|
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case 0x14:
|
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break;
|
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|
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case 0x15:
|
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printf("Icons %c %c %c %c %c %c %c %c\n",
|
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(value>>7)&1?'?':' ',
|
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(value>>6)&1?'?':' ',
|
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(value>>5)&1?'3':' ',
|
|
(value>>4)&1?'2':' ',
|
|
(value>>3)&1?'1':' ',
|
|
(value>>2)&1?'H':' ',
|
|
(value>>1)&1?'V':' ',
|
|
(value>>0)&1?'S':' '
|
|
);
|
|
break;
|
|
|
|
/* Palettes ? */
|
|
case 0x1C:
|
|
case 0x25:
|
|
case 0x2F:
|
|
case 0x38:
|
|
case 0x1D:
|
|
case 0x26:
|
|
case 0x30:
|
|
case 0x39:
|
|
case 0x1E:
|
|
case 0x27:
|
|
case 0x31:
|
|
case 0x3A:
|
|
case 0x1F:
|
|
case 0x28:
|
|
case 0x32:
|
|
case 0x3B:
|
|
case 0x20:
|
|
case 0x29:
|
|
case 0x33:
|
|
case 0x3C:
|
|
case 0x21:
|
|
case 0x2A:
|
|
case 0x34:
|
|
case 0x3E:
|
|
case 0x22:
|
|
case 0x2B:
|
|
case 0x35:
|
|
case 0x3F:
|
|
case 0x23:
|
|
case 0x2C:
|
|
case 0x36:
|
|
case 0x24:
|
|
case 0x2E:
|
|
case 0x37:
|
|
break;
|
|
|
|
/* DMAs */
|
|
case 0x40:
|
|
case 0x41:
|
|
case 0x42:
|
|
case 0x43:
|
|
case 0x44:
|
|
case 0x45:
|
|
case 0x46:
|
|
case 0x47:
|
|
break;
|
|
|
|
case 0x48: // DMA
|
|
|
|
// bit 7 set to start dma transfer
|
|
if(value&0x80)
|
|
{
|
|
int dma_start = (((DWORD)ws_ioRam[0x41])<<8)|(((DWORD)ws_ioRam[0x40]))|(((DWORD)ws_ioRam[0x42])<<16);
|
|
int dma_end = (((DWORD)ws_ioRam[0x45])<<8)|(((DWORD)ws_ioRam[0x44]))|(((DWORD)ws_ioRam[0x43])<<16);
|
|
int dma_size = (((DWORD)ws_ioRam[0x47])<<8)|(((DWORD)ws_ioRam[0x46]));
|
|
|
|
for(int ix=0; ix<dma_size; ix++)
|
|
{
|
|
cpu_writemem20(dma_end++,cpu_readmem20(dma_start++));
|
|
}
|
|
|
|
ws_ioRam[0x47]=0;
|
|
ws_ioRam[0x46]=0;
|
|
ws_ioRam[0x41]=(BYTE)(dma_start>>8);
|
|
ws_ioRam[0x40]=(BYTE)(dma_start&0xff);
|
|
ws_ioRam[0x45]=(BYTE)(dma_end>>8);
|
|
ws_ioRam[0x44]=(BYTE)(dma_end&0xff);
|
|
ws_ioRam[0x48]=0;
|
|
}
|
|
|
|
break;
|
|
|
|
/* Audio */
|
|
case 0x4a:
|
|
case 0x4b:
|
|
case 0x4c:
|
|
case 0x4d:
|
|
case 0x4e:
|
|
case 0x4f:
|
|
ws_audio_port_write(port, value);
|
|
break;
|
|
|
|
/* DMA Start! */
|
|
case 0x52:
|
|
break;
|
|
|
|
/* GPU (again) */
|
|
case 0x60:
|
|
break;
|
|
|
|
/* Audio */
|
|
case 0x80:
|
|
case 0x81:
|
|
case 0x82:
|
|
case 0x83:
|
|
case 0x84:
|
|
case 0x85:
|
|
case 0x86:
|
|
case 0x87:
|
|
case 0x88:
|
|
case 0x89:
|
|
case 0x8a:
|
|
case 0x8b:
|
|
case 0x8c:
|
|
case 0x8d:
|
|
case 0x8e:
|
|
case 0x8f:
|
|
case 0x90:
|
|
case 0x91:
|
|
case 0x92:
|
|
case 0x93:
|
|
case 0x94:
|
|
ws_audio_port_write(port,value);
|
|
break;
|
|
|
|
/* Hardware */
|
|
case 0xA0:
|
|
/* Force cart handshake to be set */
|
|
ws_ioRam[port] |= 0x80;
|
|
break;
|
|
|
|
/*Timers */
|
|
case 0xA2:
|
|
case 0xA4:
|
|
case 0xA5:
|
|
case 0xA6:
|
|
case 0xA7:
|
|
case 0xA8:
|
|
case 0xA9:
|
|
case 0xAA:
|
|
case 0xAB:
|
|
break;
|
|
|
|
/* Hardware */
|
|
case 0xB0:
|
|
break;
|
|
|
|
case 0xB1:
|
|
write_serial(value); /*printf("RS232 TX: %02X\n", value);*/ break;
|
|
|
|
case 0xB2:
|
|
break;
|
|
|
|
case 0xB3:
|
|
printf(">>>>RS232STA: %02X [%c%c%cxx%c%c%c]\n", value,
|
|
(value & 0x80)?'E':'d',
|
|
(value & 0x40)?'3':'9',
|
|
(value & 0x20)?'R':'n',
|
|
(value & 0x04)?'E':'f',
|
|
(value & 0x02)?'V':'n',
|
|
(value & 0x01)?'D':'e'
|
|
);
|
|
|
|
/* Serial status: 7 = Enable, 6 = baudrate, 5 = Overrun reset
|
|
2 = Send Buffer empty
|
|
1 = Overrun
|
|
0 = Data Received
|
|
*/
|
|
serial_speed = ((value&040) == 0x00)?BDR_9600:BDR_38400;
|
|
|
|
if ((value & 0x80) == 0x80)
|
|
{
|
|
open_serial();
|
|
set_baudrate(serial_speed);
|
|
check_serial_data();
|
|
}
|
|
|
|
break;
|
|
|
|
case 0xB5:
|
|
break;
|
|
|
|
/* buttons */
|
|
case 0xB6:
|
|
break;
|
|
|
|
/* Internal EEPROM */
|
|
|
|
case 0xba: /* DATA Low */
|
|
if (iee_WriteEnable)
|
|
{
|
|
printf("@ %X <- %X\n", iee_SelAddress, value);
|
|
internalEeprom[iee_SelAddress]=value;
|
|
}
|
|
msync(internalEeprom, 1024, MS_SYNC);
|
|
break;
|
|
|
|
case 0xbb: /* Data High */
|
|
if (iee_WriteEnable)
|
|
{
|
|
printf("@ %X <- %X\n", iee_SelAddress + 1, value);
|
|
internalEeprom[iee_SelAddress + 1]=value;
|
|
}
|
|
msync(internalEeprom, 1024, MS_SYNC);
|
|
break;
|
|
|
|
case 0xBC: /* Address Low */
|
|
case 0xBD: /* Address High */
|
|
break;
|
|
case 0xBE: /* Command / Status */
|
|
{
|
|
enum
|
|
{
|
|
EEPROM_SUBCOMMAND = 0,
|
|
EEPROM_WRITE,
|
|
EEPROM_READ,
|
|
EEPROM_ERASE,
|
|
EEPROM_WRITEDISABLE,
|
|
EEPROM_WRITEALL,
|
|
EEPROM_ERASEALL,
|
|
EEPROM_WRITEENABLE
|
|
};
|
|
uint8_t address, command, subcmd;
|
|
|
|
address = (ws_ioRam[0xBD] << 8) | ws_ioRam[0xBC];
|
|
|
|
if (ws_gpu_operatingInColor)
|
|
{
|
|
command = (address >> 11) & 0x3;
|
|
address = address & 0x3FF;
|
|
subcmd = (address >> 8) & 0x03;
|
|
}
|
|
else
|
|
{
|
|
command = (address >> 6) & 0x3;
|
|
address = address & 0x3F;
|
|
subcmd = (address >> 4) & 0x03;
|
|
}
|
|
|
|
if (command == EEPROM_SUBCOMMAND)
|
|
{
|
|
command = EEPROM_WRITEDISABLE + subcmd;
|
|
}
|
|
|
|
printf("IEEP: [%X:%X:%X] -> %X : %d : %d\n", ws_ioRam[0xBC], ws_ioRam[0xBD], ws_ioRam[0xBE], address, command, subcmd);
|
|
|
|
if (value & 0x40)
|
|
{
|
|
/* Sub command */
|
|
printf("IEEP: Sub\n");
|
|
if (command == EEPROM_WRITEENABLE)
|
|
{
|
|
printf("IEEP: Write Enable\n");
|
|
iee_WriteEnable = true;
|
|
}
|
|
else if (command == EEPROM_WRITEDISABLE)
|
|
{
|
|
printf("IEEP: Write Disable\n");
|
|
iee_WriteEnable = false;
|
|
}
|
|
else if (command == EEPROM_ERASEALL)
|
|
{
|
|
printf("IEEP: Erase All\n");
|
|
if (ws_gpu_operatingInColor)
|
|
{
|
|
memset(internalEeprom, 0, COLOR_IEEPROM_SIZE);
|
|
}
|
|
else
|
|
{
|
|
memset(internalEeprom, 0, BW_IEEPROM_SIZE);
|
|
}
|
|
}
|
|
}
|
|
else if (value & 0x20)
|
|
{
|
|
/* Write */
|
|
printf("IEEP: Write");
|
|
iee_SelAddress = address;
|
|
}
|
|
else if (value & 0x10)
|
|
{
|
|
/* Read */
|
|
printf("IEEP: Read");
|
|
iee_SelAddress = address;
|
|
}
|
|
}
|
|
break;
|
|
|
|
|
|
/* MBC */
|
|
case 0xC0:
|
|
case 0xC1:
|
|
case 0xC2:
|
|
case 0xC3:
|
|
break;
|
|
|
|
case 0xc4:
|
|
w1=(((((WORD)ws_ioRam[0xc7])<<8)|((WORD)ws_ioRam[0xc6]))<<1)&externalEepromAddressMask;
|
|
externalEeprom[w1]=value;
|
|
return;
|
|
|
|
case 0xc5:
|
|
w1=(((((WORD)ws_ioRam[0xc7])<<8)|((WORD)ws_ioRam[0xc6]))<<1)&externalEepromAddressMask;
|
|
externalEeprom[w1+1]=value;
|
|
return;
|
|
|
|
case 0xC6:
|
|
case 0xC7:
|
|
case 0xC8:
|
|
break;
|
|
|
|
case 0xca:
|
|
if(value==0x15)
|
|
{
|
|
rtcDataRegisterReadCount=0;
|
|
}
|
|
|
|
break;
|
|
break;
|
|
|
|
case 0xCB:
|
|
break;
|
|
|
|
case 0xF0:
|
|
break;
|
|
|
|
case 0xF1:
|
|
printf("%d\n", (signed short)((value << 8) | ws_ioRam[0xF0]));
|
|
break;
|
|
|
|
case 0xF2:
|
|
printf("%c", value);
|
|
fflush(stdout);
|
|
break;
|
|
|
|
case 0xB7:
|
|
break; /* Somwthing to write there, but what? */
|
|
|
|
default:
|
|
unknown_io_port=1;
|
|
}
|
|
|
|
if ((ws_gpu_port_write(port,value) == 1) && (unknown_io_port == 1))
|
|
{
|
|
fprintf(log_get(),"WriteIO(%02X, %02X);\n",port, value);
|
|
}
|
|
|
|
/*if (port >= 0xC0)
|
|
{
|
|
fprintf(log_get(),"WriteMBCIO(%02X, %02X);\n",port, value);
|
|
}*/
|
|
|
|
// if ((ws_gpu_unknownPort)&&(unknown_io_port))
|
|
// {
|
|
// fprintf(log_get(),"io: writing 0x%.2x to unknown port 0x%.2x\n",value,port);
|
|
// }
|
|
}
|