Merge branch 'master' of git@github.com:optixx/snesram
Conflicts: scripts/query_romsize.py
This commit is contained in:
commit
36d6899692
Binary file not shown.
@ -16,9 +16,10 @@
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#define READ_BUFFER_SIZE 1024
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#define READ_BUFFER_SIZE 1024
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#define SEND_BUFFER_SIZE 128
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#define SEND_BUFFER_SIZE 0x200
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#define BUFFER_CRC (1024 * 32)
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#define BUFFER_CRC (1024 * 32)
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#define BANK_SIZE (1<<15)
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#define BANK_SIZE (1<<15)
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#define BANK_SIZE_SHIFT 15
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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@ -31,6 +32,7 @@
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#include "../usbconfig.h" /* device's VID/PID and names */
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#include "../usbconfig.h" /* device's VID/PID and names */
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void dump_packet(uint32_t addr, uint32_t len, uint8_t * packet)
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void dump_packet(uint32_t addr, uint32_t len, uint8_t * packet)
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{
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{
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uint16_t i,
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uint16_t i,
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@ -171,18 +173,22 @@ int main(int argc, char **argv)
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usb_control_msg(handle,
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usb_control_msg(handle,
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USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_OUT,
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USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_OUT,
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USB_UPLOAD_INIT, 0, 0, NULL, 0, 5000);
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USB_UPLOAD_INIT, BANK_SIZE_SHIFT , 0, NULL, 0, 5000);
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while ((cnt = fread(read_buffer, READ_BUFFER_SIZE, 1, fp)) > 0) {
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while ((cnt = fread(read_buffer, READ_BUFFER_SIZE, 1, fp)) > 0) {
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for (step = 0; step < READ_BUFFER_SIZE; step += SEND_BUFFER_SIZE) {
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for (step = 0; step <= READ_BUFFER_SIZE; step += SEND_BUFFER_SIZE) {
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addr_lo = addr & 0xffff;
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addr_lo = addr & 0xffff;
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addr_hi = (addr >> 16) & 0xff;
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addr_hi = (addr >> 16) & 0xff;
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//memset(read_buffer, 0xff, READ_BUFFER_SIZE);
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cnt = usb_control_msg(handle,
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cnt = usb_control_msg(handle,
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USB_TYPE_VENDOR | USB_RECIP_DEVICE |
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USB_TYPE_VENDOR | USB_RECIP_DEVICE |
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USB_ENDPOINT_OUT, USB_UPLOAD_ADDR, addr_hi,
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USB_ENDPOINT_OUT, USB_UPLOAD_ADDR, addr_hi,
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addr_lo, (char *) read_buffer + step,
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addr_lo, (char *) read_buffer + step,
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SEND_BUFFER_SIZE, 5000);
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SEND_BUFFER_SIZE, 5000);
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if (addr%0x1000==0){
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printf ("bank=0x%02x addr=0x%08x\n", bank, addr);
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}
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if (cnt < 0) {
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if (cnt < 0) {
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fprintf(stderr, "USB error: %s\n", usb_strerror());
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fprintf(stderr, "USB error: %s\n", usb_strerror());
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@ -193,23 +199,28 @@ int main(int argc, char **argv)
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#endif
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#endif
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addr += SEND_BUFFER_SIZE;
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addr += SEND_BUFFER_SIZE;
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}
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}
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memcpy(crc_buffer + cnt_crc, read_buffer, READ_BUFFER_SIZE);
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memcpy(crc_buffer + cnt_crc, read_buffer, READ_BUFFER_SIZE);
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cnt_crc += READ_BUFFER_SIZE;
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cnt_crc += READ_BUFFER_SIZE;
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if (cnt_crc >= BANK_SIZE) {
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if (cnt_crc >= BANK_SIZE) {
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crc = do_crc(crc_buffer, BANK_SIZE);
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crc = do_crc(crc_buffer, BANK_SIZE);
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printf
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printf ("bank=0x%02x crc=0x%04x\n", bank, crc);
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("Addr: 0x%06x Bank: 0x%02x HiAddr: 0x%02x LoAddr: 0x%04x Crc: 0x%04x\n",
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addr, bank, addr_hi, addr_lo, crc);
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memset(crc_buffer, 0, BUFFER_CRC);
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memset(crc_buffer, 0, BUFFER_CRC);
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bank++;
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bank++;
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cnt_crc = 0;
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cnt_crc = 0;
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}
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}
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}
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}
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/*
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cnt = usb_control_msg(handle,
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cnt = usb_control_msg(handle,
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USB_TYPE_VENDOR | USB_RECIP_DEVICE |
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USB_TYPE_VENDOR | USB_RECIP_DEVICE |
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USB_ENDPOINT_OUT, USB_CRC, addr_hi, addr_lo, NULL,
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USB_ENDPOINT_OUT, USB_CRC, addr_hi, addr_lo, NULL,
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0, 5000);
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0, 5000);
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*/
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cnt = usb_control_msg(handle,
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USB_TYPE_VENDOR | USB_RECIP_DEVICE |
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USB_ENDPOINT_OUT, USB_SNES_BOOT, 0, 0, NULL,
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0, 5000);
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if (cnt < 1) {
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if (cnt < 1) {
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@ -4,8 +4,9 @@
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#define DEBUG_USB 1
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#define DEBUG_USB 1
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#define DEBUG_USB_RAW 1
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#define DEBUG_USB_RAW 1
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#define DEBUG_SRAM 1
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#define DEBUG_SRAM 0
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#define DEBUG_SREG 1
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#define DEBUG_SRAM_RAW 0
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#define DEBUG_SREG 0
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#define DEBUG 1
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#define DEBUG 1
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@ -14,11 +15,12 @@
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#define REQ_STATUS_BULK_UPLOAD 0x03
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#define REQ_STATUS_BULK_UPLOAD 0x03
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#define REQ_STATUS_BULK_NEXT 0x04
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#define REQ_STATUS_BULK_NEXT 0x04
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#define REQ_STATUS_CRC 0x05
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#define REQ_STATUS_CRC 0x05
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#define REQ_STATUS_BOOT 0x06
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#define USB_MAX_TRANS 0xff
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#define USB_MAX_TRANS 0xff
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#define USB_CRC_CHECK 0x01
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#define USB_CRC_CHECK 0x01
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#define TRANSFER_BUFFER_SIZE 0xff
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#define TRANSFER_BUFFER_SIZE 0x200
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#endif
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#endif
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@ -41,34 +41,57 @@ uint16_t do_crc_update(uint16_t crc, uint8_t * data, uint16_t size)
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}
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}
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void crc_check_memory(uint32_t top_addr,uint8_t *buffer)
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void crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr)
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{
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uint16_t crc = 0;
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uint32_t addr = 0;
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uint8_t req_bank = 0;
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sram_bulk_read_start(bottom_addr);
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for (addr = bottom_addr; addr < top_addr; addr++) {
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if (addr && addr % 0x8000 == 0) {
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printf("crc_check_bulk: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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req_bank,addr,crc);
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req_bank++;
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crc = 0;
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}
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crc = crc_xmodem_update(crc, sram_bulk_read());
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sram_bulk_read_next();
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}
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sram_bulk_read_end();
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if (addr % 0x8000 == 0)
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printf("crc_check_bulk: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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req_bank,addr,crc);
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}
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void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint8_t *buffer)
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{
|
{
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uint16_t crc = 0;
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uint16_t crc = 0;
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uint32_t addr;
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uint32_t addr;
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uint8_t req_bank = 0;
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uint8_t req_bank = 0;
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for (addr = 0x000000; addr < top_addr; addr += TRANSFER_BUFFER_SIZE) {
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for (addr = bottom_addr; addr < top_addr; addr += TRANSFER_BUFFER_SIZE) {
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sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
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if (addr && addr % 0x8000 == 0) {
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crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
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printf("crc_check_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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if (addr && addr % 32768 == 0) {
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req_bank,addr,crc);
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printf("crc_check_memory: req_bank: 0x%02x Addr: 0x%08lx CRC: 0x%04x\n",
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req_bank, addr, crc);
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req_bank++;
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req_bank++;
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crc = 0;
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crc = 0;
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}
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}
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sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
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crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
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}
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}
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}
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}
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uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer)
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uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer)
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{
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{
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uint16_t crc = 0;
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uint16_t crc = 0;
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uint32_t addr;
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uint32_t addr;
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uint8_t req_bank = 0;
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for (addr = start_addr; addr < start_addr + size; addr += TRANSFER_BUFFER_SIZE) {
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for (addr = start_addr; addr < start_addr + size; addr += TRANSFER_BUFFER_SIZE) {
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sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
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sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
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crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
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crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
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}
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}
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#if DEBUG_USB
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return crc;
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printf("crc_check_memory_range: Addr: 0x%08lx CRC: 0x%04x\n", addr, crc);
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#endif
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return crc;
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}
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}
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@ -2,8 +2,9 @@
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#include <stdint.h>
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#include <stdint.h>
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|
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|
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uint16_t crc_xmodem_update (uint16_t crc, uint8_t data);
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uint16_t crc_xmodem_update(uint16_t crc, uint8_t data);
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uint16_t do_crc(uint8_t * data,uint16_t size);
|
uint16_t do_crc(uint8_t * data,uint16_t size);
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uint16_t do_crc_update(uint16_t crc,uint8_t * data,uint16_t size);
|
uint16_t do_crc_update(uint16_t crc,uint8_t * data,uint16_t size);
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void crc_check_memory(uint32_t top_addr,uint8_t *buffer);
|
void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint8_t *buffer);
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uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer);
|
uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer);
|
||||||
|
void crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr);
|
||||||
|
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@ -41,3 +41,4 @@ void dump_packet(uint32_t addr, uint32_t len, uint8_t * packet)
|
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printf("|\n");
|
printf("|\n");
|
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}
|
}
|
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}
|
}
|
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|
|
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|
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@ -1,5 +1,4 @@
|
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#include <avr/io.h>
|
#include <avr/io.h>
|
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#include <avr/wdt.h>
|
|
||||||
#include <avr/interrupt.h> /* for sei() */
|
#include <avr/interrupt.h> /* for sei() */
|
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#include <util/delay.h> /* for _delay_ms() */
|
#include <util/delay.h> /* for _delay_ms() */
|
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#include <stdlib.h>
|
#include <stdlib.h>
|
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@ -22,7 +21,7 @@ uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
|
|||||||
uint32_t req_addr = 0;
|
uint32_t req_addr = 0;
|
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uint32_t req_size;
|
uint32_t req_size;
|
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uint8_t req_bank;
|
uint8_t req_bank;
|
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uint32_t req_bank_size;
|
uint16_t req_bank_size;
|
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uint8_t req_state = REQ_STATUS_IDLE;
|
uint8_t req_state = REQ_STATUS_IDLE;
|
||||||
uint8_t rx_remaining = 0;
|
uint8_t rx_remaining = 0;
|
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uint8_t tx_remaining = 0;
|
uint8_t tx_remaining = 0;
|
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@ -53,19 +52,14 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
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rx_remaining = 0;
|
rx_remaining = 0;
|
||||||
req_bank_size = 1 << rq->wValue.word;
|
req_bank_size = 1 << rq->wValue.word;
|
||||||
sync_errors = 0;
|
sync_errors = 0;
|
||||||
|
crc = 0;
|
||||||
#if DEBUG_USB
|
#if DEBUG_USB
|
||||||
printf("USB_UPLOAD_INIT: bank_size=%li\n", req_bank_size);
|
printf("USB_UPLOAD_INIT: bank_size=0x%x\n", req_bank_size);
|
||||||
#endif
|
#endif
|
||||||
/*
|
/*
|
||||||
* -------------------------------------------------------------------------
|
* -------------------------------------------------------------------------
|
||||||
*/
|
*/
|
||||||
} else if (rq->bRequest == USB_UPLOAD_ADDR) {
|
} else if (rq->bRequest == USB_UPLOAD_ADDR) {
|
||||||
if (req_state != REQ_STATUS_IDLE){
|
|
||||||
#if DEBUG_USB
|
|
||||||
printf("USB_UPLOAD_ADDR: ERROR state is not REQ_STATUS_IDLE\n");
|
|
||||||
#endif
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
req_state = REQ_STATUS_UPLOAD;
|
req_state = REQ_STATUS_UPLOAD;
|
||||||
req_addr = rq->wValue.word;
|
req_addr = rq->wValue.word;
|
||||||
@ -82,11 +76,20 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
|||||||
}
|
}
|
||||||
rx_remaining = rq->wLength.word;
|
rx_remaining = rq->wLength.word;
|
||||||
ret_len = USB_MAX_TRANS;
|
ret_len = USB_MAX_TRANS;
|
||||||
|
#if DEBUG_USB
|
||||||
|
if (req_addr && (req_addr % 0x1000) == 0) {
|
||||||
|
|
||||||
|
printf("USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx\n",
|
||||||
|
req_bank, req_addr);
|
||||||
|
crc_check_bulk_memory(req_addr - 0x1000,req_addr);
|
||||||
|
|
||||||
|
}
|
||||||
|
#endif
|
||||||
if (req_addr && req_addr % req_bank_size == 0) {
|
if (req_addr && req_addr % req_bank_size == 0) {
|
||||||
#if DEBUG_USB
|
#if DEBUG_USB
|
||||||
printf("USB_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx \n",
|
printf("USB_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx\n",
|
||||||
#endif
|
|
||||||
req_bank, req_addr);
|
req_bank, req_addr);
|
||||||
|
#endif
|
||||||
req_bank++;
|
req_bank++;
|
||||||
}
|
}
|
||||||
ret_len = USB_MAX_TRANS;
|
ret_len = USB_MAX_TRANS;
|
||||||
@ -115,10 +118,10 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
|||||||
|
|
||||||
req_bank = 0;
|
req_bank = 0;
|
||||||
rx_remaining = 0;
|
rx_remaining = 0;
|
||||||
req_bank_size = 1 << rq->wValue.word;
|
req_bank_size = (1 << rq->wValue.word) & 0xffff;
|
||||||
sync_errors = 0;
|
sync_errors = 0;
|
||||||
#if DEBUG_USB
|
#if DEBUG_USB
|
||||||
printf("USB_BULK_UPLOAD_INIT: bank_size=%li\n", req_bank_size);
|
printf("USB_BULK_UPLOAD_INIT: bank_size=0x%x\n", req_bank_size);
|
||||||
#endif
|
#endif
|
||||||
/*
|
/*
|
||||||
* -------------------------------------------------------------------------
|
* -------------------------------------------------------------------------
|
||||||
@ -196,15 +199,20 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
|||||||
req_addr = req_addr << 16;
|
req_addr = req_addr << 16;
|
||||||
req_addr = req_addr | rq->wIndex.word;
|
req_addr = req_addr | rq->wIndex.word;
|
||||||
#if DEBUG_USB
|
#if DEBUG_USB
|
||||||
printf("USB_CRC: addr=0x%lx \n", req_addr);
|
printf("USB_CRC: addr=0x%08lx \n", req_addr);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if USB_CRC_CHECK
|
crc_check_bulk_memory(0x000000,req_addr);
|
||||||
cli();
|
ret_len = 0;
|
||||||
crc_check_memory(req_addr,read_buffer);
|
/*
|
||||||
sei();
|
* -------------------------------------------------------------------------
|
||||||
|
*/
|
||||||
|
} else if (rq->bRequest == USB_SNES_BOOT) {
|
||||||
|
req_state = REQ_STATUS_BOOT;
|
||||||
|
#if DEBUG_USB
|
||||||
|
printf("USB_SNES_BOOT: ");
|
||||||
|
ret_len = 0;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* -------------------------------------------------------------------------
|
* -------------------------------------------------------------------------
|
||||||
*/
|
*/
|
||||||
@ -244,10 +252,77 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
|||||||
* -------------------------------------------------------------------------
|
* -------------------------------------------------------------------------
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
void test_read_write(){
|
||||||
|
|
||||||
|
uint8_t i;
|
||||||
|
uint32_t addr;
|
||||||
|
avr_bus_active();
|
||||||
|
addr = 0x000000;
|
||||||
|
i = 1;
|
||||||
|
while (addr++ <= 0x0000ff){
|
||||||
|
sram_write(addr,i++);
|
||||||
|
}
|
||||||
|
addr = 0x000000;
|
||||||
|
while (addr++ <= 0x0000ff){
|
||||||
|
printf("read addr=0x%08lx %x\n",addr,sram_read(addr));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void test_bulk_read_write(){
|
||||||
|
|
||||||
|
uint8_t i;
|
||||||
|
uint32_t addr;
|
||||||
|
avr_bus_active();
|
||||||
|
addr = 0x000000;
|
||||||
|
i = 0;
|
||||||
|
sram_bulk_write_start(addr);
|
||||||
|
while (addr++ <= 0x3fffff){
|
||||||
|
sram_bulk_write(i++);
|
||||||
|
sram_bulk_write_next();
|
||||||
|
}
|
||||||
|
sram_bulk_write_end();
|
||||||
|
|
||||||
|
addr = 0x000000;
|
||||||
|
sram_bulk_read_start(addr);
|
||||||
|
while (addr <= 0x3fffff){
|
||||||
|
printf("addr=0x%08lx %x\n",addr,sram_bulk_read());
|
||||||
|
sram_bulk_read_next();
|
||||||
|
addr ++;
|
||||||
|
}
|
||||||
|
sram_bulk_read_end();
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void test_non_zero_memory(uint32_t bottom_addr,uint32_t top_addr)
|
||||||
|
{
|
||||||
|
uint32_t addr = 0;
|
||||||
|
uint8_t c;
|
||||||
|
sram_bulk_read_start(bottom_addr);
|
||||||
|
for (addr = bottom_addr; addr < top_addr; addr++) {
|
||||||
|
c = sram_bulk_read();
|
||||||
|
if (c!=0xff)
|
||||||
|
printf("addr=0x%08lx c=0x%x\n",addr,c);
|
||||||
|
sram_bulk_read_next();
|
||||||
|
}
|
||||||
|
sram_bulk_read_end();
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
void test_crc(){
|
||||||
|
printf("test_crc: clear\n");
|
||||||
|
avr_bus_active();
|
||||||
|
sram_bulk_set(0x000000,0x10000,0xff);
|
||||||
|
printf("test_crc: crc\n");
|
||||||
|
crc_check_bulk_memory(0x000000,0x10000);
|
||||||
|
printf("test_crc: check\n");
|
||||||
|
test_non_zero_memory(0x000000,0x10000);
|
||||||
|
}
|
||||||
|
|
||||||
int main(void)
|
int main(void)
|
||||||
{
|
{
|
||||||
uint8_t i;
|
uint8_t i;
|
||||||
uint32_t addr;
|
|
||||||
|
|
||||||
uart_init();
|
uart_init();
|
||||||
stdout = &uart_stdout;
|
stdout = &uart_stdout;
|
||||||
@ -256,18 +331,6 @@ int main(void)
|
|||||||
printf("Sytem Init\n");
|
printf("Sytem Init\n");
|
||||||
|
|
||||||
avr_bus_active();
|
avr_bus_active();
|
||||||
|
|
||||||
addr = 0x000000;
|
|
||||||
i = 0;
|
|
||||||
while (addr++ <= 0x00ffff){
|
|
||||||
sram_write(addr,i++);
|
|
||||||
}
|
|
||||||
|
|
||||||
addr = 0x000000;
|
|
||||||
while (addr++ <= 0x00ffff){
|
|
||||||
printf("read addr=0x%08lx %x\n",addr,sram_read(addr));
|
|
||||||
}
|
|
||||||
|
|
||||||
usbInit();
|
usbInit();
|
||||||
printf("USB Init\n");
|
printf("USB Init\n");
|
||||||
usbDeviceDisconnect(); /* enforce re-enumeration, do this while
|
usbDeviceDisconnect(); /* enforce re-enumeration, do this while
|
||||||
@ -276,7 +339,6 @@ int main(void)
|
|||||||
printf("USB disconnect\n");
|
printf("USB disconnect\n");
|
||||||
i = 10;
|
i = 10;
|
||||||
while (--i) { /* fake USB disconnect for > 250 ms */
|
while (--i) { /* fake USB disconnect for > 250 ms */
|
||||||
wdt_reset();
|
|
||||||
led_on();
|
led_on();
|
||||||
_delay_ms(35);
|
_delay_ms(35);
|
||||||
led_off();
|
led_off();
|
||||||
@ -288,9 +350,23 @@ int main(void)
|
|||||||
printf("USB connect\n");
|
printf("USB connect\n");
|
||||||
sei();
|
sei();
|
||||||
printf("USB poll\n");
|
printf("USB poll\n");
|
||||||
for (;;) { /* main event loop */
|
while (req_state != REQ_STATUS_BOOT){
|
||||||
usbPoll();
|
usbPoll();
|
||||||
}
|
}
|
||||||
|
printf("USB poll done\n");
|
||||||
|
usbDeviceDisconnect();
|
||||||
|
printf("USB disconnect\n");
|
||||||
|
crc_check_bulk_memory(0x000000,0x80000);
|
||||||
|
|
||||||
|
printf("Disable snes WR\n");
|
||||||
|
snes_wr_disable();
|
||||||
|
printf("Use Snes lowrom\n");
|
||||||
|
snes_lorom();
|
||||||
|
printf("Activate Snes bus\n");
|
||||||
|
snes_bus_active();
|
||||||
|
|
||||||
|
|
||||||
|
while(1);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -29,5 +29,6 @@
|
|||||||
#define USB_BULK_UPLOAD_ADDR 7
|
#define USB_BULK_UPLOAD_ADDR 7
|
||||||
#define USB_BULK_UPLOAD_NEXT 8
|
#define USB_BULK_UPLOAD_NEXT 8
|
||||||
#define USB_BULK_UPLOAD_END 9
|
#define USB_BULK_UPLOAD_END 9
|
||||||
|
#define USB_SNES_BOOT 10
|
||||||
|
|
||||||
#endif /* __REQUESTS_H_INCLUDED__ */
|
#endif /* __REQUESTS_H_INCLUDED__ */
|
||||||
|
|||||||
@ -1,7 +1,6 @@
|
|||||||
#include <stdlib.h>
|
#include <stdlib.h>
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <avr/io.h>
|
#include <avr/io.h>
|
||||||
#include <avr/wdt.h>
|
|
||||||
#include <util/delay.h> /* for _delay_ms() */
|
#include <util/delay.h> /* for _delay_ms() */
|
||||||
|
|
||||||
|
|
||||||
@ -67,18 +66,18 @@ void system_init(void)
|
|||||||
void sreg_set(uint32_t addr)
|
void sreg_set(uint32_t addr)
|
||||||
{
|
{
|
||||||
uint8_t i = 24;
|
uint8_t i = 24;
|
||||||
#ifdef DEBUG_SREG
|
#if DEBUG_SREG
|
||||||
printf("sreg_set: addr=0x%08lx",addr);
|
printf("sreg_set: addr=0x%08lx",addr);
|
||||||
#endif
|
#endif
|
||||||
while(i--) {
|
while(i--) {
|
||||||
if ((addr & ( 1L << i))){
|
if ((addr & ( 1L << i))){
|
||||||
#ifdef DEBUG_SREG
|
#if DEBUG_SREG
|
||||||
printf("1");
|
printf("1");
|
||||||
#endif
|
#endif
|
||||||
AVR_ADDR_SER_PORT |= ( 1 << AVR_ADDR_SER_PIN);
|
AVR_ADDR_SER_PORT |= ( 1 << AVR_ADDR_SER_PIN);
|
||||||
} else {
|
} else {
|
||||||
AVR_ADDR_SER_PORT &= ~( 1 << AVR_ADDR_SER_PIN);
|
AVR_ADDR_SER_PORT &= ~( 1 << AVR_ADDR_SER_PIN);
|
||||||
#ifdef DEBUG_SREG
|
#if DEBUG_SREG
|
||||||
printf("0");
|
printf("0");
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -86,7 +85,7 @@ void sreg_set(uint32_t addr)
|
|||||||
AVR_ADDR_SCK_PORT |= (1 << AVR_ADDR_SCK_PIN);
|
AVR_ADDR_SCK_PORT |= (1 << AVR_ADDR_SCK_PIN);
|
||||||
AVR_ADDR_SCK_PORT &= ~(1 << AVR_ADDR_SCK_PIN);
|
AVR_ADDR_SCK_PORT &= ~(1 << AVR_ADDR_SCK_PIN);
|
||||||
}
|
}
|
||||||
#ifdef DEBUG_SREG
|
#if DEBUG_SREG
|
||||||
printf("\n");
|
printf("\n");
|
||||||
#endif
|
#endif
|
||||||
AVR_ADDR_LATCH_PORT |= (1 << AVR_ADDR_LATCH_PIN);
|
AVR_ADDR_LATCH_PORT |= (1 << AVR_ADDR_LATCH_PIN);
|
||||||
@ -97,15 +96,15 @@ void sreg_set(uint32_t addr)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void sram_bulk_read_start(uint32_t addr)
|
void sram_bulk_read_start(uint32_t addr)
|
||||||
{
|
{
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_bulk_read_start: addr=0x%08lx\n\r", addr);
|
printf("sram_bulk_read_start: addr=0x%08lx\n\r", addr);
|
||||||
#endif
|
#endif
|
||||||
avr_data_in();
|
avr_data_in();
|
||||||
|
|
||||||
AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
|
AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
|
||||||
|
|
||||||
AVR_WR_PORT |= (1 << AVR_WR_PIN);
|
AVR_WR_PORT |= (1 << AVR_WR_PIN);
|
||||||
AVR_RD_PORT |= (1 << AVR_RD_PIN);
|
AVR_RD_PORT |= (1 << AVR_RD_PIN);
|
||||||
|
|
||||||
@ -118,10 +117,7 @@ void sram_bulk_read_start(uint32_t addr)
|
|||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
}
|
||||||
asm volatile ("nop");
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
inline void sram_bulk_read_next(void)
|
inline void sram_bulk_read_next(void)
|
||||||
{
|
{
|
||||||
@ -135,26 +131,20 @@ inline void sram_bulk_read_next(void)
|
|||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
|
||||||
asm volatile ("nop");
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
inline uint8_t sram_bulk_read(void)
|
inline uint8_t sram_bulk_read(void)
|
||||||
{
|
{
|
||||||
uint8_t byte;
|
return AVR_DATA_PIN;
|
||||||
|
|
||||||
byte = AVR_DATA_PIN;
|
|
||||||
AVR_RD_PORT |= (1 << AVR_RD_PIN);
|
|
||||||
return byte;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void sram_bulk_read_end(void)
|
void sram_bulk_read_end(void)
|
||||||
{
|
{
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_bulk_read_end:");
|
printf("sram_bulk_read_end:");
|
||||||
#endif
|
#endif
|
||||||
|
AVR_RD_PORT |= (1 << AVR_RD_PIN);
|
||||||
AVR_CS_PORT |= (1 << AVR_CS_PIN);
|
AVR_CS_PORT |= (1 << AVR_CS_PIN);
|
||||||
avr_data_in();
|
avr_data_in();
|
||||||
}
|
}
|
||||||
@ -162,7 +152,7 @@ void sram_bulk_read_end(void)
|
|||||||
uint8_t sram_read(uint32_t addr)
|
uint8_t sram_read(uint32_t addr)
|
||||||
{
|
{
|
||||||
uint8_t byte;
|
uint8_t byte;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM_RAW
|
||||||
printf("sram_read: addr=0x%08lx\n\r", addr);
|
printf("sram_read: addr=0x%08lx\n\r", addr);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -183,8 +173,6 @@ uint8_t sram_read(uint32_t addr)
|
|||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
asm volatile ("nop");
|
||||||
asm volatile ("nop");
|
|
||||||
asm volatile ("nop");
|
|
||||||
|
|
||||||
byte = AVR_DATA_PIN;
|
byte = AVR_DATA_PIN;
|
||||||
|
|
||||||
@ -198,7 +186,7 @@ uint8_t sram_read(uint32_t addr)
|
|||||||
|
|
||||||
void sram_bulk_write_start(uint32_t addr)
|
void sram_bulk_write_start(uint32_t addr)
|
||||||
{
|
{
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_bulk_write_start: addr=0x%08lx\n\r", addr);
|
printf("sram_bulk_write_start: addr=0x%08lx\n\r", addr);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -216,26 +204,22 @@ void sram_bulk_write_start(uint32_t addr)
|
|||||||
inline void sram_bulk_write_next(void)
|
inline void sram_bulk_write_next(void)
|
||||||
{
|
{
|
||||||
AVR_RD_PORT |= (1 << AVR_RD_PIN);
|
AVR_RD_PORT |= (1 << AVR_RD_PIN);
|
||||||
|
|
||||||
counter_up();
|
counter_up();
|
||||||
|
|
||||||
AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
|
AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
|
||||||
}
|
}
|
||||||
|
|
||||||
inline void sram_bulk_write( uint8_t data)
|
inline void sram_bulk_write( uint8_t data)
|
||||||
{
|
{
|
||||||
AVR_DATA_PORT = data;
|
AVR_DATA_PORT = data;
|
||||||
|
|
||||||
AVR_WR_PORT |= (1 << AVR_WR_PIN);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void sram_bulk_write_end(void)
|
void sram_bulk_write_end(void)
|
||||||
{
|
{
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_bulk_write_end:");
|
printf("sram_bulk_write_end:");
|
||||||
#endif
|
#endif
|
||||||
|
AVR_WR_PORT |= (1 << AVR_WR_PIN);
|
||||||
AVR_CS_PORT |= (1 << AVR_CS_PIN);
|
AVR_CS_PORT |= (1 << AVR_CS_PIN);
|
||||||
|
|
||||||
avr_data_in();
|
avr_data_in();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -243,7 +227,7 @@ void sram_bulk_write_end(void)
|
|||||||
void sram_write(uint32_t addr, uint8_t data)
|
void sram_write(uint32_t addr, uint8_t data)
|
||||||
{
|
{
|
||||||
|
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM_RAW
|
||||||
printf("sram_write: addr=0x%08lx data=%x\n\r", addr, data);
|
printf("sram_write: addr=0x%08lx data=%x\n\r", addr, data);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -270,7 +254,7 @@ void sram_bulk_copy(uint32_t addr, uint8_t * src, uint32_t len)
|
|||||||
|
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
uint8_t *ptr = src;
|
uint8_t *ptr = src;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_copy: addr=0x%08lx src=0x%p len=%li\n\r", addr,src,len);
|
printf("sram_copy: addr=0x%08lx src=0x%p len=%li\n\r", addr,src,len);
|
||||||
#endif
|
#endif
|
||||||
sram_bulk_write_start(addr);
|
sram_bulk_write_start(addr);
|
||||||
@ -286,7 +270,7 @@ void sram_bulk_read_buffer(uint32_t addr, uint8_t * dst, uint32_t len)
|
|||||||
|
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
uint8_t *ptr = dst;
|
uint8_t *ptr = dst;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_bulk_read_buffer: addr=0x%08lx dst=0x%p len=%li\n\r", addr,dst,len);
|
printf("sram_bulk_read_buffer: addr=0x%08lx dst=0x%p len=%li\n\r", addr,dst,len);
|
||||||
#endif
|
#endif
|
||||||
sram_bulk_read_start(addr);
|
sram_bulk_read_start(addr);
|
||||||
@ -298,18 +282,18 @@ void sram_bulk_read_buffer(uint32_t addr, uint8_t * dst, uint32_t len)
|
|||||||
sram_bulk_read_end();
|
sram_bulk_read_end();
|
||||||
}
|
}
|
||||||
|
|
||||||
void sram_bulk_clear(uint32_t addr, uint32_t len){
|
void sram_bulk_set(uint32_t addr, uint32_t len,uint8_t value){
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_bulk_clear: addr=0x%08lx len=%li\n\r", addr,len);
|
printf("sram_bulk_clear: addr=0x%08lx len=%li\n\r", addr,len);
|
||||||
#endif
|
#endif
|
||||||
sram_bulk_write_start(addr);
|
sram_bulk_write_start(addr);
|
||||||
for (i = addr; i < (addr + len); i++) {
|
for (i = addr; i < (addr + len); i++) {
|
||||||
if (0 == i % 0xfff)
|
if (0 == i % 0xfff)
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_bulk_clear: addr=0x%08lx\n\r", i);
|
printf("sram_bulk_clear: addr=0x%08lx\n\r", i);
|
||||||
#endif
|
#endif
|
||||||
sram_bulk_write(0xff);
|
sram_bulk_write(value);
|
||||||
sram_bulk_write_next();
|
sram_bulk_write_next();
|
||||||
}
|
}
|
||||||
sram_bulk_write_end();
|
sram_bulk_write_end();
|
||||||
@ -318,12 +302,12 @@ void sram_bulk_clear(uint32_t addr, uint32_t len){
|
|||||||
void sram_clear(uint32_t addr, uint32_t len)
|
void sram_clear(uint32_t addr, uint32_t len)
|
||||||
{
|
{
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_clear: addr=0x%08lx len=%li\n\r", addr,len);
|
printf("sram_clear: addr=0x%08lx len=%li\n\r", addr,len);
|
||||||
#endif
|
#endif
|
||||||
for (i = addr; i < (addr + len); i++) {
|
for (i = addr; i < (addr + len); i++) {
|
||||||
if (0 == i % 0xfff)
|
if (0 == i % 0xfff)
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_clear: addr=0x%08lx\n\r", i);
|
printf("sram_clear: addr=0x%08lx\n\r", i);
|
||||||
#endif
|
#endif
|
||||||
sram_write(i, 0x00);
|
sram_write(i, 0x00);
|
||||||
@ -335,7 +319,7 @@ void sram_copy(uint32_t addr, uint8_t * src, uint32_t len)
|
|||||||
|
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
uint8_t *ptr = src;
|
uint8_t *ptr = src;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_copy: addr=0x%08lx src=0x%p len=%li\n\r", addr,src,len);
|
printf("sram_copy: addr=0x%08lx src=0x%p len=%li\n\r", addr,src,len);
|
||||||
#endif
|
#endif
|
||||||
for (i = addr; i < (addr + len); i++)
|
for (i = addr; i < (addr + len); i++)
|
||||||
@ -347,7 +331,7 @@ void sram_read_buffer(uint32_t addr, uint8_t * dst, uint32_t len)
|
|||||||
|
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
uint8_t *ptr = dst;
|
uint8_t *ptr = dst;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_read_buffer: addr=0x%08lx dst=0x%p len=%li\n\r", addr,dst,len);
|
printf("sram_read_buffer: addr=0x%08lx dst=0x%p len=%li\n\r", addr,dst,len);
|
||||||
#endif
|
#endif
|
||||||
for (i = addr; i < (addr + len); i++) {
|
for (i = addr; i < (addr + len); i++) {
|
||||||
@ -356,10 +340,11 @@ void sram_read_buffer(uint32_t addr, uint8_t * dst, uint32_t len)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
uint8_t sram_check(uint8_t * buffer, uint32_t len)
|
uint8_t sram_check(uint8_t * buffer, uint32_t len)
|
||||||
{
|
{
|
||||||
uint16_t cnt;
|
uint16_t cnt;
|
||||||
#ifdef DEBUG_SRAM
|
#if DEBUG_SRAM
|
||||||
printf("sram_check: len=%li\n\r",len);
|
printf("sram_check: len=%li\n\r",len);
|
||||||
#endif
|
#endif
|
||||||
for (cnt = 0; cnt < len; cnt++)
|
for (cnt = 0; cnt < len; cnt++)
|
||||||
@ -367,3 +352,5 @@ uint8_t sram_check(uint8_t * buffer, uint32_t len)
|
|||||||
return 1;
|
return 1;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -155,10 +155,10 @@ inline void sram_bulk_read_end(void);
|
|||||||
uint8_t sram_bulk_read(void);
|
uint8_t sram_bulk_read(void);
|
||||||
|
|
||||||
void sram_bulk_write_start(uint32_t addr);
|
void sram_bulk_write_start(uint32_t addr);
|
||||||
inline void sram_bulk_read_next(void);
|
inline void sram_bulk_write_next(void);
|
||||||
inline void sram_bulk_write_end(void);
|
inline void sram_bulk_write_end(void);
|
||||||
void sram_bulk_write(uint8_t data);
|
void sram_bulk_write(uint8_t data);
|
||||||
|
|
||||||
void sram_bulk_copy(uint32_t addr, uint8_t * src, uint32_t len);
|
void sram_bulk_copy(uint32_t addr, uint8_t * src, uint32_t len);
|
||||||
void sram_bulk_read_buffer(uint32_t addr, uint8_t * dst, uint32_t len);
|
void sram_bulk_read_buffer(uint32_t addr, uint8_t * dst, uint32_t len);
|
||||||
void sram_bulk_clear(uint32_t addr, uint32_t len);
|
void sram_bulk_set(uint32_t addr, uint32_t len,uint8_t value);
|
||||||
|
|||||||
@ -16,3 +16,4 @@ static int uart_stream(char c, FILE *stream);
|
|||||||
|
|
||||||
|
|
||||||
#endif /* _UART_H_ */
|
#endif /* _UART_H_ */
|
||||||
|
|
||||||
|
|||||||
@ -26,6 +26,7 @@ extern uint8_t req_state;
|
|||||||
extern uint8_t rx_remaining;
|
extern uint8_t rx_remaining;
|
||||||
extern uint8_t tx_remaining;
|
extern uint8_t tx_remaining;
|
||||||
extern uint8_t tx_buffer[32];
|
extern uint8_t tx_buffer[32];
|
||||||
|
extern uint16_t crc;
|
||||||
|
|
||||||
uint8_t usbFunctionWrite(uint8_t * data, uint8_t len)
|
uint8_t usbFunctionWrite(uint8_t * data, uint8_t len)
|
||||||
{
|
{
|
||||||
@ -43,9 +44,7 @@ uint8_t usbFunctionWrite(uint8_t * data, uint8_t len)
|
|||||||
printf("usbFunctionWrite REQ_STATUS_UPLOAD addr: 0x%08lx len: %i rx_remaining=%i\n",
|
printf("usbFunctionWrite REQ_STATUS_UPLOAD addr: 0x%08lx len: %i rx_remaining=%i\n",
|
||||||
req_addr, len, rx_remaining);
|
req_addr, len, rx_remaining);
|
||||||
#endif
|
#endif
|
||||||
cli();
|
|
||||||
sram_copy(req_addr, data, len);
|
sram_copy(req_addr, data, len);
|
||||||
sei();
|
|
||||||
req_addr += len;
|
req_addr += len;
|
||||||
} else if (req_state == REQ_STATUS_BULK_UPLOAD) {
|
} else if (req_state == REQ_STATUS_BULK_UPLOAD) {
|
||||||
|
|
||||||
@ -56,12 +55,10 @@ uint8_t usbFunctionWrite(uint8_t * data, uint8_t len)
|
|||||||
#endif
|
#endif
|
||||||
ptr = data;
|
ptr = data;
|
||||||
i = len;
|
i = len;
|
||||||
cli();
|
|
||||||
while(i--){
|
while(i--){
|
||||||
sram_bulk_write(*ptr++);
|
sram_bulk_write(*ptr++);
|
||||||
counter_up();
|
counter_up();
|
||||||
}
|
}
|
||||||
sei();
|
|
||||||
}
|
}
|
||||||
return len;
|
return len;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -1,3 +1,4 @@
|
|||||||
|
|
||||||
uint8_t usbFunctionWrite(uint8_t * data, uint8_t len);
|
uint8_t usbFunctionWrite(uint8_t * data, uint8_t len);
|
||||||
uint8_t usbFunctionRead(uint8_t * data, uint8_t len);
|
uint8_t usbFunctionRead(uint8_t * data, uint8_t len);
|
||||||
|
|
||||||
|
|||||||
@ -114,7 +114,7 @@ section at the end of this file).
|
|||||||
/* Define this to 1 if the device has its own power supply. Set it to 0 if the
|
/* Define this to 1 if the device has its own power supply. Set it to 0 if the
|
||||||
* device is powered from the USB bus.
|
* device is powered from the USB bus.
|
||||||
*/
|
*/
|
||||||
#define USB_CFG_MAX_BUS_POWER 40
|
#define USB_CFG_MAX_BUS_POWER 300
|
||||||
/* Set this variable to the maximum USB bus power consumption of your device.
|
/* Set this variable to the maximum USB bus power consumption of your device.
|
||||||
* The value is in milliamperes. [It will be divided by two since USB
|
* The value is in milliamperes. [It will be divided by two since USB
|
||||||
* communicates power requirements in units of 2 mA.]
|
* communicates power requirements in units of 2 mA.]
|
||||||
@ -141,7 +141,7 @@ section at the end of this file).
|
|||||||
* of the macros usbDisableAllRequests() and usbEnableAllRequests() in
|
* of the macros usbDisableAllRequests() and usbEnableAllRequests() in
|
||||||
* usbdrv.h.
|
* usbdrv.h.
|
||||||
*/
|
*/
|
||||||
#define USB_CFG_LONG_TRANSFERS 0
|
#define USB_CFG_LONG_TRANSFERS 1
|
||||||
/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
|
/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
|
||||||
* in a single control-in or control-out transfer. Note that the capability
|
* in a single control-in or control-out transfer. Note that the capability
|
||||||
* for long transfers increases the driver size.
|
* for long transfers increases the driver size.
|
||||||
|
|||||||
@ -9,15 +9,20 @@ import popen2
|
|||||||
import glob
|
import glob
|
||||||
import sys
|
import sys
|
||||||
import pprint
|
import pprint
|
||||||
|
from subprocess import Popen
|
||||||
|
|
||||||
|
|
||||||
|
path = "/Users/david/Devel/arch/avr/code/snesram/roms/"
|
||||||
|
|
||||||
|
|
||||||
|
def shellquote(s):
|
||||||
|
return "'" + s.replace("'", "'\\''") + "'"
|
||||||
|
|
||||||
def main():
|
def main():
|
||||||
conn = sqlite3.connect('roms.sqlite3')
|
conn = sqlite3.connect('roms.sqlite3')
|
||||||
c = conn.cursor()
|
c = conn.cursor()
|
||||||
for i in [(4,),(8,),(16,),(32,)]:
|
for i in [(4,),(8,),(16,),(32,)]:
|
||||||
dirname = "%02i" % i
|
dirname = os.path.join(path,"%02i" % i)
|
||||||
if not os.path.isdir(dirname):
|
if not os.path.isdir(dirname):
|
||||||
os.mkdir(dirname)
|
os.mkdir(dirname)
|
||||||
print "#" * 60
|
print "#" * 60
|
||||||
@ -43,8 +48,15 @@ def main():
|
|||||||
''',i)
|
''',i)
|
||||||
for row in c:
|
for row in c:
|
||||||
name,size,filename = row
|
name,size,filename = row
|
||||||
cmd = 'scp burst:"%s" %s/' % ( filename,dirname)
|
if '[' not in filename:
|
||||||
print cmd
|
src = "david@burst:%s" % filename
|
||||||
|
command = ["scp",shellquote(src), dirname]
|
||||||
|
proc = Popen(command)
|
||||||
|
print dir(proc)
|
||||||
|
proc.communicate()
|
||||||
|
|
||||||
|
raise
|
||||||
|
>>>>>>> b7b35800ccc7b48d24cfd4c3e025482e95e3fc72:scripts/query_romsize.py
|
||||||
|
|
||||||
if __name__ == '__main__':
|
if __name__ == '__main__':
|
||||||
main()
|
main()
|
||||||
|
|||||||
@ -3,7 +3,7 @@
|
|||||||
<plist version="1.0">
|
<plist version="1.0">
|
||||||
<dict>
|
<dict>
|
||||||
<key>currentDocument</key>
|
<key>currentDocument</key>
|
||||||
<string>avr/usbload/commandline/snesuploader.c</string>
|
<string>avr/usbload/main.c</string>
|
||||||
<key>documents</key>
|
<key>documents</key>
|
||||||
<array>
|
<array>
|
||||||
<dict>
|
<dict>
|
||||||
@ -68,14 +68,14 @@
|
|||||||
<key>caret</key>
|
<key>caret</key>
|
||||||
<dict>
|
<dict>
|
||||||
<key>column</key>
|
<key>column</key>
|
||||||
<integer>0</integer>
|
<integer>23</integer>
|
||||||
<key>line</key>
|
<key>line</key>
|
||||||
<integer>0</integer>
|
<integer>206</integer>
|
||||||
</dict>
|
</dict>
|
||||||
<key>firstVisibleColumn</key>
|
<key>firstVisibleColumn</key>
|
||||||
<integer>0</integer>
|
<integer>0</integer>
|
||||||
<key>firstVisibleLine</key>
|
<key>firstVisibleLine</key>
|
||||||
<integer>198</integer>
|
<integer>206</integer>
|
||||||
</dict>
|
</dict>
|
||||||
<key>avr/usbload/crc.c</key>
|
<key>avr/usbload/crc.c</key>
|
||||||
<dict>
|
<dict>
|
||||||
@ -84,7 +84,37 @@
|
|||||||
<key>column</key>
|
<key>column</key>
|
||||||
<integer>0</integer>
|
<integer>0</integer>
|
||||||
<key>line</key>
|
<key>line</key>
|
||||||
|
<integer>44</integer>
|
||||||
|
</dict>
|
||||||
|
<key>columnSelection</key>
|
||||||
|
<false/>
|
||||||
|
<key>firstVisibleColumn</key>
|
||||||
|
<integer>0</integer>
|
||||||
|
<key>firstVisibleLine</key>
|
||||||
|
<integer>21</integer>
|
||||||
|
<key>selectFrom</key>
|
||||||
|
<dict>
|
||||||
|
<key>column</key>
|
||||||
<integer>0</integer>
|
<integer>0</integer>
|
||||||
|
<key>line</key>
|
||||||
|
<integer>43</integer>
|
||||||
|
</dict>
|
||||||
|
<key>selectTo</key>
|
||||||
|
<dict>
|
||||||
|
<key>column</key>
|
||||||
|
<integer>0</integer>
|
||||||
|
<key>line</key>
|
||||||
|
<integer>44</integer>
|
||||||
|
</dict>
|
||||||
|
</dict>
|
||||||
|
<key>avr/usbload/crc.h</key>
|
||||||
|
<dict>
|
||||||
|
<key>caret</key>
|
||||||
|
<dict>
|
||||||
|
<key>column</key>
|
||||||
|
<integer>14</integer>
|
||||||
|
<key>line</key>
|
||||||
|
<integer>9</integer>
|
||||||
</dict>
|
</dict>
|
||||||
<key>firstVisibleColumn</key>
|
<key>firstVisibleColumn</key>
|
||||||
<integer>0</integer>
|
<integer>0</integer>
|
||||||
@ -152,14 +182,14 @@
|
|||||||
<key>caret</key>
|
<key>caret</key>
|
||||||
<dict>
|
<dict>
|
||||||
<key>column</key>
|
<key>column</key>
|
||||||
<integer>17</integer>
|
<integer>23</integer>
|
||||||
<key>line</key>
|
<key>line</key>
|
||||||
<integer>59</integer>
|
<integer>195</integer>
|
||||||
</dict>
|
</dict>
|
||||||
<key>firstVisibleColumn</key>
|
<key>firstVisibleColumn</key>
|
||||||
<integer>0</integer>
|
<integer>0</integer>
|
||||||
<key>firstVisibleLine</key>
|
<key>firstVisibleLine</key>
|
||||||
<integer>161</integer>
|
<integer>176</integer>
|
||||||
</dict>
|
</dict>
|
||||||
<key>avr/usbload/sram.c</key>
|
<key>avr/usbload/sram.c</key>
|
||||||
<dict>
|
<dict>
|
||||||
@ -217,6 +247,20 @@
|
|||||||
<key>firstVisibleLine</key>
|
<key>firstVisibleLine</key>
|
||||||
<integer>0</integer>
|
<integer>0</integer>
|
||||||
</dict>
|
</dict>
|
||||||
|
<key>avr/usbload/usb_bulk.c</key>
|
||||||
|
<dict>
|
||||||
|
<key>caret</key>
|
||||||
|
<dict>
|
||||||
|
<key>column</key>
|
||||||
|
<integer>0</integer>
|
||||||
|
<key>line</key>
|
||||||
|
<integer>47</integer>
|
||||||
|
</dict>
|
||||||
|
<key>firstVisibleColumn</key>
|
||||||
|
<integer>0</integer>
|
||||||
|
<key>firstVisibleLine</key>
|
||||||
|
<integer>21</integer>
|
||||||
|
</dict>
|
||||||
<key>avr/usbload/usbconfig.h</key>
|
<key>avr/usbload/usbconfig.h</key>
|
||||||
<dict>
|
<dict>
|
||||||
<key>caret</key>
|
<key>caret</key>
|
||||||
@ -578,6 +622,7 @@
|
|||||||
<string>scripts/b.py</string>
|
<string>scripts/b.py</string>
|
||||||
<string>scripts/rom.py</string>
|
<string>scripts/rom.py</string>
|
||||||
<string>avr/usbload/crc.c</string>
|
<string>avr/usbload/crc.c</string>
|
||||||
|
<string>avr/usbload/crc.h</string>
|
||||||
<string>avr/usbload/sram.c</string>
|
<string>avr/usbload/sram.c</string>
|
||||||
<string>avr/usbload/sram.h</string>
|
<string>avr/usbload/sram.h</string>
|
||||||
<string>avr/usbload/fifo.h</string>
|
<string>avr/usbload/fifo.h</string>
|
||||||
@ -587,6 +632,7 @@
|
|||||||
<string>avr/usbload/debug.c</string>
|
<string>avr/usbload/debug.c</string>
|
||||||
<string>avr/usbload/uart.c</string>
|
<string>avr/usbload/uart.c</string>
|
||||||
<string>avr/usbload/main.c</string>
|
<string>avr/usbload/main.c</string>
|
||||||
|
<string>avr/usbload/usb_bulk.c</string>
|
||||||
<string>avr/usbload/usbconfig.h</string>
|
<string>avr/usbload/usbconfig.h</string>
|
||||||
<string>avr/usbload/commandline/opendevice.c</string>
|
<string>avr/usbload/commandline/opendevice.c</string>
|
||||||
<string>avr/usbload/commandline/opendevice.h</string>
|
<string>avr/usbload/commandline/opendevice.h</string>
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user