diff --git a/poc/lpc2148_blinky/Makefile b/poc/lpc2148_blinky/Makefile
new file mode 100644
index 0000000..3c73b28
--- /dev/null
+++ b/poc/lpc2148_blinky/Makefile
@@ -0,0 +1,60 @@
+#preferences for cross development
+
+TOOLCHAIN=arm-elf-
+CC=$(TOOLCHAIN)gcc
+AS=$(TOOLCHAIN)as
+LD=$(TOOLCHAIN)ld
+OBJCOPY=$(TOOLCHAIN)objcopy
+
+#flags
+
+CFLAGS = -mcpu=arm7tdmi -g -nostartfiles -nostdlib
+ASFLAGS =
+#ASFLAGS = --D_ASSEMBLY_
+
+BASENAME = main
+
+ELFFILE = $(BASENAME).elf
+BINARY = $(BASENAME).bin
+SREC = $(BASENAME).srec
+HEX = $(BASENAME).hex
+
+#LSCRIPT = lpc2103.ld
+LSCRIPT = lpc2148-ram.ld
+
+
+#target
+TARGETS = $(ELFFILE) $(BINARY) $(SREC) $(HEX)
+
+OBJS = crt.o main.o startup.o console.o
+
+all:$(TARGETS)
+
+
+$(ELFFILE): $(OBJS) Makefile
+ $(LD) -o $(ELFFILE) $(OBJS) -T $(LSCRIPT) \
+ -Map $(BASENAME).map
+
+
+$(BINARY): $(ELFFILE)
+ $(OBJCOPY) -O binary -S $(ELFFILE) $(BINARY)
+
+
+$(SREC): $(ELFFILE)
+ $(OBJCOPY) -O srec -S $(ELFFILE) $(SREC)
+
+$(HEX): $(ELFFILE)
+ $(OBJCOPY) -O ihex -S $(ELFFILE) $(HEX)
+
+
+upload:
+ lpc21isp $(HEX) /dev/ttyUSB0 115200 12000
+
+clean:
+ rm -f *.o $(TARGETS)
+
+#arm-elf-gcc -c main.c -o main.o
+#sh-2.05b$ ls
+#lpc2103.h main.c main.elf main.o
+#sh-2.05b$ arm-elf-ld -o main.elf main.o -Map main.map
+
diff --git a/poc/lpc2148_blinky/Makefile.ram b/poc/lpc2148_blinky/Makefile.ram
new file mode 100644
index 0000000..3c73b28
--- /dev/null
+++ b/poc/lpc2148_blinky/Makefile.ram
@@ -0,0 +1,60 @@
+#preferences for cross development
+
+TOOLCHAIN=arm-elf-
+CC=$(TOOLCHAIN)gcc
+AS=$(TOOLCHAIN)as
+LD=$(TOOLCHAIN)ld
+OBJCOPY=$(TOOLCHAIN)objcopy
+
+#flags
+
+CFLAGS = -mcpu=arm7tdmi -g -nostartfiles -nostdlib
+ASFLAGS =
+#ASFLAGS = --D_ASSEMBLY_
+
+BASENAME = main
+
+ELFFILE = $(BASENAME).elf
+BINARY = $(BASENAME).bin
+SREC = $(BASENAME).srec
+HEX = $(BASENAME).hex
+
+#LSCRIPT = lpc2103.ld
+LSCRIPT = lpc2148-ram.ld
+
+
+#target
+TARGETS = $(ELFFILE) $(BINARY) $(SREC) $(HEX)
+
+OBJS = crt.o main.o startup.o console.o
+
+all:$(TARGETS)
+
+
+$(ELFFILE): $(OBJS) Makefile
+ $(LD) -o $(ELFFILE) $(OBJS) -T $(LSCRIPT) \
+ -Map $(BASENAME).map
+
+
+$(BINARY): $(ELFFILE)
+ $(OBJCOPY) -O binary -S $(ELFFILE) $(BINARY)
+
+
+$(SREC): $(ELFFILE)
+ $(OBJCOPY) -O srec -S $(ELFFILE) $(SREC)
+
+$(HEX): $(ELFFILE)
+ $(OBJCOPY) -O ihex -S $(ELFFILE) $(HEX)
+
+
+upload:
+ lpc21isp $(HEX) /dev/ttyUSB0 115200 12000
+
+clean:
+ rm -f *.o $(TARGETS)
+
+#arm-elf-gcc -c main.c -o main.o
+#sh-2.05b$ ls
+#lpc2103.h main.c main.elf main.o
+#sh-2.05b$ arm-elf-ld -o main.elf main.o -Map main.map
+
diff --git a/poc/lpc2148_blinky/blink2148.tmproj b/poc/lpc2148_blinky/blink2148.tmproj
new file mode 100644
index 0000000..103898a
--- /dev/null
+++ b/poc/lpc2148_blinky/blink2148.tmproj
@@ -0,0 +1,39 @@
+
+
+
+
+ documents
+
+
+ expanded
+
+ name
+ blink2148
+ regexFolderFilter
+ !.*/(\.[^/]*|CVS|_darcs|_MTN|\{arch\}|blib|.*~\.nib|.*\.(framework|app|pbproj|pbxproj|xcode(proj)?|bundle))$
+ sourceDirectory
+
+
+
+ fileHierarchyDrawerWidth
+ 200
+ metaData
+
+ showFileHierarchyDrawer
+
+ showFileHierarchyPanel
+
+ treeState
+
+ blink2148
+
+ isExpanded
+
+ subItems
+
+
+
+ windowFrame
+ {{25, 61}, {1169, 813}}
+
+
diff --git a/poc/lpc2148_blinky/console.c b/poc/lpc2148_blinky/console.c
new file mode 100644
index 0000000..337c96d
--- /dev/null
+++ b/poc/lpc2148_blinky/console.c
@@ -0,0 +1,55 @@
+/*
+ Simple console input/output, over serial port #0
+
+ Partially copied from Jim Lynch's tutorial
+*/
+
+#include "console.h"
+
+#define PINSEL0 *(volatile unsigned int *)0xE002C000
+
+#define U0THR *(volatile unsigned int *)0xE000C000
+#define U0RBR *(volatile unsigned int *)0xE000C000
+#define U0DLL *(volatile unsigned int *)0xE000C000
+#define U0DLM *(volatile unsigned int *)0xE000C004
+#define U0FCR *(volatile unsigned int *)0xE000C008
+#define U0LCR *(volatile unsigned int *)0xE000C00C
+#define U0LSR *(volatile unsigned int *)0xE000C014
+
+/* Initialize Serial Interface */
+void ConsoleInit(int iDivider)
+{
+ PINSEL0 = (PINSEL0 & ~0x0000000F) | 0x00000005; /* Enable RxD0 and TxD0 */
+ U0LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
+ U0DLL = iDivider & 0xFF; /* set divider / baud rate */
+ U0DLM = iDivider >> 8;
+ U0LCR = 0x03; /* DLAB = 0 */
+
+ // enable FIFO
+ U0FCR = 1;
+}
+
+/* Write character to Serial Port */
+int putchar(int ch)
+{
+ if (ch == '\n') {
+ while (!(U0LSR & 0x20));
+ U0THR = '\r';
+ }
+ while (!(U0LSR & 0x20));
+ U0THR = ch;
+ return ch;
+}
+int getchar(void)
+{ /* Read character from Serial Port */
+ while (!(U0LSR & 0x01));
+ return (U0RBR);
+}
+int puts(char *s)
+{
+ while (*s) {
+ putchar(*s++);
+ }
+ //putchar('\n');
+ return 1;
+}
diff --git a/poc/lpc2148_blinky/console.h b/poc/lpc2148_blinky/console.h
new file mode 100644
index 0000000..f48922e
--- /dev/null
+++ b/poc/lpc2148_blinky/console.h
@@ -0,0 +1,3 @@
+void ConsoleInit(int iDivider);
+int putchar(int c);
+int puts(char *s);
diff --git a/poc/lpc2148_blinky/crt.s b/poc/lpc2148_blinky/crt.s
new file mode 100644
index 0000000..78de943
--- /dev/null
+++ b/poc/lpc2148_blinky/crt.s
@@ -0,0 +1,110 @@
+/* ***************************************************************************************************************
+
+ crt.s STARTUP ASSEMBLY CODE
+ -----------------------
+
+
+ Module includes the interrupt vectors and start-up code.
+
+ *************************************************************************************************************** */
+
+/* Stack Sizes */
+.set UND_STACK_SIZE, 0x00000040 /* stack for "undefined instruction" interrupts is 4 bytes */
+.set ABT_STACK_SIZE, 0x00000040 /* stack for "abort" interrupts is 4 bytes */
+.set FIQ_STACK_SIZE, 0x00000040 /* stack for "FIQ" interrupts is 4 bytes */
+.set IRQ_STACK_SIZE, 0X00000040 /* stack for "IRQ" normal interrupts is 4 bytes */
+.set SVC_STACK_SIZE, 0x00000400 /* stack for "SVC" supervisor mode is 4 bytes */
+
+
+
+/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */
+.set MODE_USR, 0x10 /* Normal User Mode */
+.set MODE_FIQ, 0x11 /* FIQ Processing Fast Interrupts Mode */
+.set MODE_IRQ, 0x12 /* IRQ Processing Standard Interrupts Mode */
+.set MODE_SVC, 0x13 /* Supervisor Processing Software Interrupts Mode */
+.set MODE_ABT, 0x17 /* Abort Processing memory Faults Mode */
+.set MODE_UND, 0x1B /* Undefined Processing Undefined Instructions Mode */
+.set MODE_SYS, 0x1F /* System Running Priviledged Operating System Tasks Mode */
+
+.set I_BIT, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */
+.set F_BIT, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */
+
+
+.text
+.arm
+
+.global Reset_Handler
+.global _startup
+.func _startup
+
+_startup:
+
+# Exception Vectors
+
+_vectors: ldr PC, Reset_Addr
+ ldr PC, Undef_Addr
+ ldr PC, SWI_Addr
+ ldr PC, PAbt_Addr
+ ldr PC, DAbt_Addr
+ nop /* Reserved Vector (holds Philips ISP checksum) */
+ ldr PC, [PC,#-0xFF0] /* see page 71 of "Insiders Guide to the Philips ARM7-Based Microcontrollers" by Trevor Martin */
+ ldr PC, FIQ_Addr
+
+Reset_Addr: .word Reset_Handler /* defined in this module below */
+Undef_Addr: .word UNDEF_Routine /* defined in main.c */
+SWI_Addr: .word SWI_Routine /* defined in main.c */
+PAbt_Addr: .word UNDEF_Routine /* defined in main.c */
+DAbt_Addr: .word UNDEF_Routine /* defined in main.c */
+IRQ_Addr: .word IRQ_Routine /* defined in main.c */
+FIQ_Addr: .word FIQ_Routine /* defined in main.c */
+ .word 0 /* rounds the vectors and ISR addresses to 64 bytes total */
+
+
+# Reset Handler
+
+Reset_Handler:
+
+ /* Setup a stack for each mode - note that this only sets up a usable stack
+ for User mode. Also each mode is setup with interrupts initially disabled. */
+
+ ldr r0, =_stack_end
+ msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
+ mov sp, r0
+ sub r0, r0, #UND_STACK_SIZE
+ msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
+ mov sp, r0
+ sub r0, r0, #ABT_STACK_SIZE
+ msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
+ mov sp, r0
+ sub r0, r0, #FIQ_STACK_SIZE
+ msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
+ mov sp, r0
+ sub r0, r0, #IRQ_STACK_SIZE
+ msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
+ mov sp, r0
+ sub r0, r0, #SVC_STACK_SIZE
+ msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* User Mode */
+ mov sp, r0
+
+ /* copy .data section (Copy from ROM to RAM) */
+ ldr R1, =_etext
+ ldr R2, =_data
+ ldr R3, =_edata
+1: cmp R2, R3
+ ldrlo R0, [R1], #4
+ strlo R0, [R2], #4
+ blo 1b
+
+ /* Clear .bss section (Zero init) */
+ mov R0, #0
+ ldr R1, =_bss_start
+ ldr R2, =_bss_end
+2: cmp R1, R2
+ strlo R0, [R1], #4
+ blo 2b
+
+ /* Enter the C code */
+ b main
+
+.endfunc
+.end
diff --git a/poc/lpc2148_blinky/lpc2148-ram.ld b/poc/lpc2148_blinky/lpc2148-ram.ld
new file mode 100644
index 0000000..4555cce
--- /dev/null
+++ b/poc/lpc2148_blinky/lpc2148-ram.ld
@@ -0,0 +1,197 @@
+/* ****************************************************************************************************** */
+/* demo2148_blink_flash.cmd LINKER SCRIPT */
+/* */
+/* */
+/* The Linker Script defines how the code and data emitted by the GNU C compiler and assembler are */
+/* to be loaded into memory (code goes into FLASH, variables go into RAM). */
+/* */
+/* Any symbols defined in the Linker Script are automatically global and available to the rest of the */
+/* program. */
+/* */
+/* To force the linker to use this LINKER SCRIPT, just add the -T demo2148_blink_flash.cmd directive */
+/* to the linker flags in the makefile. */
+/* */
+/* LFLAGS = -Map main.map -nostartfiles -T demo2148_blink_flash.cmd */
+/* */
+/* */
+/* The Philips boot loader supports the ISP (In System Programming) via the serial port and the IAP */
+/* (In Application Programming) for flash programming from within your application. */
+/* */
+/* The boot loader uses RAM memory and we MUST NOT load variables or code in these areas. */
+/* */
+/* RAM used by boot loader: 0x40000120 - 0x400001FF (223 bytes) for ISP variables */
+/* 0x40007FE0 - 0x4000FFFF (32 bytes) for ISP and IAP variables */
+/* 0x40007EE0 - 0x40007FE0 (256 bytes) stack for ISP and IAP */
+/* */
+/* */
+/* MEMORY MAP */
+/* | |0x40008000 */
+/* .-------->|---------------------------------| */
+/* . | variables and stack |0x40007FFF */
+/* ram_isp_high | for Philips boot loader | */
+/* . | 32 + 256 = 288 bytes | */
+/* . | | */
+/* . | Do not put anything here |0x40007EE0 */
+/* .-------->|---------------------------------| */
+/* | UDF Stack 4 bytes |0x40007EDC <---------- _stack_end */
+/* .-------->|---------------------------------| */
+/* | ABT Stack 4 bytes |0x40007ED8 */
+/* .-------->|---------------------------------| */
+/* | FIQ Stack 4 bytes |0x40007ED4 */
+/* .-------->|---------------------------------| */
+/* | IRQ Stack 4 bytes |0x40007ED0 */
+/* .-------->|---------------------------------| */
+/* | SVC Stack 4 bytes |0x40007ECC */
+/* .-------->|---------------------------------| */
+/* . | |0x40007EC8 */
+/* . | stack area for user program | */
+/* . | | | */
+/* . | | | */
+/* . | | | */
+/* . | V | */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | free ram | */
+/* ram | | */
+/* . | | */
+/* . | | */
+/* . |.................................|0x40000234 <---------- _bss_end */
+/* . | | */
+/* . | .bss uninitialized variables | */
+/* . |.................................|0x40000218 <---------- _bss_start, _edata */
+/* . | | */
+/* . | .data initialized variables | */
+/* . | |0x40000200 <---------- _data */
+/* .-------->|---------------------------------| */
+/* . | variables used by |0x400001FF */
+/* ram_isp_low | Philips boot loader | */
+/* . | 223 bytes |0x40000120 */
+/* .-------->|---------------------------------| */
+/* . | |0x4000011F */
+/* ram_vectors | free ram | */
+/* . |---------------------------------|0x40000040 */
+/* . | |0x4000003F */
+/* . | Interrupt Vectors (re-mapped) | */
+/* . | 64 bytes |0x40000000 */
+/* .-------->|---------------------------------| */
+/* | | */
+/* */
+/* */
+/* */
+/* | | */
+/* .--------> |---------------------------------| */
+/* . | |0x0001FFFF */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | unused flash eprom | */
+/* . | | */
+/* . |.................................|0x0000032c */
+/* . | | */
+/* . | copy of .data area | */
+/* flash | | */
+/* . |---------------------------------|0x00000314 <----------- _etext */
+/* . | | */
+/* . | |0x00000180 main */
+/* . | |0x00000278 feed */
+/* . | main() |0x000002c4 FIQ_Routine */
+/* . | |0x000002d8 SWI_Routine */
+/* . | |0x000002ec UNDEF_Routine */
+/* . | |0x000002b0 IRQ_routine */
+/* . |---------------------------------|0x000001cc initialize */
+/* . | |0x000000D4 */
+/* . | Startup Code | */
+/* . | (assembler) | */
+/* . | | */
+/* . |---------------------------------|0x00000040 Reset_Handler */
+/* . | |0x0000003F */
+/* . | Interrupt Vector Table (unused) | */
+/* . | 64 bytes | */
+/* .--------->|---------------------------------|0x00000000 _startup *
+/* */
+/* */
+/* The easy way to prevent the linker from loading anything into a memory area is to define */
+/* a MEMORY region for it and then avoid assigning any .text, .data or .bss sections into it. */
+/* */
+/* */
+/* MEMORY */
+/* { */
+/* ram_isp_low(A) : ORIGIN = 0x40000120, LENGTH = 223 */
+/* */
+/* } */
+/* */
+/* */
+/* Author: James P. Lynch */
+/* */
+/* ****************************************************************************************************** */
+
+
+/* identify the Entry Point */
+
+ENTRY(_startup)
+
+
+
+/* specify the LPC2148 memory areas */
+
+MEMORY
+{
+ flash : ORIGIN = 0, LENGTH = 512K /* FLASH ROM */
+ ram_isp_low(A) : ORIGIN = 0x40000120, LENGTH = 223 /* variables used by Philips ISP bootloader */
+ ram : ORIGIN = 0x40000200, LENGTH = 32513 /* free RAM area */
+ ram_isp_high(A) : ORIGIN = 0x40007FE0, LENGTH = 32 /* variables used by Philips ISP bootloader */
+ ram_usb_dma : ORIGIN = 0x7FD00000, LENGTH = 8192 /* on-chip USB DMA RAM area (not used) */
+}
+
+
+
+/* define a global symbol _stack_end */
+
+_stack_end = 0x40007EDC;
+
+
+
+/* now define the output sections */
+
+SECTIONS
+{
+ . = 0; /* set location counter to address zero */
+
+ startup : { *(.startup)} >ram /* the startup code goes into FLASH */
+
+
+
+ .text : /* collect all sections that should go into FLASH after startup */
+ {
+ *(.text) /* all .text sections (code) */
+ *(.rodata) /* all .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* all .rodata* sections (constants, strings, etc.) */
+ *(.glue_7) /* all .glue_7 sections (no idea what these are) */
+ *(.glue_7t) /* all .glue_7t sections (no idea what these are) */
+ _etext = .; /* define a global symbol _etext just after the last code byte */
+ } >ram /* put all the above into FLASH */
+
+
+
+
+ .data : /* collect all initialized .data sections that go into RAM */
+ {
+ _data = .; /* create a global symbol marking the start of the .data section */
+ *(.data) /* all .data sections */
+ _edata = .; /* define a global symbol marking the end of the .data section */
+ } >ram AT >ram /* put all the above into RAM (but load the LMA copy into FLASH) */
+
+ .bss : /* collect all uninitialized .bss sections that go into RAM */
+ {
+ _bss_start = .; /* define a global symbol marking the start of the .bss section */
+ *(.bss) /* all .bss sections */
+ } >ram /* put all the above in RAM (it will be cleared in the startup code */
+
+ . = ALIGN(4); /* advance location counter to the next 32-bit boundary */
+ _bss_end = . ; /* define a global symbol marking the end of the .bss section */
+}
+ _end = .; /* define a global symbol marking the end of application RAM */
+
diff --git a/poc/lpc2148_blinky/lpc2148-rom.ld b/poc/lpc2148_blinky/lpc2148-rom.ld
new file mode 100644
index 0000000..5be7ede
--- /dev/null
+++ b/poc/lpc2148_blinky/lpc2148-rom.ld
@@ -0,0 +1,197 @@
+/* ****************************************************************************************************** */
+/* demo2148_blink_flash.cmd LINKER SCRIPT */
+/* */
+/* */
+/* The Linker Script defines how the code and data emitted by the GNU C compiler and assembler are */
+/* to be loaded into memory (code goes into FLASH, variables go into RAM). */
+/* */
+/* Any symbols defined in the Linker Script are automatically global and available to the rest of the */
+/* program. */
+/* */
+/* To force the linker to use this LINKER SCRIPT, just add the -T demo2148_blink_flash.cmd directive */
+/* to the linker flags in the makefile. */
+/* */
+/* LFLAGS = -Map main.map -nostartfiles -T demo2148_blink_flash.cmd */
+/* */
+/* */
+/* The Philips boot loader supports the ISP (In System Programming) via the serial port and the IAP */
+/* (In Application Programming) for flash programming from within your application. */
+/* */
+/* The boot loader uses RAM memory and we MUST NOT load variables or code in these areas. */
+/* */
+/* RAM used by boot loader: 0x40000120 - 0x400001FF (223 bytes) for ISP variables */
+/* 0x40007FE0 - 0x4000FFFF (32 bytes) for ISP and IAP variables */
+/* 0x40007EE0 - 0x40007FE0 (256 bytes) stack for ISP and IAP */
+/* */
+/* */
+/* MEMORY MAP */
+/* | |0x40008000 */
+/* .-------->|---------------------------------| */
+/* . | variables and stack |0x40007FFF */
+/* ram_isp_high | for Philips boot loader | */
+/* . | 32 + 256 = 288 bytes | */
+/* . | | */
+/* . | Do not put anything here |0x40007EE0 */
+/* .-------->|---------------------------------| */
+/* | UDF Stack 4 bytes |0x40007EDC <---------- _stack_end */
+/* .-------->|---------------------------------| */
+/* | ABT Stack 4 bytes |0x40007ED8 */
+/* .-------->|---------------------------------| */
+/* | FIQ Stack 4 bytes |0x40007ED4 */
+/* .-------->|---------------------------------| */
+/* | IRQ Stack 4 bytes |0x40007ED0 */
+/* .-------->|---------------------------------| */
+/* | SVC Stack 4 bytes |0x40007ECC */
+/* .-------->|---------------------------------| */
+/* . | |0x40007EC8 */
+/* . | stack area for user program | */
+/* . | | | */
+/* . | | | */
+/* . | | | */
+/* . | V | */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | free ram | */
+/* ram | | */
+/* . | | */
+/* . | | */
+/* . |.................................|0x40000234 <---------- _bss_end */
+/* . | | */
+/* . | .bss uninitialized variables | */
+/* . |.................................|0x40000218 <---------- _bss_start, _edata */
+/* . | | */
+/* . | .data initialized variables | */
+/* . | |0x40000200 <---------- _data */
+/* .-------->|---------------------------------| */
+/* . | variables used by |0x400001FF */
+/* ram_isp_low | Philips boot loader | */
+/* . | 223 bytes |0x40000120 */
+/* .-------->|---------------------------------| */
+/* . | |0x4000011F */
+/* ram_vectors | free ram | */
+/* . |---------------------------------|0x40000040 */
+/* . | |0x4000003F */
+/* . | Interrupt Vectors (re-mapped) | */
+/* . | 64 bytes |0x40000000 */
+/* .-------->|---------------------------------| */
+/* | | */
+/* */
+/* */
+/* */
+/* | | */
+/* .--------> |---------------------------------| */
+/* . | |0x0001FFFF */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | | */
+/* . | unused flash eprom | */
+/* . | | */
+/* . |.................................|0x0000032c */
+/* . | | */
+/* . | copy of .data area | */
+/* flash | | */
+/* . |---------------------------------|0x00000314 <----------- _etext */
+/* . | | */
+/* . | |0x00000180 main */
+/* . | |0x00000278 feed */
+/* . | main() |0x000002c4 FIQ_Routine */
+/* . | |0x000002d8 SWI_Routine */
+/* . | |0x000002ec UNDEF_Routine */
+/* . | |0x000002b0 IRQ_routine */
+/* . |---------------------------------|0x000001cc initialize */
+/* . | |0x000000D4 */
+/* . | Startup Code | */
+/* . | (assembler) | */
+/* . | | */
+/* . |---------------------------------|0x00000040 Reset_Handler */
+/* . | |0x0000003F */
+/* . | Interrupt Vector Table (unused) | */
+/* . | 64 bytes | */
+/* .--------->|---------------------------------|0x00000000 _startup *
+/* */
+/* */
+/* The easy way to prevent the linker from loading anything into a memory area is to define */
+/* a MEMORY region for it and then avoid assigning any .text, .data or .bss sections into it. */
+/* */
+/* */
+/* MEMORY */
+/* { */
+/* ram_isp_low(A) : ORIGIN = 0x40000120, LENGTH = 223 */
+/* */
+/* } */
+/* */
+/* */
+/* Author: James P. Lynch */
+/* */
+/* ****************************************************************************************************** */
+
+
+/* identify the Entry Point */
+
+ENTRY(_startup)
+
+
+
+/* specify the LPC2148 memory areas */
+
+MEMORY
+{
+ flash : ORIGIN = 0, LENGTH = 512K /* FLASH ROM */
+ ram_isp_low(A) : ORIGIN = 0x40000120, LENGTH = 223 /* variables used by Philips ISP bootloader */
+ ram : ORIGIN = 0x40000200, LENGTH = 32513 /* free RAM area */
+ ram_isp_high(A) : ORIGIN = 0x40007FE0, LENGTH = 32 /* variables used by Philips ISP bootloader */
+ ram_usb_dma : ORIGIN = 0x7FD00000, LENGTH = 8192 /* on-chip USB DMA RAM area (not used) */
+}
+
+
+
+/* define a global symbol _stack_end */
+
+_stack_end = 0x40007EDC;
+
+
+
+/* now define the output sections */
+
+SECTIONS
+{
+ . = 0; /* set location counter to address zero */
+
+ startup : { *(.startup)} >flash /* the startup code goes into FLASH */
+
+
+
+ .text : /* collect all sections that should go into FLASH after startup */
+ {
+ *(.text) /* all .text sections (code) */
+ *(.rodata) /* all .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* all .rodata* sections (constants, strings, etc.) */
+ *(.glue_7) /* all .glue_7 sections (no idea what these are) */
+ *(.glue_7t) /* all .glue_7t sections (no idea what these are) */
+ _etext = .; /* define a global symbol _etext just after the last code byte */
+ } >flash /* put all the above into FLASH */
+
+
+
+
+ .data : /* collect all initialized .data sections that go into RAM */
+ {
+ _data = .; /* create a global symbol marking the start of the .data section */
+ *(.data) /* all .data sections */
+ _edata = .; /* define a global symbol marking the end of the .data section */
+ } >ram AT >flash /* put all the above into RAM (but load the LMA copy into FLASH) */
+
+ .bss : /* collect all uninitialized .bss sections that go into RAM */
+ {
+ _bss_start = .; /* define a global symbol marking the start of the .bss section */
+ *(.bss) /* all .bss sections */
+ } >ram /* put all the above in RAM (it will be cleared in the startup code */
+
+ . = ALIGN(4); /* advance location counter to the next 32-bit boundary */
+ _bss_end = . ; /* define a global symbol marking the end of the .bss section */
+}
+ _end = .; /* define a global symbol marking the end of application RAM */
+
diff --git a/poc/lpc2148_blinky/lpc214x.h b/poc/lpc2148_blinky/lpc214x.h
new file mode 100644
index 0000000..497ef3b
--- /dev/null
+++ b/poc/lpc2148_blinky/lpc214x.h
@@ -0,0 +1,364 @@
+/***********************************************************************/
+/* This file is part of the uVision/ARM development tools */
+/* Copyright KEIL ELEKTRONIK GmbH 2002-2005 */
+/***********************************************************************/
+/* */
+/* LPC214X.H: Header file for Philips LPC2141/42/44/46/48 */
+/* */
+/***********************************************************************/
+
+#ifndef __LPC214x_H
+#define __LPC214x_H
+
+/* Vectored Interrupt Controller (VIC) */
+#define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000))
+#define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004))
+#define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008))
+#define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C))
+#define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010))
+#define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014))
+#define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018))
+#define VICSoftIntClr (*((volatile unsigned long *) 0xFFFFF01C))
+#define VICProtection (*((volatile unsigned long *) 0xFFFFF020))
+#define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030))
+#define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034))
+#define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100))
+#define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104))
+#define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108))
+#define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C))
+#define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110))
+#define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114))
+#define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118))
+#define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C))
+#define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120))
+#define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124))
+#define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128))
+#define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C))
+#define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130))
+#define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134))
+#define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138))
+#define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C))
+#define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200))
+#define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204))
+#define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208))
+#define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C))
+#define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210))
+#define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214))
+#define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218))
+#define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C))
+#define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220))
+#define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224))
+#define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228))
+#define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C))
+#define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230))
+#define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234))
+#define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238))
+#define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C))
+
+/* Pin Connect Block */
+#define PINSEL0 (*((volatile unsigned long *) 0xE002C000))
+#define PINSEL1 (*((volatile unsigned long *) 0xE002C004))
+#define PINSEL2 (*((volatile unsigned long *) 0xE002C014))
+
+/* General Purpose Input/Output (GPIO) */
+#define IOPIN0 (*((volatile unsigned long *) 0xE0028000))
+#define IOSET0 (*((volatile unsigned long *) 0xE0028004))
+#define IODIR0 (*((volatile unsigned long *) 0xE0028008))
+#define IOCLR0 (*((volatile unsigned long *) 0xE002800C))
+#define IOPIN1 (*((volatile unsigned long *) 0xE0028010))
+#define IOSET1 (*((volatile unsigned long *) 0xE0028014))
+#define IODIR1 (*((volatile unsigned long *) 0xE0028018))
+#define IOCLR1 (*((volatile unsigned long *) 0xE002801C))
+#define IO0PIN (*((volatile unsigned long *) 0xE0028000))
+#define IO0SET (*((volatile unsigned long *) 0xE0028004))
+#define IO0DIR (*((volatile unsigned long *) 0xE0028008))
+#define IO0CLR (*((volatile unsigned long *) 0xE002800C))
+#define IO1PIN (*((volatile unsigned long *) 0xE0028010))
+#define IO1SET (*((volatile unsigned long *) 0xE0028014))
+#define IO1DIR (*((volatile unsigned long *) 0xE0028018))
+#define IO1CLR (*((volatile unsigned long *) 0xE002801C))
+#define FIO0DIR (*((volatile unsigned long *) 0x3FFFC000))
+#define FIO0MASK (*((volatile unsigned long *) 0x3FFFC010))
+#define FIO0PIN (*((volatile unsigned long *) 0x3FFFC014))
+#define FIO0SET (*((volatile unsigned long *) 0x3FFFC018))
+#define FIO0CLR (*((volatile unsigned long *) 0x3FFFC01C))
+#define FIO1DIR (*((volatile unsigned long *) 0x3FFFC020))
+#define FIO1MASK (*((volatile unsigned long *) 0x3FFFC030))
+#define FIO1PIN (*((volatile unsigned long *) 0x3FFFC034))
+#define FIO1SET (*((volatile unsigned long *) 0x3FFFC038))
+#define FIO1CLR (*((volatile unsigned long *) 0x3FFFC03C))
+
+/* Memory Accelerator Module (MAM) */
+#define MAMCR (*((volatile unsigned char *) 0xE01FC000))
+#define MAMTIM (*((volatile unsigned char *) 0xE01FC004))
+#define MEMMAP (*((volatile unsigned char *) 0xE01FC040))
+
+/* Phase Locked Loop 0 (PLL0) */
+#define PLL0CON (*((volatile unsigned char *) 0xE01FC080))
+#define PLL0CFG (*((volatile unsigned char *) 0xE01FC084))
+#define PLL0STAT (*((volatile unsigned short*) 0xE01FC088))
+#define PLL0FEED (*((volatile unsigned char *) 0xE01FC08C))
+
+/* Phase Locked Loop 1 (PLL1) */
+#define PLL1CON (*((volatile unsigned char *) 0xE01FC0A0))
+#define PLL1CFG (*((volatile unsigned char *) 0xE01FC0A4))
+#define PLL1STAT (*((volatile unsigned short*) 0xE01FC0A8))
+#define PLL1FEED (*((volatile unsigned char *) 0xE01FC0AC))
+
+/* VPB Divider */
+#define VPBDIV (*((volatile unsigned char *) 0xE01FC100))
+
+/* Power Control */
+#define PCON (*((volatile unsigned char *) 0xE01FC0C0))
+#define PCONP (*((volatile unsigned long *) 0xE01FC0C4))
+
+/* External Interrupts */
+#define EXTINT (*((volatile unsigned char *) 0xE01FC140))
+#define INTWAKE (*((volatile unsigned short*) 0xE01FC144))
+#define EXTMODE (*((volatile unsigned char *) 0xE01FC148))
+#define EXTPOLAR (*((volatile unsigned char *) 0xE01FC14C))
+
+/* Reset */
+#define RSID (*((volatile unsigned char *) 0xE01FC180))
+
+/* Code Security / Debugging */
+#define CSPR (*((volatile unsigned char *) 0xE01FC184))
+
+/* System Control Miscellaneous */
+#define SCS (*((volatile unsigned long *) 0xE01FC1A0))
+
+/* Timer 0 */
+#define T0IR (*((volatile unsigned long *) 0xE0004000))
+#define T0TCR (*((volatile unsigned long *) 0xE0004004))
+#define T0TC (*((volatile unsigned long *) 0xE0004008))
+#define T0PR (*((volatile unsigned long *) 0xE000400C))
+#define T0PC (*((volatile unsigned long *) 0xE0004010))
+#define T0MCR (*((volatile unsigned long *) 0xE0004014))
+#define T0MR0 (*((volatile unsigned long *) 0xE0004018))
+#define T0MR1 (*((volatile unsigned long *) 0xE000401C))
+#define T0MR2 (*((volatile unsigned long *) 0xE0004020))
+#define T0MR3 (*((volatile unsigned long *) 0xE0004024))
+#define T0CCR (*((volatile unsigned long *) 0xE0004028))
+#define T0CR0 (*((volatile unsigned long *) 0xE000402C))
+#define T0CR1 (*((volatile unsigned long *) 0xE0004030))
+#define T0CR2 (*((volatile unsigned long *) 0xE0004034))
+#define T0CR3 (*((volatile unsigned long *) 0xE0004038))
+#define T0EMR (*((volatile unsigned long *) 0xE000403C))
+#define T0CTCR (*((volatile unsigned long *) 0xE0004070))
+
+/* Timer 1 */
+#define T1IR (*((volatile unsigned long *) 0xE0008000))
+#define T1TCR (*((volatile unsigned long *) 0xE0008004))
+#define T1TC (*((volatile unsigned long *) 0xE0008008))
+#define T1PR (*((volatile unsigned long *) 0xE000800C))
+#define T1PC (*((volatile unsigned long *) 0xE0008010))
+#define T1MCR (*((volatile unsigned long *) 0xE0008014))
+#define T1MR0 (*((volatile unsigned long *) 0xE0008018))
+#define T1MR1 (*((volatile unsigned long *) 0xE000801C))
+#define T1MR2 (*((volatile unsigned long *) 0xE0008020))
+#define T1MR3 (*((volatile unsigned long *) 0xE0008024))
+#define T1CCR (*((volatile unsigned long *) 0xE0008028))
+#define T1CR0 (*((volatile unsigned long *) 0xE000802C))
+#define T1CR1 (*((volatile unsigned long *) 0xE0008030))
+#define T1CR2 (*((volatile unsigned long *) 0xE0008034))
+#define T1CR3 (*((volatile unsigned long *) 0xE0008038))
+#define T1EMR (*((volatile unsigned long *) 0xE000803C))
+#define T1CTCR (*((volatile unsigned long *) 0xE0008070))
+
+/* Pulse Width Modulator (PWM) */
+#define PWMIR (*((volatile unsigned long *) 0xE0014000))
+#define PWMTCR (*((volatile unsigned long *) 0xE0014004))
+#define PWMTC (*((volatile unsigned long *) 0xE0014008))
+#define PWMPR (*((volatile unsigned long *) 0xE001400C))
+#define PWMPC (*((volatile unsigned long *) 0xE0014010))
+#define PWMMCR (*((volatile unsigned long *) 0xE0014014))
+#define PWMMR0 (*((volatile unsigned long *) 0xE0014018))
+#define PWMMR1 (*((volatile unsigned long *) 0xE001401C))
+#define PWMMR2 (*((volatile unsigned long *) 0xE0014020))
+#define PWMMR3 (*((volatile unsigned long *) 0xE0014024))
+#define PWMMR4 (*((volatile unsigned long *) 0xE0014040))
+#define PWMMR5 (*((volatile unsigned long *) 0xE0014044))
+#define PWMMR6 (*((volatile unsigned long *) 0xE0014048))
+#define PWMPCR (*((volatile unsigned long *) 0xE001404C))
+#define PWMLER (*((volatile unsigned long *) 0xE0014050))
+
+/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
+#define U0RBR (*((volatile unsigned char *) 0xE000C000))
+#define U0THR (*((volatile unsigned char *) 0xE000C000))
+#define U0IER (*((volatile unsigned long *) 0xE000C004))
+#define U0IIR (*((volatile unsigned long *) 0xE000C008))
+#define U0FCR (*((volatile unsigned char *) 0xE000C008))
+#define U0LCR (*((volatile unsigned char *) 0xE000C00C))
+#define U0MCR (*((volatile unsigned char *) 0xE000C010))
+#define U0LSR (*((volatile unsigned char *) 0xE000C014))
+#define U0MSR (*((volatile unsigned char *) 0xE000C018))
+#define U0SCR (*((volatile unsigned char *) 0xE000C01C))
+#define U0DLL (*((volatile unsigned char *) 0xE000C000))
+#define U0DLM (*((volatile unsigned char *) 0xE000C004))
+#define U0ACR (*((volatile unsigned long *) 0xE000C020))
+#define U0FDR (*((volatile unsigned long *) 0xE000C028))
+#define U0TER (*((volatile unsigned char *) 0xE000C030))
+
+/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
+#define U1RBR (*((volatile unsigned char *) 0xE0010000))
+#define U1THR (*((volatile unsigned char *) 0xE0010000))
+#define U1IER (*((volatile unsigned long *) 0xE0010004))
+#define U1IIR (*((volatile unsigned long *) 0xE0010008))
+#define U1FCR (*((volatile unsigned char *) 0xE0010008))
+#define U1LCR (*((volatile unsigned char *) 0xE001000C))
+#define U1MCR (*((volatile unsigned char *) 0xE0010010))
+#define U1LSR (*((volatile unsigned char *) 0xE0010014))
+#define U1MSR (*((volatile unsigned char *) 0xE0010018))
+#define U1SCR (*((volatile unsigned char *) 0xE001001C))
+#define U1DLL (*((volatile unsigned char *) 0xE0010000))
+#define U1DLM (*((volatile unsigned char *) 0xE0010004))
+#define U1ACR (*((volatile unsigned long *) 0xE0010020))
+#define U1FDR (*((volatile unsigned long *) 0xE0010028))
+#define U1TER (*((volatile unsigned char *) 0xE0010030))
+
+/* I2C Interface 0 */
+#define I2C0CONSET (*((volatile unsigned char *) 0xE001C000))
+#define I2C0STAT (*((volatile unsigned char *) 0xE001C004))
+#define I2C0DAT (*((volatile unsigned char *) 0xE001C008))
+#define I2C0ADR (*((volatile unsigned char *) 0xE001C00C))
+#define I2C0SCLH (*((volatile unsigned short*) 0xE001C010))
+#define I2C0SCLL (*((volatile unsigned short*) 0xE001C014))
+#define I2C0CONCLR (*((volatile unsigned char *) 0xE001C018))
+
+/* I2C Interface 1 */
+#define I2C1CONSET (*((volatile unsigned char *) 0xE005C000))
+#define I2C1STAT (*((volatile unsigned char *) 0xE005C004))
+#define I2C1DAT (*((volatile unsigned char *) 0xE005C008))
+#define I2C1ADR (*((volatile unsigned char *) 0xE005C00C))
+#define I2C1SCLH (*((volatile unsigned short*) 0xE005C010))
+#define I2C1SCLL (*((volatile unsigned short*) 0xE005C014))
+#define I2C1CONCLR (*((volatile unsigned char *) 0xE005C018))
+
+/* SPI0 (Serial Peripheral Interface 0) */
+#define S0SPCR (*((volatile unsigned short*) 0xE0020000))
+#define S0SPSR (*((volatile unsigned char *) 0xE0020004))
+#define S0SPDR (*((volatile unsigned short*) 0xE0020008))
+#define S0SPCCR (*((volatile unsigned char *) 0xE002000C))
+#define S0SPINT (*((volatile unsigned char *) 0xE002001C))
+
+/* SSP Controller (SPI1) */
+#define SSPCR0 (*((volatile unsigned short*) 0xE0068000))
+#define SSPCR1 (*((volatile unsigned char *) 0xE0068004))
+#define SSPDR (*((volatile unsigned short*) 0xE0068008))
+#define SSPSR (*((volatile unsigned char *) 0xE006800C))
+#define SSPCPSR (*((volatile unsigned char *) 0xE0068010))
+#define SSPIMSC (*((volatile unsigned char *) 0xE0068014))
+#define SSPRIS (*((volatile unsigned char *) 0xE0068018))
+#define SSPMIS (*((volatile unsigned char *) 0xE006801C))
+#define SSPICR (*((volatile unsigned char *) 0xE0068020))
+
+/* Real Time Clock */
+#define ILR (*((volatile unsigned char *) 0xE0024000))
+#define CTC (*((volatile unsigned short*) 0xE0024004))
+#define CCR (*((volatile unsigned char *) 0xE0024008))
+#define CIIR (*((volatile unsigned char *) 0xE002400C))
+#define AMR (*((volatile unsigned char *) 0xE0024010))
+#define CTIME0 (*((volatile unsigned long *) 0xE0024014))
+#define CTIME1 (*((volatile unsigned long *) 0xE0024018))
+#define CTIME2 (*((volatile unsigned long *) 0xE002401C))
+#define SEC (*((volatile unsigned char *) 0xE0024020))
+#define MIN (*((volatile unsigned char *) 0xE0024024))
+#define HOUR (*((volatile unsigned char *) 0xE0024028))
+#define DOM (*((volatile unsigned char *) 0xE002402C))
+#define DOW (*((volatile unsigned char *) 0xE0024030))
+#define DOY (*((volatile unsigned short*) 0xE0024034))
+#define MONTH (*((volatile unsigned char *) 0xE0024038))
+#define YEAR (*((volatile unsigned short*) 0xE002403C))
+#define ALSEC (*((volatile unsigned char *) 0xE0024060))
+#define ALMIN (*((volatile unsigned char *) 0xE0024064))
+#define ALHOUR (*((volatile unsigned char *) 0xE0024068))
+#define ALDOM (*((volatile unsigned char *) 0xE002406C))
+#define ALDOW (*((volatile unsigned char *) 0xE0024070))
+#define ALDOY (*((volatile unsigned short*) 0xE0024074))
+#define ALMON (*((volatile unsigned char *) 0xE0024078))
+#define ALYEAR (*((volatile unsigned short*) 0xE002407C))
+#define PREINT (*((volatile unsigned short*) 0xE0024080))
+#define PREFRAC (*((volatile unsigned short*) 0xE0024084))
+
+/* A/D Converter 0 (AD0) */
+#define AD0CR (*((volatile unsigned long *) 0xE0034000))
+#define AD0GDR (*((volatile unsigned long *) 0xE0034004))
+#define AD0STAT (*((volatile unsigned long *) 0xE0034030))
+#define AD0INTEN (*((volatile unsigned long *) 0xE003400C))
+#define AD0DR0 (*((volatile unsigned long *) 0xE0034010))
+#define AD0DR1 (*((volatile unsigned long *) 0xE0034014))
+#define AD0DR2 (*((volatile unsigned long *) 0xE0034018))
+#define AD0DR3 (*((volatile unsigned long *) 0xE003401C))
+#define AD0DR4 (*((volatile unsigned long *) 0xE0034020))
+#define AD0DR5 (*((volatile unsigned long *) 0xE0034024))
+#define AD0DR6 (*((volatile unsigned long *) 0xE0034028))
+#define AD0DR7 (*((volatile unsigned long *) 0xE003402C))
+
+/* A/D Converter 1 (AD1) */
+#define AD1CR (*((volatile unsigned long *) 0xE0060000))
+#define AD1GDR (*((volatile unsigned long *) 0xE0060004))
+#define AD1STAT (*((volatile unsigned long *) 0xE0060030))
+#define AD1INTEN (*((volatile unsigned long *) 0xE006000C))
+#define AD1DR0 (*((volatile unsigned long *) 0xE0060010))
+#define AD1DR1 (*((volatile unsigned long *) 0xE0060014))
+#define AD1DR2 (*((volatile unsigned long *) 0xE0060018))
+#define AD1DR3 (*((volatile unsigned long *) 0xE006001C))
+#define AD1DR4 (*((volatile unsigned long *) 0xE0060020))
+#define AD1DR5 (*((volatile unsigned long *) 0xE0060024))
+#define AD1DR6 (*((volatile unsigned long *) 0xE0060028))
+#define AD1DR7 (*((volatile unsigned long *) 0xE006002C))
+
+/* A/D Converter Global */
+#define ADGSR (*((volatile unsigned long *) 0xE0034008))
+
+/* D/A Converter */
+#define DACR (*((volatile unsigned long *) 0xE006C000))
+
+/* Watchdog */
+#define WDMOD (*((volatile unsigned char *) 0xE0000000))
+#define WDTC (*((volatile unsigned long *) 0xE0000004))
+#define WDFEED (*((volatile unsigned char *) 0xE0000008))
+#define WDTV (*((volatile unsigned long *) 0xE000000C))
+
+/* USB Controller */
+#define USBIntSt (*((volatile unsigned long *) 0xE01FC1C0))
+#define USBDevIntSt (*((volatile unsigned long *) 0xE0090000))
+#define USBDevIntEn (*((volatile unsigned long *) 0xE0090004))
+#define USBDevIntClr (*((volatile unsigned long *) 0xE0090008))
+#define USBDevIntSet (*((volatile unsigned long *) 0xE009000C))
+#define USBDevIntPri (*((volatile unsigned char *) 0xE009002C))
+#define USBEpIntSt (*((volatile unsigned long *) 0xE0090030))
+#define USBEpIntEn (*((volatile unsigned long *) 0xE0090034))
+#define USBEpIntClr (*((volatile unsigned long *) 0xE0090038))
+#define USBEpIntSet (*((volatile unsigned long *) 0xE009003C))
+#define USBEpIntPri (*((volatile unsigned long *) 0xE0090040))
+#define USBReEp (*((volatile unsigned long *) 0xE0090044))
+#define USBEpInd (*((volatile unsigned long *) 0xE0090048))
+#define USBMaxPSize (*((volatile unsigned long *) 0xE009004C))
+#define USBRxData (*((volatile unsigned long *) 0xE0090018))
+#define USBRxPLen (*((volatile unsigned long *) 0xE0090020))
+#define USBTxData (*((volatile unsigned long *) 0xE009001C))
+#define USBTxPLen (*((volatile unsigned long *) 0xE0090024))
+#define USBCtrl (*((volatile unsigned long *) 0xE0090028))
+#define USBCmdCode (*((volatile unsigned long *) 0xE0090010))
+#define USBCmdData (*((volatile unsigned long *) 0xE0090014))
+#define USBDMARSt (*((volatile unsigned long *) 0xE0090050))
+#define USBDMARClr (*((volatile unsigned long *) 0xE0090054))
+#define USBDMARSet (*((volatile unsigned long *) 0xE0090058))
+#define USBUDCAH (*((volatile unsigned long *) 0xE0090080))
+#define USBEpDMASt (*((volatile unsigned long *) 0xE0090084))
+#define USBEpDMAEn (*((volatile unsigned long *) 0xE0090088))
+#define USBEpDMADis (*((volatile unsigned long *) 0xE009008C))
+#define USBDMAIntSt (*((volatile unsigned long *) 0xE0090090))
+#define USBDMAIntEn (*((volatile unsigned long *) 0xE0090094))
+#define USBEoTIntSt (*((volatile unsigned long *) 0xE00900A0))
+#define USBEoTIntClr (*((volatile unsigned long *) 0xE00900A4))
+#define USBEoTIntSet (*((volatile unsigned long *) 0xE00900A8))
+#define USBNDDRIntSt (*((volatile unsigned long *) 0xE00900AC))
+#define USBNDDRIntClr (*((volatile unsigned long *) 0xE00900B0))
+#define USBNDDRIntSet (*((volatile unsigned long *) 0xE00900B4))
+#define USBSysErrIntSt (*((volatile unsigned long *) 0xE00900B8))
+#define USBSysErrIntClr (*((volatile unsigned long *) 0xE00900BC))
+#define USBSysErrIntSet (*((volatile unsigned long *) 0xE00900C0))
+
+#endif // __LPC214x_H
diff --git a/poc/lpc2148_blinky/main.c b/poc/lpc2148_blinky/main.c
new file mode 100644
index 0000000..09a0f11
--- /dev/null
+++ b/poc/lpc2148_blinky/main.c
@@ -0,0 +1,37 @@
+#include "lpc214x.h"
+#include "startup.h"
+#include "console.h"
+
+#define BAUD_RATE 115200
+
+
+void delay_ms (int count){
+ int i;
+ count *= 3000;
+ for (i = 0; i < count; i++) {
+ asm volatile ("nop");
+ }
+}
+
+int main(void)
+{
+ unsigned int i;
+ Initialize();
+ ConsoleInit(60000000 / (16 * BAUD_RATE));
+ puts("Init done\n");
+ IODIR0 |= 1 << 10; // P0.10 is an output
+ IODIR0 |= 1 << 11; // P0.10 is an output
+ IOSET0 = 1 << 10; //LED off
+ IOSET0 = 1 << 11; //LED off
+
+ while (1) {
+ delay_ms(1000);
+ IOSET0 = 1 << 10; //LED off
+ IOCLR0 = 1 << 11; //LED on
+ puts("led1: off led2: on\n");
+ delay_ms(1000);
+ IOCLR0 = 1 << 10; //LED on
+ IOSET0 = 1 << 11; //LED off
+ puts("led1: on led2: off\n");
+ }
+}
diff --git a/poc/lpc2148_blinky/openocd_ftdi02.cfg b/poc/lpc2148_blinky/openocd_ftdi02.cfg
new file mode 100644
index 0000000..c321458
--- /dev/null
+++ b/poc/lpc2148_blinky/openocd_ftdi02.cfg
@@ -0,0 +1,35 @@
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_device_desc "Lockenkopf v.2 A"
+ft2232_layout usbjtag
+ft2232_vid_pid 0x0403 0x6010
+jtag_speed 3
+jtag_nsrst_delay 800
+jtag_ntrst_delay 800
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst srst_pulls_trst
+
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+
+#target configuration
+daemon_startup reset
+
+#target
+#target arm7tdmi
+target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
+run_and_halt_time 0 30
+
+working_area 0 0x40000000 0x40000 nobackup
+
+#flash configur on
+#flash bank lpc2000 0x0 0x40000 0 0 lpc2000_v2 0 12000 calc_checksum
+#flash bank lpc2000 0x0 0x04000 0 0 lpc2000_v2 0 12000 calc_checksum
+flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v2 12000 calc_checksum
+
diff --git a/poc/lpc2148_blinky/openocd_mac.sh b/poc/lpc2148_blinky/openocd_mac.sh
new file mode 100755
index 0000000..fc54ebc
--- /dev/null
+++ b/poc/lpc2148_blinky/openocd_mac.sh
@@ -0,0 +1,4 @@
+#!/bin/sh
+set -x
+/Users/david/Devel/arch/openocd/bin/openocd_r520_mac -f /Users/david/Devel/arch/arm/openocd_ftdi02.cfg -d 0
+
diff --git a/poc/lpc2148_blinky/pics/small_console.png b/poc/lpc2148_blinky/pics/small_console.png
new file mode 100644
index 0000000..b7f0735
Binary files /dev/null and b/poc/lpc2148_blinky/pics/small_console.png differ
diff --git a/poc/lpc2148_blinky/pics/small_dsc01985.jpg b/poc/lpc2148_blinky/pics/small_dsc01985.jpg
new file mode 100644
index 0000000..e4a026c
Binary files /dev/null and b/poc/lpc2148_blinky/pics/small_dsc01985.jpg differ
diff --git a/poc/lpc2148_blinky/pics/small_prog.png b/poc/lpc2148_blinky/pics/small_prog.png
new file mode 100644
index 0000000..a5d2bd5
Binary files /dev/null and b/poc/lpc2148_blinky/pics/small_prog.png differ
diff --git a/poc/lpc2148_blinky/run.ocd b/poc/lpc2148_blinky/run.ocd
new file mode 100644
index 0000000..f56e73c
--- /dev/null
+++ b/poc/lpc2148_blinky/run.ocd
@@ -0,0 +1,6 @@
+halt
+wait_halt
+sleep 10
+poll
+load_binary /home/david/devel/arch/arm/code/blink2148/main.bin 0x40000200
+resume 0x40000200
diff --git a/poc/lpc2148_blinky/startup.c b/poc/lpc2148_blinky/startup.c
new file mode 100644
index 0000000..58d96df
--- /dev/null
+++ b/poc/lpc2148_blinky/startup.c
@@ -0,0 +1,115 @@
+/*
+ Initialisation functions for exception handlers, PLL and MAM
+
+ Partially copied from Jim Lynch's tutorial
+*/
+
+/**********************************************************
+ Header files
+ **********************************************************/
+
+#include "startup.h"
+
+#define MAMCR *(volatile unsigned int *)0xE01FC000
+#define MAMTIM *(volatile unsigned int *)0xE01FC004
+
+#define PLLCON *(volatile unsigned int *)0xE01FC080
+#define PLLCFG *(volatile unsigned int *)0xE01FC084
+#define PLLSTAT *(volatile unsigned int *)0xE01FC088
+#define PLLFEED *(volatile unsigned int *)0xE01FC08C
+
+#define VPBDIV *(volatile unsigned int *)0xE01FC100
+void IRQ_Routine(void) __attribute__ ((interrupt("IRQ")));
+void FIQ_Routine(void) __attribute__ ((interrupt("FIQ")));
+void SWI_Routine(void) __attribute__ ((interrupt("SWI")));
+void UNDEF_Routine(void) __attribute__ ((interrupt("UNDEF")));
+
+/* Stubs for various interrupts (may be replaced later) */
+/* ---------------------------------------------------- */
+void IRQ_Routine(void)
+{
+ while (1);
+}
+void FIQ_Routine(void)
+{
+ while (1);
+}
+void SWI_Routine(void)
+{
+ while (1);
+}
+void UNDEF_Routine(void)
+{
+ while (1);
+}
+
+
+/**********************************************************
+ Initialize
+**********************************************************/
+
+#define PLOCK 0x400
+static void feed(void)
+{
+ PLLFEED = 0xAA;
+ PLLFEED = 0x55;
+} void Initialize(void)
+{
+
+ // Setting the Phased Lock Loop (PLL)
+ // ----------------------------------
+ //
+ // Olimex LPC-P2148 has a 12.0000 mhz crystal
+ //
+ // We'd like the LPC2148 to run at 60 mhz (has to be an even multiple of crystal)
+ //
+ // According to the Philips LPC2148 manual: M = cclk / Fosc where: M = PLL multiplier (bits 0-4 of PLLCFG)
+ // cclk = 60000000 hz
+ // Fosc = 12000000 hz
+ //
+ // Solving: M = 60000000 / 12000000 = 5
+ //
+ // Note: M - 1 must be entered into bits 0-4 of PLLCFG (assign 4 to these bits)
+ //
+ //
+ // The Current Controlled Oscilator (CCO) must operate in the range 156 mhz to 320 mhz
+ //
+ // According to the Philips LPC2148 manual: Fcco = cclk * 2 * P where: Fcco = CCO frequency
+ // cclk = 60000000 hz
+ // P = PLL divisor (bits 5-6 of PLLCFG)
+ //
+ // Solving: Fcco = 60000000 * 2 * P
+ // P = 2 (trial value)
+ // Fcco = 60000000 * 2 * 2
+ // Fcc0 = 240000000 hz (good choice for P since it's within the 156 mhz to 320 mhz range)
+ //
+ // From Table 22 (page 34) of Philips LPC2148 manual P = 2, PLLCFG bits 5-6 = 1 (assign 1 to these bits)
+ //
+ // Finally: PLLCFG = 0 01 00100 = 0x24
+ //
+ // Final note: to load PLLCFG register, we must use the 0xAA followed 0x55 write sequence to the PLLFEED register
+ // this is done in the short function feed() below
+ //
+
+ // Setting Multiplier and Divider values
+ PLLCFG = 0x24;
+ feed();
+
+ // Enabling the PLL */
+ PLLCON = 0x1;
+ feed();
+
+ // Wait for the PLL to lock to set frequency
+ while (!(PLLSTAT & PLOCK));
+
+ // Connect the PLL as the clock source
+ PLLCON = 0x3;
+ feed();
+
+ // Enabling MAM and setting number of clocks used for Flash memory fetch
+ MAMTIM = 0x3;
+ MAMCR = 0x2;
+
+ // Setting peripheral Clock (pclk) to System Clock (cclk)
+ VPBDIV = 0x1;
+}
diff --git a/poc/lpc2148_blinky/startup.h b/poc/lpc2148_blinky/startup.h
new file mode 100644
index 0000000..9c414b3
--- /dev/null
+++ b/poc/lpc2148_blinky/startup.h
@@ -0,0 +1 @@
+void Initialize(void);
diff --git a/poc/lpc2148_blinky/upload.ocd b/poc/lpc2148_blinky/upload.ocd
new file mode 100644
index 0000000..6e57080
--- /dev/null
+++ b/poc/lpc2148_blinky/upload.ocd
@@ -0,0 +1,6 @@
+halt
+wait_halt
+sleep 10
+poll
+load_binary /Users/david/Devel/arch/arm/code/blink2148/main.bin 0x40000200
+resume 0x40000200