o crc checking rom
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optixx
240
snes/crc/StartupSnes.asm
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240
snes/crc/StartupSnes.asm
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; SNES ROM startup code
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;******************************************************************************
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;*** Define a special section in case most of the code is not in bank 0. ***
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;******************************************************************************
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;STACK EQU $01ff ;CHANGE THIS FOR YOUR SYSTEM
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;STARTUP SECTION OFFSET $008000
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CODE
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XDEF START
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START:
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XREF __main
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sei ; Disabled interrupts
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clc ; clear carry to switch to native mode
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xce ; Xchange carry & emulation bit. native mode
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rep #$18 ; Binary mode (decimal mode off), X/Y 16 bit
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LONGI ON
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ldx #$1FFF ; set stack to $1FFF
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txs
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rep #$30
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longa on
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longi on
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; Init data used for heap
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; see heap definition below
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XREF ___heap_top
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XREF ___mem_start
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stz ___heap_top
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stz ___mem_start
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XREF __preInit
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jsr >__preInit
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sep #$30 ; X,Y,A are 8 bit numbers
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LONGA OFF
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LONGI OFF
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lda #$8F ; screen off, full brightness
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sta $2100 ; brightness + screen enable register
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stz $2101 ; Sprite register (size + address in VRAM)
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stz $2102 ; Sprite registers (address of sprite memory [OAM])
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stz $2103 ; "" ""
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stz $2105 ; Mode 0, = Graphic mode register
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stz $2106 ; noplanes, no mosaic, = Mosaic register
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stz $2107 ; Plane 0 map VRAM location
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stz $2108 ; Plane 1 map VRAM location
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stz $2109 ; Plane 2 map VRAM location
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stz $210A ; Plane 3 map VRAM location
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stz $210B ; Plane 0+1 Tile data location
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stz $210C ; Plane 2+3 Tile data location
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stz $210D ; Plane 0 scroll x (first 8 bits)
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stz $210D ; Plane 0 scroll x (last 3 bits) #$0 - #$07ff
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stz $210E ; Plane 0 scroll y (first 8 bits)
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stz $210E ; Plane 0 scroll y (last 3 bits) #$0 - #$07ff
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stz $210F ; Plane 1 scroll x (first 8 bits)
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stz $210F ; Plane 1 scroll x (last 3 bits) #$0 - #$07ff
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stz $2110 ; Plane 1 scroll y (first 8 bits)
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stz $2110 ; Plane 1 scroll y (last 3 bits) #$0 - #$07ff
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stz $2111 ; Plane 2 scroll x (first 8 bits)
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stz $2111 ; Plane 2 scroll x (last 3 bits) #$0 - #$07ff
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stz $2112 ; Plane 2 scroll y (first 8 bits)
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stz $2112 ; Plane 2 scroll y (last 3 bits) #$0 - #$07ff
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stz $2113 ; Plane 3 scroll x (first 8 bits)
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stz $2113 ; Plane 3 scroll x (last 3 bits) #$0 - #$07ff
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stz $2114 ; Plane 3 scroll y (first 8 bits)
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stz $2114 ; Plane 3 scroll y (last 3 bits) #$0 - #$07ff
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lda #$80 ; increase VRAM address after writing to $2119
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sta $2115 ; VRAM address increment register
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stz $2116 ; VRAM address low
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stz $2117 ; VRAM address high
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stz $211A ; Initial Mode 7 setting register
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stz $211B ; Mode 7 matrix parameter A register (low)
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lda #$01
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sta $211B ; Mode 7 matrix parameter A register (high)
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stz $211C ; Mode 7 matrix parameter B register (low)
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stz $211C ; Mode 7 matrix parameter B register (high)
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stz $211D ; Mode 7 matrix parameter C register (low)
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stz $211D ; Mode 7 matrix parameter C register (high)
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stz $211E ; Mode 7 matrix parameter D register (low)
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sta $211E ; Mode 7 matrix parameter D register (high)
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stz $211F ; Mode 7 center position X register (low)
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stz $211F ; Mode 7 center position X register (high)
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stz $2120 ; Mode 7 center position Y register (low)
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stz $2120 ; Mode 7 center position Y register (high)
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stz $2121 ; Color number register ($0-ff)
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stz $2123 ; BG1 & BG2 Window mask setting register
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stz $2124 ; BG3 & BG4 Window mask setting register
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stz $2125 ; OBJ & Color Window mask setting register
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stz $2126 ; Window 1 left position register
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stz $2127 ; Window 2 left position register
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stz $2128 ; Window 3 left position register
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stz $2129 ; Window 4 left position register
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stz $212A ; BG1, BG2, BG3, BG4 Window Logic register
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stz $212B ; OBJ, Color Window Logic Register (or,and,xor,xnor)
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sta $212C ; Main Screen designation (planes, sprites enable)
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stz $212D ; Sub Screen designation
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stz $212E ; Window mask for Main Screen
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stz $212F ; Window mask for Sub Screen
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lda #$30
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sta $2130 ; Color addition & screen addition init setting
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stz $2131 ; Add/Sub sub designation for screen, sprite, color
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lda #$E0
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sta $2132 ; color data for addition/subtraction
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stz $2133 ; Screen setting (interlace x,y/enable SFX data)
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stz $4200 ; Enable V-blank, interrupt, Joypad register
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lda #$FF
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sta $4201 ; Programmable I/O port
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stz $4202 ; Multiplicand A
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stz $4203 ; Multiplier B
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stz $4204 ; Multiplier C
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stz $4205 ; Multiplicand C
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stz $4206 ; Divisor B
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stz $4207 ; Horizontal Count Timer
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stz $4208 ; Horizontal Count Timer MSB (most significant bit)
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stz $4209 ; Vertical Count Timer
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stz $420A ; Vertical Count Timer MSB
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stz $420B ; General DMA enable (bits 0-7)
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stz $420C ; Horizontal DMA (HDMA) enable (bits 0-7)
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stz $420D ; Access cycle designation (slow/fast rom)
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cli ; Enable interrupts
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rep #$30
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longa on
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longi on
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jsr >__main
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brk
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XDEF IRQ
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IRQ:
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XREF __IRQHandler
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LONGA ON
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LONGI ON
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rep #$30
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pha
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phx
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phy
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jsr __IRQHandler
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ply
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plx
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pla
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rti
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XDEF NMI
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NMI:
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XREF __NMIHandler
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LONGA ON
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LONGI ON
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rep #$30
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pha
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phx
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phy
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phd
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phb
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lda #$0000
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sep #$30 ; X,Y,A are 8 bit numbers
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LONGA OFF
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LONGI OFF
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lda $4210 ; Read NMI
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LONGA ON
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LONGI ON
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rep #$30
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jsr __NMIHandler
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plb
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pld
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ply
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plx
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pla
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rti
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DIRQ:
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rti
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ENDS
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;******************************************************************************
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;*** Heap definition ***
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;******************************************************************************
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DATA
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XDEF __heap_start
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XDEF __heap_end
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__heap_start:
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WORD $1000
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__heap_end:
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WORD $1200
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;******************************************************************************
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;*** SNES ROM Registartion Data ***
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;******************************************************************************
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REGISTRATION_DATA SECTION
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MAKER_CODE FCC /FF/
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GAME_CODE FCC /SMWJ/
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FIXED_VALUE0 BYTE $00, $00, $00, $00, $00, $00, $00
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EXPANSION_RAM_SIZE BYTE $00
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SPECIAL_VERSION BYTE $00
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CARTRIDGE_TYPE_SUB BYTE $00
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GAME_TITLE FCC /GAME TITLE !/
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;012345678901234567890;
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MAP_MODE BYTE $20
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CARTRIDGE_SIZE BYTE $00
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ROM_SIZE BYTE $08
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RAM_SIZE BYTE $00
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DESTINATION_CODE BYTE $00
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FIXED_VALUE1 BYTE $33
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MASK_ROM_VERSION BYTE $00
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COMPLEMENT_CHECK BYTE $00, $00
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CHEKSUM BYTE $00, $00
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;******************************************************************************
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;*** SNES Interrupts and Reset vector ***
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;******************************************************************************
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VECTORS SECTION
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; Native vector
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N_COP DW DIRQ
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N_BRK DW DIRQ
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N_ABORT DW DIRQ
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N_NMI DW NMI
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N_RSRVD DW DIRQ
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N_IRQ DW IRQ
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DS 4
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; Emulation vector
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E_COP DW DIRQ
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E_RSRVD DW DIRQ
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E_ABORT DW DIRQ
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E_NMI DW DIRQ
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E_RESET DW START
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E_IRQ DW DIRQ
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END
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