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crc checks working, simple uploads working

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This commit is contained in:
David Voswinkel 2009-06-30 23:04:24 +02:00
parent 77d9418cee
commit 656192fc14
6 changed files with 53 additions and 46 deletions
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BIN
avr/usbload/commandline/snesuploader
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74
avr/usbload/commandline/snesuploader.c
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@ -17,7 +17,6 @@
#define READ_BUFFER_SIZE (1024 * 32) #define READ_BUFFER_SIZE (1024 * 32)
#define SEND_BUFFER_SIZE 128 #define SEND_BUFFER_SIZE 128
#define BUFFER_CRC (1024 * 32)
#define BANK_SIZE (1<<15) #define BANK_SIZE (1<<15)
#define BANK_SIZE_SHIFT 15 #define BANK_SIZE_SHIFT 15
@ -119,20 +118,19 @@ int main(int argc, char **argv)
USB_CFG_DEVICE_ID}; USB_CFG_DEVICE_ID};
char vendor[] = { USB_CFG_VENDOR_NAME, 0 }, product[] = { char vendor[] = { USB_CFG_VENDOR_NAME, 0 }, product[] = {
USB_CFG_DEVICE_NAME, 0}; USB_CFG_DEVICE_NAME, 0};
int cnt, int cnt, vid, pid;
vid,
pid;
int cnt_crc = 0;
uint8_t *read_buffer; uint8_t *read_buffer;
uint8_t *crc_buffer; uint8_t *crc_buffer;
uint8_t *ptr;
uint32_t addr = 0; uint32_t addr = 0;
uint16_t addr_lo = 0; uint16_t addr_lo = 0;
uint16_t addr_hi = 0; uint16_t addr_hi = 0;
uint16_t step = 0; uint16_t step = 0;
uint16_t crc = 0; uint16_t crc = 0;
uint8_t bank = 0; uint8_t bank = 0;
FILE *fp; FILE *fp;
usb_init(); usb_init();
if (argc < 2) { /* we need at least one argument */ if (argc < 2) { /* we need at least one argument */
usage(argv[0]); usage(argv[0]);
@ -167,58 +165,64 @@ int main(int argc, char **argv)
exit(1); exit(1);
} }
read_buffer = (unsigned char *) malloc(READ_BUFFER_SIZE); read_buffer = (unsigned char *) malloc(READ_BUFFER_SIZE);
crc_buffer = (unsigned char *) malloc(BUFFER_CRC); crc_buffer = (unsigned char *) malloc(0x1000);
memset(crc_buffer, 0, BUFFER_CRC); memset(crc_buffer, 0, 0x1000);
addr = 0x000000; addr = 0x000000;
usb_control_msg(handle, cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_OUT, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_OUT,
USB_UPLOAD_INIT, BANK_SIZE_SHIFT , 0, NULL, 0, 5000); USB_UPLOAD_INIT, BANK_SIZE_SHIFT , 0, NULL, 0, 5000);
if (cnt < 0) {
fprintf(stderr, "USB error: %s\n", usb_strerror());
usb_close(handle);
exit(-1);
}
ptr = crc_buffer;
while ((cnt = fread(read_buffer, READ_BUFFER_SIZE, 1, fp)) > 0) { while ((cnt = fread(read_buffer, READ_BUFFER_SIZE, 1, fp)) > 0) {
for (step = 0; step <= READ_BUFFER_SIZE; step += SEND_BUFFER_SIZE) { ptr = crc_buffer;
for (step = 0; step < READ_BUFFER_SIZE; step += SEND_BUFFER_SIZE) {
addr_lo = addr & 0xffff; addr_lo = addr & 0xffff;
addr_hi = (addr >> 16) & 0xff; addr_hi = (addr >> 16) & 0x00ff;
cnt = usb_control_msg(handle, cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_UPLOAD_ADDR, addr_hi, USB_ENDPOINT_OUT, USB_UPLOAD_ADDR, addr_hi,
addr_lo, (char *) read_buffer + step, addr_lo, (char *) read_buffer + step,
SEND_BUFFER_SIZE, 5000); SEND_BUFFER_SIZE, 5000);
if (addr%0x1000==0){
printf ("bank=0x%02x addr=0x%08x\n", bank, addr);
}
if (cnt < 0) { if (cnt < 0) {
fprintf(stderr, "USB error: %s\n", usb_strerror()); fprintf(stderr, "USB error: %s\n", usb_strerror());
usb_close(handle); usb_close(handle);
exit(-1); exit(-1);
} }
memcpy(ptr, read_buffer + step, SEND_BUFFER_SIZE);
addr += SEND_BUFFER_SIZE; addr += SEND_BUFFER_SIZE;
//break; ptr += SEND_BUFFER_SIZE;
if ( addr % 0x1000 == 0){
crc = do_crc(crc_buffer, 0x1000);
printf ("bank=0x%02x addr=0x%08x addr=0x%08x crc=0x%04x\n", bank, addr - 0x1000, addr, crc);
ptr = crc_buffer;
if ( addr % 0x8000 == 0) {
bank++;
}
}
} }
//dump_packet(0x00000,SEND_BUFFER_SIZE, read_buffer); if (bank == 1)
memcpy(crc_buffer + cnt_crc, read_buffer, READ_BUFFER_SIZE);
cnt_crc += READ_BUFFER_SIZE;
if (cnt_crc >= READ_BUFFER_SIZE) {
crc = do_crc(crc_buffer, READ_BUFFER_SIZE);
printf ("bank=0x%02x crc=0x%04x\n", bank, crc);
memset(crc_buffer, 0, BUFFER_CRC);
bank++;
cnt_crc = 0;
break; break;
}
//break;
} }
bank = 0;
fseek(fp, 0, SEEK_SET);
while ((cnt = fread(read_buffer, READ_BUFFER_SIZE, 1, fp)) > 0) {
printf ("bank=0x%02x crc=0x%04x\n", bank++,
do_crc(read_buffer, READ_BUFFER_SIZE));
}
fclose(fp);
/*
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_CRC, addr_hi, addr_lo, NULL,
0, 5000);
*/
cnt = usb_control_msg(handle, cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_SNES_BOOT, 0, 0, NULL, USB_ENDPOINT_OUT, USB_SNES_BOOT, 0, 0, NULL,

1
avr/usbload/config.h
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@ -8,6 +8,7 @@
#define DEBUG_SRAM 8 #define DEBUG_SRAM 8
#define DEBUG_SRAM_RAW 16 #define DEBUG_SRAM_RAW 16
#define DEBUG_SREG 32 #define DEBUG_SREG 32
#define DEBUG_CRC 64
#define REQ_STATUS_IDLE 0x01 #define REQ_STATUS_IDLE 0x01
#define REQ_STATUS_UPLOAD 0x02 #define REQ_STATUS_UPLOAD 0x02

12
avr/usbload/crc.c
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@ -5,6 +5,7 @@
#include "uart.h" #include "uart.h"
#include "config.h" #include "config.h"
#include "sram.h" #include "sram.h"
#include "debug.h"
extern FILE uart_stdout; extern FILE uart_stdout;
@ -48,12 +49,13 @@ uint16_t crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr)
uint32_t addr = 0; uint32_t addr = 0;
uint8_t req_bank = 0; uint8_t req_bank = 0;
sram_bulk_read_start(bottom_addr); sram_bulk_read_start(bottom_addr);
printf("crc_check_bulk_memory: bottom_addr=0x%08lx top_addr=0x%08lx\n",
bottom_addr, top_addr); //debug(DEBUG_CRC,"crc_check_bulk_memory: bottom_addr=0x%08lx top_addr=0x%08lx\n",
// bottom_addr, top_addr);
for (addr = bottom_addr; addr < top_addr; addr++) { for (addr = bottom_addr; addr < top_addr; addr++) {
if (addr && addr % 0x8000 == 0) { if (addr && addr % 0x8000 == 0) {
printf("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n", debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
req_bank,addr,crc); req_bank,addr,crc);
req_bank++; req_bank++;
crc = 0; crc = 0;
@ -62,7 +64,7 @@ uint16_t crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr)
sram_bulk_read_next(); sram_bulk_read_next();
} }
if (addr % 0x8000 == 0) if (addr % 0x8000 == 0)
printf("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n", debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
req_bank,addr,crc); req_bank,addr,crc);
sram_bulk_read_end(); sram_bulk_read_end();
return crc; return crc;
@ -77,7 +79,7 @@ void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint8_t *buffer)
uint8_t req_bank = 0; uint8_t req_bank = 0;
for (addr = bottom_addr; addr < top_addr; addr += TRANSFER_BUFFER_SIZE) { for (addr = bottom_addr; addr < top_addr; addr += TRANSFER_BUFFER_SIZE) {
if (addr && addr % 0x8000 == 0) { if (addr && addr % 0x8000 == 0) {
printf("crc_check_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n", debug(DEBUG_CRC,"crc_check_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
req_bank,addr,crc); req_bank,addr,crc);
req_bank++; req_bank++;
crc = 0; crc = 0;

8
avr/usbload/main.c
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@ -18,7 +18,7 @@
extern FILE uart_stdout; extern FILE uart_stdout;
uint8_t debug_level = ( DEBUG | DEBUG_USB); uint8_t debug_level = ( DEBUG | DEBUG_USB | DEBUG_CRC );
uint8_t read_buffer[TRANSFER_BUFFER_SIZE]; uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
uint32_t req_addr = 0; uint32_t req_addr = 0;
@ -75,10 +75,10 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
rx_remaining = rq->wLength.word; rx_remaining = rq->wLength.word;
ret_len = USB_MAX_TRANS; ret_len = USB_MAX_TRANS;
if (req_addr && (req_addr % 0x1000) == 0) { if (req_addr && (req_addr % 0x1000) == 0) {
debug(DEBUG_USB,"USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx\n", debug(DEBUG_USB,"USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx crc=%04x\n",
req_bank, req_addr); req_bank, req_addr,crc_check_bulk_memory(req_addr - 0x1000,req_addr));
crc_check_bulk_memory(req_addr - 0x1000,req_addr);
} }
if (req_addr && req_addr % req_bank_size == 0) { if (req_addr && req_addr % req_bank_size == 0) {

4
avr/usbload/usbconfig.h
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@ -105,7 +105,7 @@ section at the end of this file).
* (e.g. HID), but never want to send any data. This option saves a couple * (e.g. HID), but never want to send any data. This option saves a couple
* of bytes in flash memory and the transmit buffers in RAM. * of bytes in flash memory and the transmit buffers in RAM.
*/ */
#define USB_CFG_INTR_POLL_INTERVAL 10 #define USB_CFG_INTR_POLL_INTERVAL 200
/* If you compile a version with endpoint 1 (interrupt-in), this is the poll /* If you compile a version with endpoint 1 (interrupt-in), this is the poll
* interval. The value is in milliseconds and must not be less than 10 ms for * interval. The value is in milliseconds and must not be less than 10 ms for
* low speed devices. * low speed devices.
@ -114,7 +114,7 @@ section at the end of this file).
/* Define this to 1 if the device has its own power supply. Set it to 0 if the /* Define this to 1 if the device has its own power supply. Set it to 0 if the
* device is powered from the USB bus. * device is powered from the USB bus.
*/ */
#define USB_CFG_MAX_BUS_POWER 200 #define USB_CFG_MAX_BUS_POWER 300
/* Set this variable to the maximum USB bus power consumption of your device. /* Set this variable to the maximum USB bus power consumption of your device.
* The value is in milliamperes. [It will be divided by two since USB * The value is in milliamperes. [It will be divided by two since USB
* communicates power requirements in units of 2 mA.] * communicates power requirements in units of 2 mA.]