From 74312e08e126f37b7a357c05024afab5d48901bf Mon Sep 17 00:00:00 2001
From: optixx <david@optixx.org>
Date: Mon, 20 Apr 2009 21:44:14 +0200
Subject: [PATCH] o add bank test o cleanup bank debug in uploaded o add header
 dump to uploader

---
 poc/avr_sdcard/Makefile        |   2 +-
 poc/avr_sdcard/main.c          |  27 +++-
 snes/banktest/LoadGraphics.asm | 143 ++++++++++++++++++
 snes/banktest/Makefile         |  33 +++++
 snes/banktest/header.inc       |  61 ++++++++
 snes/banktest/init.inc         | 262 +++++++++++++++++++++++++++++++++
 snes/banktest/optixx.inc       | 169 +++++++++++++++++++++
 snes/banktest/optixx.pcx       | Bin 0 -> 1964 bytes
 snes/banktest/vram2.asm        |  91 ++++++++++++
 9 files changed, 781 insertions(+), 7 deletions(-)
 create mode 100644 snes/banktest/LoadGraphics.asm
 create mode 100644 snes/banktest/Makefile
 create mode 100644 snes/banktest/header.inc
 create mode 100644 snes/banktest/init.inc
 create mode 100644 snes/banktest/optixx.inc
 create mode 100644 snes/banktest/optixx.pcx
 create mode 100644 snes/banktest/vram2.asm

diff --git a/poc/avr_sdcard/Makefile b/poc/avr_sdcard/Makefile
index 3e96b97..ef1d310 100644
--- a/poc/avr_sdcard/Makefile
+++ b/poc/avr_sdcard/Makefile
@@ -182,7 +182,7 @@ AVRDUDE_PROGRAMMER = stk500v2
 
 # com1 = serial port. Use lpt1 to connect to parallel port.
 
-AVRDUDE_PORT = /dev/tty.PL2303-00001124
+AVRDUDE_PORT = /dev/tty.PL2303-00002126
 
 AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
 
diff --git a/poc/avr_sdcard/main.c b/poc/avr_sdcard/main.c
index 67e1612..896bfa3 100644
--- a/poc/avr_sdcard/main.c
+++ b/poc/avr_sdcard/main.c
@@ -39,13 +39,20 @@ extern FILE uart_stdout;
 #define LED_PORT	PORTD
 #define LED_DIR		DDRD
 
-//#define FILENAME	"sprite.raw"
-//#define FILENAME	"ascii.smc"
-#define FILENAME	"rom.smc"
+//#define FILENAME	"sprite.raw" ok
+//#define FILENAME	"ascii.smc"  ok
+//#define FILENAME	"rom.smc"    ok
 //#define FILENAME	"supert.smc"
 //#define FILENAME	"vortex.smc"
 //#define FILENAME	"mrdo.smc"
 //#define FILENAME	"hungry.smc"
+//#define FILENAME	"bank01.smc" ok
+//#define FILENAME	"bank02.smc" ok
+//#define FILENAME	"bank03.smc" ok
+//#define FILENAME	"bank04.smc"
+//#define FILENAME	"bank05.smc"
+//#define FILENAME	"bank06.smc"
+#define FILENAME	"bank07.smc"
 
 #define DUMPNAME	"dump256.smc"
 #define BUFFER_SIZE 512
@@ -283,9 +290,10 @@ int main(void)
 
         for (uint16_t block_cnt=0; block_cnt<BLOCKS; block_cnt++) {
         	fat_read_file (fat_cluster,read_buffer,block_cnt);
-			if (block_cnt % 64 == 0){
-				bank_cnt++;
+			if (block_cnt && block_cnt % 64 == 0){
 				printf("Write Ram Bank: 0x%x Addr: 0x%lx Skipped: %li\n",bank_cnt,rom_addr,skip_block);
+				bank_cnt++;
+				skip_block=0;
 			}
 			if (sram_check(read_buffer,512))
 				sram_copy(rom_addr,read_buffer,512);
@@ -293,9 +301,16 @@ int main(void)
 				skip_block +=1;
 			rom_addr += 512;
         }
-		printf("Done 0x%lx Skipped %li\n",rom_addr,skip_block);
+		printf("Write Ram Bank: 0x%x Addr: 0x%lx Skipped: %li\n",bank_cnt,rom_addr,skip_block);
+		printf("Done\n");
 	}
 
+
+    printf("Dump Headern\r");
+    rom_addr = 0x8000-512;
+    sram_read_buffer(rom_addr,read_buffer,512);
+	dump_packet(rom_addr,512,read_buffer);
+
 #if 0
     printf("Dump Memory\n\r");
     rom_addr = 0x000000;
diff --git a/snes/banktest/LoadGraphics.asm b/snes/banktest/LoadGraphics.asm
new file mode 100644
index 0000000..3c0908a
--- /dev/null
+++ b/snes/banktest/LoadGraphics.asm
@@ -0,0 +1,143 @@
+;============================================================================
+; Macros
+;============================================================================
+
+;============================================================================
+;LoadPalette - Macro that loads palette information into CGRAM
+;----------------------------------------------------------------------------
+; In: SRC_ADDR -- 24 bit address of source data, 
+;     START -- Color # to start on, 
+;     SIZE -- # of COLORS to copy
+;---------------------------------------------------------------------------- 
+; Out: None
+;----------------------------------------------------------------------------
+; Modifies: A,X
+; Requires: mem/A = 8 bit, X/Y = 16 bit
+;----------------------------------------------------------------------------
+.MACRO LoadPalette
+    lda #\2
+    sta $2121       ; Start at START color
+    lda #:\1        ; Using : before the parameter gets its bank.
+    ldx #\1         ; Not using : gets the offset address.
+    ldy #(\3 * 2)   ; 2 bytes for every color
+    jsr DMAPalette
+.ENDM
+
+;============================================================================
+; LoadBlockToVRAM -- Macro that simplifies calling LoadVRAM to copy data to VRAM
+;----------------------------------------------------------------------------
+; In: SRC_ADDR -- 24 bit address of source data
+;     DEST -- VRAM address to write to (WORD address!!)
+;     SIZE -- number of BYTEs to copy
+;----------------------------------------------------------------------------
+; Out: None
+;----------------------------------------------------------------------------
+; Modifies: A, X, Y
+;----------------------------------------------------------------------------
+
+;LoadBlockToVRAM SRC_ADDRESS, DEST, SIZE
+;   requires:  mem/A = 8 bit, X/Y = 16 bit
+.MACRO LoadBlockToVRAM
+    lda #$80
+    sta $2115
+    ldx #\2         ; DEST
+    stx $2116       ; $2116: Word address for accessing VRAM.
+    lda #:\1        ; SRCBANK
+    ldx #\1         ; SRCOFFSET
+    ldy #\3         ; SIZE
+    jsr LoadVRAM
+.ENDM
+
+
+
+
+;============================================================================
+; Routines
+;============================================================================
+
+.BANK 0
+.ORG 0
+.SECTION "LoadVRAMCode" SEMIFREE
+
+;============================================================================
+; LoadVRAM -- Load data into VRAM
+;----------------------------------------------------------------------------
+; In: A:X  -- points to the data
+;     Y     -- Number of bytes to copy (0 to 65535)  (assumes 16-bit index)
+;----------------------------------------------------------------------------
+; Out: None
+;----------------------------------------------------------------------------
+; Modifies: none
+;----------------------------------------------------------------------------
+; Notes:  Assumes VRAM address has been previously set!!
+;----------------------------------------------------------------------------
+LoadVRAM:
+    pha
+    phx
+    phy
+    phb
+    php         ; Preserve Registers
+    
+    sep #$20
+
+    stx $4302   ; Store Data offset into DMA source offset
+    sta $4304   ; Store data Bank into DMA source bank
+    sty $4305   ; Store size of data block
+
+    lda #$01
+    sta $4300   ; Set DMA mode (word, normal increment)
+    lda #$18    ; Set the destination register (VRAM write register)
+    sta $4301
+    lda #$01    ; Initiate DMA transfer (channel 1)
+    sta $420B
+
+    plp         ; restore registers
+    plb
+    ply
+    plx
+    pla
+    rts         ; return
+;============================================================================
+
+.ENDS
+
+.BANK 0
+.ORG 0
+.SECTION "DMAPaletteCode" SEMIFREE
+
+;============================================================================
+; DMAPalette -- Load entire palette using DMA
+;----------------------------------------------------------------------------
+; In: A:X  -- points to the data
+;      Y   -- Size of data
+;----------------------------------------------------------------------------
+; Out: None
+;----------------------------------------------------------------------------
+; Modifies: none
+;----------------------------------------------------------------------------
+DMAPalette:
+    pha
+    phx
+    phb
+    php         ; Preserve Registers
+    
+    sep #$20
+
+    stx $4302   ; Store data offset into DMA source offset
+    sta $4304   ; Store data bank into DMA source bank
+    sty $4305   ; Store size of data block
+
+    stz $4300   ; Set DMA Mode (byte, normal increment)
+    lda #$22    ; Set destination register ($2122 - CGRAM Write)
+    sta $4301
+    lda #$01    ; Initiate DMA transfer
+    sta $420B
+
+    plp         ; Restore registers
+    plb
+    plx
+    pla
+    rts         ; return from subroutine
+;============================================================================
+
+.ENDS
\ No newline at end of file
diff --git a/snes/banktest/Makefile b/snes/banktest/Makefile
new file mode 100644
index 0000000..ac482c0
--- /dev/null
+++ b/snes/banktest/Makefile
@@ -0,0 +1,33 @@
+#wla-65816 -o %1.asm %1.obj
+#wlalink -vr temp.prj %1.smc
+
+
+AS=wla-65816
+LD=wlalink
+
+OBJS=vram2.o
+APP=vram2.smc
+GFX=
+
+all: clean $(APP)
+
+run:
+	zsnes $(APP)
+
+linkfile:
+	echo "[objects]" > linkerfile.prj
+
+
+optixx.inc: optixx.pcx
+	wine tools/pcx2snes.exe optixx.pcx -b2 -nOptixx -ooptixx.inc
+
+
+%.o: %.asm
+	echo "$@" >> linkerfile.prj
+	$(AS) -o $?  $@
+
+$(APP):  linkfile $(GFX) $(OBJS) $(GFX)
+	$(LD) -vr linkerfile.prj  $@
+
+clean:
+	rm -vf $(APP) *.prj *.o
diff --git a/snes/banktest/header.inc b/snes/banktest/header.inc
new file mode 100644
index 0000000..b2482a1
--- /dev/null
+++ b/snes/banktest/header.inc
@@ -0,0 +1,61 @@
+;------------------------------ Header File ---------------------------------
+;   This is basically a combo of MarctheMER's and Neviksti's header files
+; Perhaps reading their's will also help your understanding of the header,
+; but I believe this will be the simplest method of defining your header,
+; as Marc's doesn't provide a full explanation, and Neviksti's can be
+; a bit more difficult for beginners (using the WLA directives is easier).
+;----------------------------------------------------------------------------
+
+;==LoRom==      ; We'll get to HiRom some other time.
+.MEMORYMAP                      ; Begin describing the system architecture.
+  SLOTSIZE $8000                ; The slot is $8000 bytes in size. More details on slots later.
+  DEFAULTSLOT 0                 ; There's only 1 slot in SNES, there are more in other consoles.
+  SLOT 0 $8000                  ; Define's Slot 0's starting address.
+.ENDME          ; End MemoryMap definition
+
+.ROMBANKSIZE $8000              ; Every ROM bank is 32 KBytes in size
+.ROMBANKS 8                     ; 2 Mbits - Tell WLA we want to use 8 ROM Banks
+
+.SNESHEADER
+  ID "SNES"                     ; 1-4 letter string, just leave it as "SNES"
+  
+  NAME "SNES Tile Demo       "  ; Program Title - can't be over 21 bytes,
+  ;    "123456789012345678901"  ; use spaces for unused bytes of the name.
+
+  SLOWROM
+  LOROM
+
+  CARTRIDGETYPE $00             ; $00 = ROM only, see WLA documentation for others
+  ROMSIZE $08                   ; $08 = 2 Mbits,  see WLA doc for more..
+  SRAMSIZE $00                  ; No SRAM         see WLA doc for more..
+  COUNTRY $01                   ; $01 = U.S.  $00 = Japan, that's all I know
+  LICENSEECODE $00              ; Just use $00
+  VERSION $00                   ; $00 = 1.00, $01 = 1.01, etc.
+.ENDSNES
+
+.SNESNATIVEVECTOR               ; Define Native Mode interrupt vector table
+  COP EmptyHandler
+  BRK EmptyHandler
+  ABORT EmptyHandler
+  NMI EmptyHandler
+  IRQ EmptyHandler
+.ENDNATIVEVECTOR
+
+.SNESEMUVECTOR                  ; Define Emulation Mode interrupt vector table
+  COP EmptyHandler
+  ABORT EmptyHandler
+  NMI EmptyHandler
+  RESET Start
+  IRQBRK EmptyHandler
+.ENDEMUVECTOR
+
+.BANK 0 SLOT 0                  ; Defines the ROM bank and the slot it is inserted in memory.
+.ORG 0                          ; .ORG 0 is really $8000, because the slot starts at $8000
+.SECTION "EmptyVectors" SEMIFREE
+
+EmptyHandler:
+        rti
+
+.ENDS
+
+.EMPTYFILL $00
\ No newline at end of file
diff --git a/snes/banktest/init.inc b/snes/banktest/init.inc
new file mode 100644
index 0000000..b9bbe49
--- /dev/null
+++ b/snes/banktest/init.inc
@@ -0,0 +1,262 @@
+;------------------------------------------------------------------------
+;-  Written by: Neviksti
+;-     If you use my code, please share your creations with me
+;-     as I am always curious :)
+;------------------------------------------------------------------------
+
+
+;----------------------------------------------------------------------------
+; InitSNES -- my "standard" initialization of SNES memory and registers
+;----------------------------------------------------------------------------
+.MACRO InitSNES
+  sei                     ;disable interrupts
+  clc                     ;switch to native mode
+  xce
+
+  REP #$38		; mem/A = 16 bit, X/Y = 16 bit
+			;decimal mode off
+
+  LDX #$1FFF	;Setup the stack
+  TXS			;Transfer Index X to Stack Pointer Register
+
+  ;do the rest of the initialization in a routine
+  JSL $008000
+
+  SEP #$20		; mem/A = 8 bit
+.ENDM
+
+;----------------------------------------------------------------------------
+
+.BANK 0 SLOT 0
+.ORG 0
+.SECTION "InitializeSNESCode" FORCE
+
+InitializeSNES:
+  PHK			;set Data Bank = Program Bank
+  PLB
+
+  LDA #$0000	;set Direct Page = $0000
+  TCD			;Transfer Accumulator to Direct Register
+
+  LDX $1FFD		;we clear all the mem at one point ...
+  STX $4372  	;so save the return address in a place that won't get overwritten
+  LDX $1FFF
+  STX $4374
+
+  SEP #$20		; mem/A = 8 bit
+  REP #$10
+
+  LDA #$8F
+  STA $2100		;turn screen off for now, set brightness to normal
+
+  LDX #$2101
+_Loop00:		;regs $2101-$210C
+  STZ $00,X		;set Sprite,Character,Tile sizes to lowest, and set addresses to $0000
+  INX
+  CPX #$210D
+  BNE _Loop00
+
+_Loop01:		;regs $210D-$2114
+  STZ $00,X		;Set all BG scroll values to $0000
+  STZ $00,X
+  INX
+  CPX #$2115
+  BNE _Loop01
+
+  LDA #$80		;reg $2115
+  STA $2115		; Initialize VRAM transfer mode to word-access, increment by 1
+
+  STZ $2116		;regs $2117-$2117
+  STZ $2117		;VRAM address = $0000
+
+			;reg $2118-$2119
+			;VRAM write register... don't need to initialize
+
+  STZ $211A		;clear Mode7 setting
+
+  LDX #$211B
+_Loop02:		;regs $211B-$2120
+  STZ $00,X		;clear out the Mode7 matrix values
+  STZ $00,X
+  INX
+  CPX #$2121
+  BNE _Loop02
+
+			;reg $2121 - Color address, doesn't need initilaizing
+			;reg $2122 - Color data, is initialized later
+
+  LDX #$2123
+_Loop03:		;regs $2123-$2133
+  STZ $00,X		;turn off windows, main screens, sub screens, color addition,
+  INX			;fixed color = $00, no super-impose (external synchronization),
+  CPX #$2134	;no interlaced mode, normal resolution
+  BNE _Loop03
+
+			;regs $2134-$2136  - multiplication result, no initialization needed
+			;reg $2137 - software H/V latch, no initialization needed
+			;reg $2138 - Sprite data read, no initialization needed
+			;regs $2139-$213A  - VRAM data read, no initialization needed
+			;reg $213B - Color RAM data read, no initialization needed
+			;regs $213C-$213D  - H/V latched data read, no initialization needed
+
+  STZ $213E		;reg $213E - might not be necesary, but selects PPU master/slave mode
+			;reg $213F - PPU status flag, no initialization needed
+
+			;reg $2140-$2143 - APU communication regs, no initialization required
+
+			;reg $2180  -  read/write WRAM register, no initialization required
+			;reg $2181-$2183  -  WRAM address, no initialization required
+
+			;reg $4016-$4017  - serial JoyPad read registers, no need to initialize
+
+
+  STZ $4200		;reg $4200  - disable timers, NMI,and auto-joyread
+
+  LDA #$FF
+  STA $4201		;reg $4201  - programmable I/O write port, initalize to allow reading at in-port
+
+			;regs $4202-$4203  - multiplication registers, no initialization required
+			;regs $4204-$4206  - division registers, no initialization required
+
+			;regs $4207-$4208  - Horizontal-IRQ timer setting, since we disabled this, it is OK to not init
+			;regs $4209-$420A  - Vertical-IRQ timer setting, since we disabled this, it is OK to not init
+
+  STZ $420B		;reg $420B  - turn off all general DMA channels
+  STZ $420C		;reg $420C  - turn off all H-MA channels
+
+  STZ $420D		;reg $420D  - ROM access time to slow (2.68Mhz)
+
+  LDA $4210		;reg $4210  - NMI status, reading resets
+
+			;reg $4211  - IRQ status, no need to initialize
+			;reg $4212  - H/V blank and JoyRead status, no need to initialize
+			;reg $4213  - programmable I/O inport, no need to initialize
+
+			;reg $4214-$4215  - divide results, no need to initialize
+			;reg $4216-$4217  - multiplication or remainder results, no need to initialize
+
+			;regs $4218-$421f  - JoyPad read registers, no need to initialize
+
+			;regs $4300-$437F
+			;no need to intialize because DMA was disabled above
+			;also, we're not sure what all of the registers do, so it is better to leave them at
+			;their reset state value
+
+  JSR ClearVRAM      ;Reset VRAM
+  JSR ClearPalette   ;Reset colors
+
+  ;**** clear Sprite tables ********
+
+  STZ $2102	;sprites initialized to be off the screen, palette 0, character 0
+  STZ $2103
+  LDX #$0080
+  LDA #$F0
+_Loop08:
+  STA $2104	;set X = 240
+  STA $2104	;set Y = 240
+  STZ $2104	;set character = $00
+  STZ $2104	;set priority=0, no flips
+  DEX
+  BNE _Loop08
+
+  LDX #$0020
+_Loop09:
+  STZ $2104		;set size bit=0, x MSB = 0
+  DEX
+  BNE _Loop09
+
+  ;**** clear WRAM ********
+
+  STZ $2181		;set WRAM address to $000000
+  STZ $2182
+  STZ $2183
+
+  LDX #$8008
+  STX $4300         ;Set DMA mode to fixed source, BYTE to $2180
+  LDX #wram_fill_byte
+  STX $4302         ;Set source offset
+  LDA #:wram_fill_byte
+  STA $4304         ;Set source bank
+  LDX #$0000
+  STX $4305         ;Set transfer size to 64k bytes
+  LDA #$01
+  STA $420B         ;Initiate transfer
+
+  LDA #$01          ;now set the next 64k bytes
+  STA $420B         ;Initiate transfer
+
+  PHK			;make sure Data Bank = Program Bank
+  PLB
+
+  CLI			;enable interrupts again
+
+  LDX $4372  	;get our return address...
+  STX $1FFD
+  LDA $4374
+  STA $1FFF
+  RTL
+
+wram_fill_byte:
+.db $00
+
+;----------------------------------------------------------------------------
+; ClearVRAM -- Sets every byte of VRAM to zero
+; In: None
+; Out: None
+; Modifies: flags
+;----------------------------------------------------------------------------
+ClearVRAM:
+   pha
+   phx
+   php
+
+   REP #$30		; mem/A = 8 bit, X/Y = 16 bit
+   SEP #$20
+
+   LDA #$80
+   STA $2115         ;Set VRAM port to word access
+   LDX #$1809
+   STX $4300         ;Set DMA mode to fixed source, WORD to $2118/9
+   LDX #$0000
+   STX $2116         ;Set VRAM port address to $0000
+   STX $0000         ;Set $00:0000 to $0000 (assumes scratchpad ram)
+   STX $4302         ;Set source address to $xx:0000
+   LDA #$00
+   STA $4304         ;Set source bank to $00
+   LDX #$FFFF
+   STX $4305         ;Set transfer size to 64k-1 bytes
+   LDA #$01
+   STA $420B         ;Initiate transfer
+
+   STZ $2119         ;clear the last byte of the VRAM
+
+   plp
+   plx
+   pla
+   RTS
+
+;----------------------------------------------------------------------------
+; ClearPalette -- Reset all palette colors to zero
+; In: None
+; Out: None
+; Modifies: flags
+;----------------------------------------------------------------------------
+ClearPalette:
+   PHX
+   PHP
+   REP #$30		; mem/A = 8 bit, X/Y = 16 bit
+   SEP #$20
+
+   STZ $2121
+   LDX #$0100
+ClearPaletteLoop:
+   STZ $2122
+   STZ $2122
+   DEX
+   BNE ClearPaletteLoop
+
+   PLP
+   PLX
+   RTS
+
+.ENDS
diff --git a/snes/banktest/optixx.inc b/snes/banktest/optixx.inc
new file mode 100644
index 0000000..456046c
--- /dev/null
+++ b/snes/banktest/optixx.inc
@@ -0,0 +1,169 @@
+; Created with eKid's pcx2snes converter ;
+
+OptixxData:
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $03, $00, $0F, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $00, $FF, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FE, $00, $FE, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $1F, $00, $1F, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $00, $FF, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $F0, $00, $FC, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $03, $00, $03, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $00, $FF, $00
+    .db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $00, $FF, $00
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+
+OptixxPalette:
+    .db $DE, $7B, $00, $00, $00, $00, $00, $00
+
+; 160 tiles (0 spaces)
+; 2560 bytes
diff --git a/snes/banktest/optixx.pcx b/snes/banktest/optixx.pcx
new file mode 100644
index 0000000000000000000000000000000000000000..0fcbf7098ec4e4ecb0d8cdc542d90687a5924718
GIT binary patch
literal 1964
zcmeHH?M}i#5Zom(F~;}sL40$e*8&A3lu|H89|5I&)EIH5TT(2Az)us}Z02$^x1ZPE
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literal 0
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diff --git a/snes/banktest/vram2.asm b/snes/banktest/vram2.asm
new file mode 100644
index 0000000..810b3a4
--- /dev/null
+++ b/snes/banktest/vram2.asm
@@ -0,0 +1,91 @@
+;============================================================================
+; Includes
+;============================================================================
+
+;== Include MemoryMap, Vector Table, and HeaderInfo ==
+.INCLUDE "header.inc"
+
+;== Include SNES Initialization routines ==
+.INCLUDE "init.inc"
+.INCLUDE "LoadGraphics.asm"
+
+
+;============================================================================
+; Main Code
+;============================================================================
+
+.BANK 0 SLOT 0
+.ORG 0
+.SECTION "MainCode"
+
+Start:
+    InitSNES    ; Clear registers, etc.
+
+    ; Load Palette for our tiles
+    LoadPalette OptixxPalette, 0, 16
+
+    ; Load Tile data to VRAM
+	;LoadBlockToVRAM TilesData, $0000, $0020	; 2 tiles, 2bpp, = 32 bytes
+	LoadBlockToVRAM OptixxData, $0000, 0xa00	; 160 tiles, 2bpp, = 2560 bytes
+
+    lda #$80
+    sta $2115
+    ldx #$0800	; 5AF
+    stx $2116
+    
+	ldx #$0
+Start_do:    
+	stx $2118
+	inx
+	cpx #160
+	bne Start_do 
+   
+    ; Setup Video modes and other stuff, then turn on the screen
+    jsr SetupVideo
+
+Infinity:
+    jmp Infinity    ; bwa hahahahaha
+
+
+;============================================================================
+; SetupVideo -- Sets up the video mode and tile-related registers
+;----------------------------------------------------------------------------
+; In: None
+;----------------------------------------------------------------------------
+; Out: None
+;----------------------------------------------------------------------------
+SetupVideo:
+    php
+
+    lda #$00
+    sta $2105           ; Set Video mode 0, 8x8 tiles, 4 color BG1/BG2/BG3/BG4
+
+    lda #$08            ; Set BG1's Tile Map offset to $0400 (Word address)
+    sta $2107           ; And the Tile Map size to 32x32
+
+    stz $210B           ; Set BG1's Character VRAM offset to $0000 (word address)
+
+    lda #$01            ; Enable BG1
+    sta $212C
+
+    lda #$FF
+    sta $210E
+    sta $210E
+
+    lda #$0F
+    sta $2100           ; Turn on screen, full Brightness
+
+    plp
+    rts
+;============================================================================
+.ENDS
+
+;============================================================================
+; Character Data
+;============================================================================
+
+.BANK 7 SLOT 0
+.ORG 0
+.SECTION "CharacterData01"
+    .INCLUDE "optixx.inc"
+.ENDS