bank 0x00 upload working with crc
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@ -195,20 +195,21 @@ int main(int argc, char **argv)
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exit(-1);
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exit(-1);
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}
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}
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addr += SEND_BUFFER_SIZE;
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addr += SEND_BUFFER_SIZE;
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break;
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//break;
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}
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}
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dump_packet(0x00000,SEND_BUFFER_SIZE, read_buffer);
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//dump_packet(0x00000,SEND_BUFFER_SIZE, read_buffer);
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memcpy(crc_buffer + cnt_crc, read_buffer, READ_BUFFER_SIZE);
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memcpy(crc_buffer + cnt_crc, read_buffer, READ_BUFFER_SIZE);
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cnt_crc += READ_BUFFER_SIZE;
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cnt_crc += READ_BUFFER_SIZE;
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if (cnt_crc >= READ_BUFFER_SIZE) {
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if (cnt_crc >= READ_BUFFER_SIZE) {
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crc = do_crc(crc_buffer, BANK_SIZE);
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crc = do_crc(crc_buffer, READ_BUFFER_SIZE);
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printf ("bank=0x%02x crc=0x%04x\n", bank, crc);
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printf ("bank=0x%02x crc=0x%04x\n", bank, crc);
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memset(crc_buffer, 0, BUFFER_CRC);
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memset(crc_buffer, 0, BUFFER_CRC);
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bank++;
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bank++;
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cnt_crc = 0;
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cnt_crc = 0;
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break;
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}
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}
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break;
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//break;
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}
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}
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/*
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/*
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@ -27,6 +27,7 @@ uint16_t do_crc(uint8_t * data, uint16_t size)
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uint16_t i;
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uint16_t i;
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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crc = crc_xmodem_update(crc, data[i]);
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crc = crc_xmodem_update(crc, data[i]);
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}
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}
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return crc;
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return crc;
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}
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}
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@ -41,15 +42,18 @@ uint16_t do_crc_update(uint16_t crc, uint8_t * data, uint16_t size)
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}
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}
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void crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr)
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uint16_t crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr)
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{
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{
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uint16_t crc = 0;
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uint16_t crc = 0;
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uint32_t addr = 0;
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uint32_t addr = 0;
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uint8_t req_bank = 0;
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uint8_t req_bank = 0;
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sram_bulk_read_start(bottom_addr);
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sram_bulk_read_start(bottom_addr);
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printf("crc_check_bulk_memory: bottom_addr=0x%08lx top_addr=0x%08lx\n",
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bottom_addr, top_addr);
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for (addr = bottom_addr; addr < top_addr; addr++) {
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for (addr = bottom_addr; addr < top_addr; addr++) {
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if (addr && addr % 0x8000 == 0) {
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if (addr && addr % 0x8000 == 0) {
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printf("crc_check_bulk: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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printf("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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req_bank,addr,crc);
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req_bank,addr,crc);
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req_bank++;
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req_bank++;
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crc = 0;
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crc = 0;
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@ -57,11 +61,11 @@ void crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr)
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crc = crc_xmodem_update(crc, sram_bulk_read());
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crc = crc_xmodem_update(crc, sram_bulk_read());
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sram_bulk_read_next();
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sram_bulk_read_next();
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}
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}
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sram_bulk_read_end();
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if (addr % 0x8000 == 0)
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if (addr % 0x8000 == 0)
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printf("crc_check_bulk: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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printf("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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req_bank,addr,crc);
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req_bank,addr,crc);
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sram_bulk_read_end();
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return crc;
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}
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}
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@ -11,6 +11,6 @@ uint16_t do_crc(uint8_t * data,uint16_t size);
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uint16_t do_crc_update(uint16_t crc,uint8_t * data,uint16_t size);
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uint16_t do_crc_update(uint16_t crc,uint8_t * data,uint16_t size);
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void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint8_t *buffer);
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void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint8_t *buffer);
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uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer);
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uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer);
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void crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr);
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uint16_t crc_check_bulk_memory(uint32_t bottom_addr,uint32_t top_addr);
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#endif
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#endif
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@ -47,19 +47,16 @@ void dump_memory(uint32_t bottom_addr, uint32_t top_addr)
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{
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{
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uint32_t addr;
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uint32_t addr;
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uint8_t byte;
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uint8_t byte;
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printf("dump_memory: bottom_addr=%08lx top_addr=%08lx\n",bottom_addr, top_addr);
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//sram_bulk_read_start(bottom_addr);
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sram_bulk_read_start(bottom_addr);
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bottom_addr = 0x00;
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top_addr = 0x80;
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printf("%08lx - %08lx\n",bottom_addr, top_addr);
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printf("%08lx:", bottom_addr);
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printf("%08lx:", bottom_addr);
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for ( addr = bottom_addr; addr < top_addr; addr++) {
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for ( addr = bottom_addr; addr < top_addr; addr++) {
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if (addr%0x10 == 0)
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if (addr%0x10 == 0)
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printf("\n%08lx:", addr);
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printf("\n%08lx:", addr);
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byte = sram_read(addr);
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byte = sram_bulk_read();
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//sram_bulk_read_next();
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sram_bulk_read_next();
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printf(" %02x", byte);
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printf(" %02x", byte);
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}
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}
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//sram_bulk_read_end();
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printf("\n");
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sram_bulk_read_end();
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}
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}
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@ -12,12 +12,13 @@
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#include "uart.h"
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#include "uart.h"
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#include "sram.h"
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#include "sram.h"
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#include "debug.h"
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#include "debug.h"
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#include "dump.h"
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#include "crc.h"
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#include "crc.h"
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#include "usb_bulk.h"
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#include "usb_bulk.h"
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extern FILE uart_stdout;
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extern FILE uart_stdout;
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uint8_t debug_level = ( DEBUG | DEBUG_USB | DEBUG_USB_TRANS | DEBUG_SRAM);
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uint8_t debug_level = ( DEBUG | DEBUG_USB);
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uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
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uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
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uint32_t req_addr = 0;
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uint32_t req_addr = 0;
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@ -53,7 +54,7 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
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req_bank_size = 1 << rq->wValue.word;
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req_bank_size = 1 << rq->wValue.word;
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sync_errors = 0;
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sync_errors = 0;
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crc = 0;
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crc = 0;
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debug(DEBUG_USB,"USB_UPLOAD_INIT: bank_size=0x%x\n", req_bank_size);
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debug(DEBUG_USB,"USB_UPLOAD_INIT: bank_size=0x%04x\n", req_bank_size);
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/*
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/*
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* -------------------------------------------------------------------------
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* -------------------------------------------------------------------------
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@ -320,9 +321,14 @@ int main(void)
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usbDeviceDisconnect();
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usbDeviceDisconnect();
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printf("USB disconnect\n");
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printf("USB disconnect\n");
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crc_check_bulk_memory(0x000000,0x8000);
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crc_check_bulk_memory(0x000000, 0x80000);
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dump_memory(0x00,0x80);
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#if 0
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dump_memory(0x0000,0x0080);
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printf("crc=0x%x\n",crc_check_bulk_memory(0x000000, 0x80));
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#endif
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dump_memory(0x7f00,0x8000);
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printf("Disable snes WR\n");
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printf("Disable snes WR\n");
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snes_wr_disable();
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snes_wr_disable();
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@ -131,7 +131,7 @@ inline uint8_t sram_bulk_read(void)
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void sram_bulk_read_end(void)
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void sram_bulk_read_end(void)
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{
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{
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debug(DEBUG_SRAM,"sram_bulk_read_end:");
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debug(DEBUG_SRAM,"sram_bulk_read_end:\n");
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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AVR_CS_PORT |= (1 << AVR_CS_PIN);
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AVR_CS_PORT |= (1 << AVR_CS_PIN);
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@ -141,7 +141,7 @@ section at the end of this file).
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* of the macros usbDisableAllRequests() and usbEnableAllRequests() in
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* of the macros usbDisableAllRequests() and usbEnableAllRequests() in
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* usbdrv.h.
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* usbdrv.h.
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*/
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*/
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#define USB_CFG_LONG_TRANSFERS 1
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#define USB_CFG_LONG_TRANSFERS 0
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/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
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/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
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* in a single control-in or control-out transfer. Note that the capability
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* in a single control-in or control-out transfer. Note that the capability
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* for long transfers increases the driver size.
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* for long transfers increases the driver size.
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