fix shm addr restore
This commit is contained in:
parent
9efca9e242
commit
87b5936c02
@ -52,7 +52,7 @@
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extern const char _rom[] PROGMEM;
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extern const char _rom[] PROGMEM;
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extern FILE uart_stdout;
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extern FILE uart_stdout;
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uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC | DEBUG_SHM);
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uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC | DEBUG_SHM );
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uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
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uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
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uint32_t req_addr = 0;
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uint32_t req_addr = 0;
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@ -97,6 +97,7 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
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PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
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PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
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req_bank_size, req_bank_cnt, req_addr_end);
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req_bank_size, req_bank_cnt, req_addr_end);
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shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_START, 0);
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shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, req_bank_cnt);
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shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, req_bank_cnt);
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if (req_addr == 0x000000) {
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if (req_addr == 0x000000) {
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timer_start();
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timer_start();
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@ -124,8 +125,6 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
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req_bank, req_addr, timer_stop_int());
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req_bank, req_addr, timer_stop_int());
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#endif
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#endif
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req_bank++;
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req_bank++;
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shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_bank);
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sram_bulk_write_start(req_addr);
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timer_start();
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timer_start();
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} else {
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} else {
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@ -146,30 +145,10 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
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req_percent = (uint32_t)( 100 * req_addr ) / req_addr_end;
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req_percent = (uint32_t)( 100 * req_addr ) / req_addr_end;
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if (req_percent!=req_percent_last){
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if (req_percent!=req_percent_last){
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shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_percent);
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shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_percent);
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sram_bulk_write_start(req_addr);
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}
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}
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req_percent_last = req_percent;
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req_percent_last = req_percent;
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#if 0
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shared_memory_scratchpad_region_save_helper(req_addr);
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if (req_addr && (req_addr % 0x1000) == 0) {
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debug_P(DEBUG_USB,
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PSTR("USB_BULK_UPLOAD_NEXT: bank=0x%02x addr=0x%08lx crc=%04x\n",
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req_bank, req_addr, crc_check_bulk_memory(req_addr - 0x1000,
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req_addr,
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req_bank_size));
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}
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sram_bulk_write_start(req_addr);
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#endif
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#if 1
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if (!shared_memory_scratchpad_region_save_helper(req_addr)){
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debug_P(DEBUG_USB,
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PSTR("USB_BULK_UPLOAD_NEXT: scratchpad_region_save_helper was dirty\n"));
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sram_bulk_write_start(req_addr);
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}
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#endif
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if (req_addr && (req_addr % req_bank_size) == 0) {
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if (req_addr && (req_addr % req_bank_size) == 0) {
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#ifdef FLT_DEBUG
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#ifdef FLT_DEBUG
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@ -184,7 +163,6 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
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req_bank++;
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req_bank++;
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timer_start();
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timer_start();
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shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, req_bank);
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shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, req_bank);
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sram_bulk_write_start(req_addr);
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}
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}
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ret_len = USB_MAX_TRANS;
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ret_len = USB_MAX_TRANS;
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@ -363,11 +341,11 @@ int main(void)
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usbPoll();
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usbPoll();
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}
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}
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shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
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shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
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#if 0
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#if SHM_SCRATCHPAD
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shared_memory_scratchpad_region_tx_restore();
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shared_memory_scratchpad_region_tx_restore();
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shared_memory_scratchpad_region_rx_restore();
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shared_memory_scratchpad_region_rx_restore();
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#endif
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#endif
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info_P(PSTR("USB poll done\n"));
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info_P(PSTR("USB poll done\n"));
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set_rom_mode();
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set_rom_mode();
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snes_wr_disable();
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snes_wr_disable();
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@ -379,39 +357,6 @@ int main(void)
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info_P(PSTR("Poll USB\n"));
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info_P(PSTR("Poll USB\n"));
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while ((req_state != REQ_STATUS_AVR)) {
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while ((req_state != REQ_STATUS_AVR)) {
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usbPoll();
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usbPoll();
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#ifdef DO_IRQ
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uint8_t i;
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uint16_t irq_count = 0;
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i = 10;
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while (--i) {
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_delay_ms(100);
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}
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info_P(PSTR("Send IRQ %i\n"), ++irq_count);
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send_irq();
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#endif
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#ifdef DO_BUS_STEALING
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avr_bus_active();
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sram_bulk_read_start(0x003000);
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c = sram_bulk_read();
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i = 5;
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while (--i) {
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_delay_ms(500);
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info_P(PSTR("Wait to switch to snes mode %i\n"), i);
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}
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if (req_bank_size == 0x8000) {
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snes_lorom();
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} else {
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snes_hirom();
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}
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snes_wr_disable();
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info_P(PSTR("Disable SNES WR\n"));
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snes_bus_active();
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info_P(PSTR("Activate SNES bus\n"));
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info_P(PSTR("Read 0x3000=%c\n"), c);
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#endif
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}
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}
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system_init();
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system_init();
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shared_memory_init();
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shared_memory_init();
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@ -79,10 +79,11 @@ void shared_memory_scratchpad_region_tx_save()
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(uint32_t)(SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE), 0x8000);
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(uint32_t)(SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE), 0x8000);
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
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#endif
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#endif
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sram_bulk_addr_save();
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: unlock\n"));
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: unlock\n"));
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sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_TX_LOC_STATE,scratchpad_region_tx,
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sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_TX_LOC_STATE,scratchpad_region_tx,
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(uint32_t)SHARED_MEM_TX_LOC_SIZE);
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(uint32_t)SHARED_MEM_TX_LOC_SIZE);
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sram_bulk_addr_restore();
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scratchpad_locked_tx = 0;
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scratchpad_locked_tx = 0;
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#if 0
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#if 0
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@ -102,9 +103,11 @@ void shared_memory_scratchpad_region_rx_save()
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
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#endif
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#endif
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sram_bulk_addr_save();
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_save: unlock\n"));
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debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_save: unlock\n"));
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sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_RX_LOC_STATE,scratchpad_region_rx,
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sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_RX_LOC_STATE,scratchpad_region_rx,
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(uint32_t)SHARED_MEM_RX_LOC_SIZE);
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(uint32_t)SHARED_MEM_RX_LOC_SIZE);
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sram_bulk_addr_restore();
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scratchpad_locked_rx = 0;
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scratchpad_locked_rx = 0;
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#if 0
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#if 0
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@ -190,7 +193,6 @@ void shared_memory_irq_restore()
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void shared_memory_write(uint8_t cmd, uint8_t value)
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void shared_memory_write(uint8_t cmd, uint8_t value)
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{
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{
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return 0;
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if (scratchpad_locked_tx){
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if (scratchpad_locked_tx){
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debug_P(DEBUG_SHM, PSTR("shared_memory_write: locked_tx\n"));
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debug_P(DEBUG_SHM, PSTR("shared_memory_write: locked_tx\n"));
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return 1;
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return 1;
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@ -228,7 +230,7 @@ void shared_memory_write(uint8_t cmd, uint8_t value)
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shared_memory_scratchpad_tx_restore();
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shared_memory_scratchpad_tx_restore();
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shared_memory_irq_restore();
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shared_memory_irq_restore();
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//sram_bulk_addr_restore();
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sram_bulk_addr_restore();
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}
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}
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@ -62,6 +62,7 @@
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void shared_memory_init(void);
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uint8_t shared_memory_scratchpad_region_save_helper(uint32_t addr);
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uint8_t shared_memory_scratchpad_region_save_helper(uint32_t addr);
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void shared_memory_scratchpad_region_tx_save();
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void shared_memory_scratchpad_region_tx_save();
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void shared_memory_scratchpad_region_tx_restore();
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void shared_memory_scratchpad_region_tx_restore();
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@ -117,11 +117,13 @@ void sreg_set(uint32_t addr)
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inline void sram_bulk_addr_save()
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inline void sram_bulk_addr_save()
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{
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{
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addr_stash = addr_current;
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addr_stash = addr_current;
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debug_P(DEBUG_SRAM, PSTR("sram_bulk_addr_save: addr=0x%08lx\n\r"), addr_stash);
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}
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}
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inline void sram_bulk_addr_restore()
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inline void sram_bulk_addr_restore()
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{
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{
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sreg_set(addr_stash);
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debug_P(DEBUG_SRAM, PSTR("sram_bulk_addr_restore: addr=0x%08lx\n\r"), addr_stash);
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sram_bulk_write_start(addr_stash);
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}
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}
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@ -216,6 +218,7 @@ uint8_t sram_read(uint32_t addr)
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void sram_bulk_write_start(uint32_t addr)
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void sram_bulk_write_start(uint32_t addr)
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{
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{
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debug_P(DEBUG_SRAM, PSTR("sram_bulk_write_start: addr=0x%08lx\n\r"), addr);
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debug_P(DEBUG_SRAM, PSTR("sram_bulk_write_start: addr=0x%08lx\n\r"), addr);
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addr_current = addr;
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avr_data_out();
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avr_data_out();
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@ -231,6 +234,7 @@ void sram_bulk_write_start(uint32_t addr)
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inline void sram_bulk_write_next(void)
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inline void sram_bulk_write_next(void)
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{
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{
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addr_current++;
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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counter_up();
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counter_up();
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AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
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AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
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