fix shm addr restore

This commit is contained in:
optixx 2009-08-30 12:30:21 +02:00
parent 9efca9e242
commit 87b5936c02
4 changed files with 16 additions and 64 deletions

View File

@ -52,7 +52,7 @@
extern const char _rom[] PROGMEM; extern const char _rom[] PROGMEM;
extern FILE uart_stdout; extern FILE uart_stdout;
uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC | DEBUG_SHM); uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC | DEBUG_SHM );
uint8_t read_buffer[TRANSFER_BUFFER_SIZE]; uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
uint32_t req_addr = 0; uint32_t req_addr = 0;
@ -97,6 +97,7 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"), PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
req_bank_size, req_bank_cnt, req_addr_end); req_bank_size, req_bank_cnt, req_addr_end);
shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_START, 0);
shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, req_bank_cnt); shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, req_bank_cnt);
if (req_addr == 0x000000) { if (req_addr == 0x000000) {
timer_start(); timer_start();
@ -124,8 +125,6 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
req_bank, req_addr, timer_stop_int()); req_bank, req_addr, timer_stop_int());
#endif #endif
req_bank++; req_bank++;
shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_bank);
sram_bulk_write_start(req_addr);
timer_start(); timer_start();
} else { } else {
@ -146,30 +145,10 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
req_percent = (uint32_t)( 100 * req_addr ) / req_addr_end; req_percent = (uint32_t)( 100 * req_addr ) / req_addr_end;
if (req_percent!=req_percent_last){ if (req_percent!=req_percent_last){
shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_percent); shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_percent);
sram_bulk_write_start(req_addr);
} }
req_percent_last = req_percent; req_percent_last = req_percent;
#if 0 shared_memory_scratchpad_region_save_helper(req_addr);
if (req_addr && (req_addr % 0x1000) == 0) {
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_NEXT: bank=0x%02x addr=0x%08lx crc=%04x\n",
req_bank, req_addr, crc_check_bulk_memory(req_addr - 0x1000,
req_addr,
req_bank_size));
}
sram_bulk_write_start(req_addr);
#endif
#if 1
if (!shared_memory_scratchpad_region_save_helper(req_addr)){
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_NEXT: scratchpad_region_save_helper was dirty\n"));
sram_bulk_write_start(req_addr);
}
#endif
if (req_addr && (req_addr % req_bank_size) == 0) { if (req_addr && (req_addr % req_bank_size) == 0) {
#ifdef FLT_DEBUG #ifdef FLT_DEBUG
@ -184,7 +163,6 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
req_bank++; req_bank++;
timer_start(); timer_start();
shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, req_bank); shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, req_bank);
sram_bulk_write_start(req_addr);
} }
ret_len = USB_MAX_TRANS; ret_len = USB_MAX_TRANS;
@ -363,11 +341,11 @@ int main(void)
usbPoll(); usbPoll();
} }
shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0); shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
#if 0
#if SHM_SCRATCHPAD
shared_memory_scratchpad_region_tx_restore(); shared_memory_scratchpad_region_tx_restore();
shared_memory_scratchpad_region_rx_restore(); shared_memory_scratchpad_region_rx_restore();
#endif #endif
info_P(PSTR("USB poll done\n")); info_P(PSTR("USB poll done\n"));
set_rom_mode(); set_rom_mode();
snes_wr_disable(); snes_wr_disable();
@ -379,39 +357,6 @@ int main(void)
info_P(PSTR("Poll USB\n")); info_P(PSTR("Poll USB\n"));
while ((req_state != REQ_STATUS_AVR)) { while ((req_state != REQ_STATUS_AVR)) {
usbPoll(); usbPoll();
#ifdef DO_IRQ
uint8_t i;
uint16_t irq_count = 0;
i = 10;
while (--i) {
_delay_ms(100);
}
info_P(PSTR("Send IRQ %i\n"), ++irq_count);
send_irq();
#endif
#ifdef DO_BUS_STEALING
avr_bus_active();
sram_bulk_read_start(0x003000);
c = sram_bulk_read();
i = 5;
while (--i) {
_delay_ms(500);
info_P(PSTR("Wait to switch to snes mode %i\n"), i);
}
if (req_bank_size == 0x8000) {
snes_lorom();
} else {
snes_hirom();
}
snes_wr_disable();
info_P(PSTR("Disable SNES WR\n"));
snes_bus_active();
info_P(PSTR("Activate SNES bus\n"));
info_P(PSTR("Read 0x3000=%c\n"), c);
#endif
} }
system_init(); system_init();
shared_memory_init(); shared_memory_init();

View File

@ -79,10 +79,11 @@ void shared_memory_scratchpad_region_tx_save()
(uint32_t)(SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE), 0x8000); (uint32_t)(SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE), 0x8000);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc); debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
#endif #endif
sram_bulk_addr_save();
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: unlock\n")); debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: unlock\n"));
sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_TX_LOC_STATE,scratchpad_region_tx, sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_TX_LOC_STATE,scratchpad_region_tx,
(uint32_t)SHARED_MEM_TX_LOC_SIZE); (uint32_t)SHARED_MEM_TX_LOC_SIZE);
sram_bulk_addr_restore();
scratchpad_locked_tx = 0; scratchpad_locked_tx = 0;
#if 0 #if 0
@ -102,9 +103,11 @@ void shared_memory_scratchpad_region_rx_save()
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc); debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
#endif #endif
sram_bulk_addr_save();
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_save: unlock\n")); debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_save: unlock\n"));
sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_RX_LOC_STATE,scratchpad_region_rx, sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_RX_LOC_STATE,scratchpad_region_rx,
(uint32_t)SHARED_MEM_RX_LOC_SIZE); (uint32_t)SHARED_MEM_RX_LOC_SIZE);
sram_bulk_addr_restore();
scratchpad_locked_rx = 0; scratchpad_locked_rx = 0;
#if 0 #if 0
@ -190,7 +193,6 @@ void shared_memory_irq_restore()
void shared_memory_write(uint8_t cmd, uint8_t value) void shared_memory_write(uint8_t cmd, uint8_t value)
{ {
return 0;
if (scratchpad_locked_tx){ if (scratchpad_locked_tx){
debug_P(DEBUG_SHM, PSTR("shared_memory_write: locked_tx\n")); debug_P(DEBUG_SHM, PSTR("shared_memory_write: locked_tx\n"));
return 1; return 1;
@ -228,7 +230,7 @@ void shared_memory_write(uint8_t cmd, uint8_t value)
shared_memory_scratchpad_tx_restore(); shared_memory_scratchpad_tx_restore();
shared_memory_irq_restore(); shared_memory_irq_restore();
//sram_bulk_addr_restore(); sram_bulk_addr_restore();
} }

View File

@ -62,6 +62,7 @@
void shared_memory_init(void);
uint8_t shared_memory_scratchpad_region_save_helper(uint32_t addr); uint8_t shared_memory_scratchpad_region_save_helper(uint32_t addr);
void shared_memory_scratchpad_region_tx_save(); void shared_memory_scratchpad_region_tx_save();
void shared_memory_scratchpad_region_tx_restore(); void shared_memory_scratchpad_region_tx_restore();

View File

@ -117,11 +117,13 @@ void sreg_set(uint32_t addr)
inline void sram_bulk_addr_save() inline void sram_bulk_addr_save()
{ {
addr_stash = addr_current; addr_stash = addr_current;
debug_P(DEBUG_SRAM, PSTR("sram_bulk_addr_save: addr=0x%08lx\n\r"), addr_stash);
} }
inline void sram_bulk_addr_restore() inline void sram_bulk_addr_restore()
{ {
sreg_set(addr_stash); debug_P(DEBUG_SRAM, PSTR("sram_bulk_addr_restore: addr=0x%08lx\n\r"), addr_stash);
sram_bulk_write_start(addr_stash);
} }
@ -216,6 +218,7 @@ uint8_t sram_read(uint32_t addr)
void sram_bulk_write_start(uint32_t addr) void sram_bulk_write_start(uint32_t addr)
{ {
debug_P(DEBUG_SRAM, PSTR("sram_bulk_write_start: addr=0x%08lx\n\r"), addr); debug_P(DEBUG_SRAM, PSTR("sram_bulk_write_start: addr=0x%08lx\n\r"), addr);
addr_current = addr;
avr_data_out(); avr_data_out();
@ -231,6 +234,7 @@ void sram_bulk_write_start(uint32_t addr)
inline void sram_bulk_write_next(void) inline void sram_bulk_write_next(void)
{ {
addr_current++;
AVR_WR_PORT |= (1 << AVR_WR_PIN); AVR_WR_PORT |= (1 << AVR_WR_PIN);
counter_up(); counter_up();
AVR_WR_PORT &= ~(1 << AVR_WR_PIN); AVR_WR_PORT &= ~(1 << AVR_WR_PIN);