o switch to v46

tools/bsnes/chip/bsx/bsx.cpp

@@ -1,8 +1,10 @@
 #include <../base.hpp>
-#include <../cart/cart.hpp>
-#define BSX_CPP
+
+#define BSX_CPP
+namespace SNES {
 
-#include "bsx.hpp"
 #include "bsx_base.cpp"
 #include "bsx_cart.cpp"
 #include "bsx_flash.cpp"
+};
+

tools/bsnes/chip/bsx/bsx.hpp

@@ -32,16 +32,10 @@ public:
   uint8 mmio_read(unsigned addr);
   void mmio_write(unsigned addr, uint8 data);
 
-  MappedRAM sram;
-  MappedRAM psram;
-
   BSXCart();
   ~BSXCart();
 
 private:
-  uint8 *sram_data;  //256kbit SRAM
-  uint8 *psram_data; //  4mbit PSRAM
-
   struct {
     uint8 r[16];
   } regs;

tools/bsnes/chip/bsx/bsx_base.cpp

@@ -1,5 +1,7 @@
 #ifdef BSX_CPP
 
+BSXBase bsxbase;
+
 void BSXBase::init() {
 }
 
@@ -135,3 +137,4 @@ void BSXBase::mmio_write(unsigned addr, uint8 data) {
 }
 
 #endif
+

tools/bsnes/chip/bsx/bsx_cart.cpp

@@ -1,5 +1,7 @@
 #ifdef BSX_CPP
 
+BSXCart bsxcart;
+
 void BSXCart::init() {
 }
 
@@ -20,7 +22,7 @@ void BSXCart::reset() {
 }
 
 void BSXCart::update_memory_map() {
-  Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)psram;
+  Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)memory::bsxpram;
 
   if((regs.r[0x02] & 0x80) == 0x00) {
     //LoROM mapping
@@ -35,16 +37,16 @@ void BSXCart::update_memory_map() {
   }
 
   if(regs.r[0x03] & 0x80) {
-    bus.map(Bus::MapLinear, 0x60, 0x6f, 0x0000, 0xffff, psram);
-  //bus.map(Bus::MapLinear, 0x70, 0x77, 0x0000, 0xffff, psram);
+    bus.map(Bus::MapLinear, 0x60, 0x6f, 0x0000, 0xffff, memory::bsxpram);
+  //bus.map(Bus::MapLinear, 0x70, 0x77, 0x0000, 0xffff, memory::bsxpram);
   }
 
   if((regs.r[0x05] & 0x80) == 0x00) {
-    bus.map(Bus::MapLinear, 0x40, 0x4f, 0x0000, 0xffff, psram);
+    bus.map(Bus::MapLinear, 0x40, 0x4f, 0x0000, 0xffff, memory::bsxpram);
   }
 
   if((regs.r[0x06] & 0x80) == 0x00) {
-    bus.map(Bus::MapLinear, 0x50, 0x5f, 0x0000, 0xffff, psram);
+    bus.map(Bus::MapLinear, 0x50, 0x5f, 0x0000, 0xffff, memory::bsxpram);
   }
 
   if(regs.r[0x07] & 0x80) {
@@ -55,8 +57,8 @@ void BSXCart::update_memory_map() {
     bus.map(Bus::MapLinear, 0x80, 0x9f, 0x8000, 0xffff, memory::cartrom);
   }
 
-  bus.map(Bus::MapShadow, 0x20, 0x3f, 0x6000, 0x7fff, psram);
-  bus.map(Bus::MapLinear, 0x70, 0x77, 0x0000, 0xffff, psram);
+  bus.map(Bus::MapShadow, 0x20, 0x3f, 0x6000, 0x7fff, memory::bsxpram);
+  bus.map(Bus::MapLinear, 0x70, 0x77, 0x0000, 0xffff, memory::bsxpram);
 }
 
 uint8 BSXCart::mmio_read(unsigned addr) {
@@ -66,7 +68,7 @@ uint8 BSXCart::mmio_read(unsigned addr) {
   }
 
   if((addr & 0xf8f000) == 0x105000) {  //$[10-17]:[5000-5fff] SRAM
-    return sram.read(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff));
+    return memory::bsxram.read(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff));
   }
 
   return 0x00;
@@ -81,21 +83,15 @@ void BSXCart::mmio_write(unsigned addr, uint8 data) {
   }
 
   if((addr & 0xf8f000) == 0x105000) {  //$[10-17]:[5000-5fff] SRAM
-    return sram.write(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff), data);
+    return memory::bsxram.write(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff), data);
   }
 }
 
 BSXCart::BSXCart() {
-  sram_data  = new uint8_t[ 32 * 1024];
-  psram_data = new uint8_t[512 * 1024];
-
-  sram.map (sram_data,   32 * 1024);
-  psram.map(psram_data, 512 * 1024);
 }
 
 BSXCart::~BSXCart() {
-  delete[] sram_data;
-  delete[] psram_data;
 }
 
 #endif
+

tools/bsnes/chip/bsx/bsx_flash.cpp

@@ -1,5 +1,7 @@
 #ifdef BSX_CPP
 
+BSXFlash bsxflash;
+
 void BSXFlash::init() {}
 void BSXFlash::enable() {}
 
@@ -15,10 +17,11 @@ void BSXFlash::reset() {
   regs.flash_enable = false;
   regs.read_enable  = false;
   regs.write_enable = false;
+  memory::bsxflash.write_protect(!regs.write_enable);
 }
 
 unsigned BSXFlash::size() const {
-  return memory::bscram.size();
+  return memory::bsxflash.size();
 }
 
 uint8 BSXFlash::read(unsigned addr) {
@@ -45,7 +48,7 @@ uint8 BSXFlash::read(unsigned addr) {
     }
   }
 
-  return memory::bscram.read(addr);
+  return memory::bsxflash.read(addr);
 }
 
 void BSXFlash::write(unsigned addr, uint8 data) {
@@ -64,11 +67,11 @@ void BSXFlash::write(unsigned addr, uint8 data) {
     regs.write_new = data;
 
     if(regs.write_enable && regs.write_old == regs.write_new) {
-      return memory::bscram.write(addr, data);
+      return memory::bsxflash.write(addr, data);
     }
   } else {
     if(regs.write_enable) {
-      return memory::bscram.write(addr, data);
+      return memory::bsxflash.write(addr, data);
     }
   }
 
@@ -107,7 +110,10 @@ void BSXFlash::write(unsigned addr, uint8 data) {
       regs.read_enable  = false;
       regs.write_enable = false;
     }
+
+    memory::bsxflash.write_protect(!regs.write_enable);
   }
 }
 
 #endif
+

tools/bsnes/chip/chip.hpp

@@ -1,3 +1,5 @@
+#include "sgb/sgb.hpp"
+#include "sa1/sa1.hpp"
 #include "bsx/bsx.hpp"
 #include "srtc/srtc.hpp"
 #include "sdd1/sdd1.hpp"

tools/bsnes/chip/cx4/cx4.cpp

@@ -6,9 +6,12 @@
 */
 
 #include <../base.hpp>
-#define CX4_CPP
+
+#define CX4_CPP
+namespace SNES {
+
+Cx4 cx4;
 
-#include "cx4.hpp"
 #include "cx4data.cpp"
 #include "cx4fn.cpp"
 #include "cx4oam.cpp"
@@ -30,8 +33,8 @@ uint16 addr = 0x0080 + (r * 3);
 }
 
 void Cx4::mul(uint32 x, uint32 y, uint32 &rl, uint32 &rh) {
-int64 rx = x & 0xffffff;
-int64 ry = y & 0xffffff;
+int64_t rx = x & 0xffffff;
+int64_t ry = y & 0xffffff;
   if(rx & 0x800000)rx |= ~0x7fffff;
   if(ry & 0x800000)ry |= ~0x7fffff;
 
@@ -195,3 +198,5 @@ void Cx4::reset() {
   memset(ram, 0, 0x0c00);
   memset(reg, 0, 0x0100);
 }
+};
+

tools/bsnes/chip/dsp1/dsp1.cpp

@@ -1,8 +1,10 @@
 #include <../base.hpp>
-#include <../cart/cart.hpp>
-#define DSP1_CPP
+
+#define DSP1_CPP
+namespace SNES {
+
+DSP1 dsp1;
 
-#include "dsp1.hpp"
 #include "dsp1emu.cpp"
 
 void DSP1::init() {}
@@ -57,3 +59,5 @@ void DSP1::write(unsigned addr, uint8 data) {
     dsp1.setDr(data);
   }
 }
+};
+

tools/bsnes/chip/dsp2/dsp2.cpp

@@ -1,7 +1,10 @@
 #include <../base.hpp>
-#define DSP2_CPP
+
+#define DSP2_CPP
+namespace SNES {
+
+DSP2 dsp2;
 
-#include "dsp2.hpp"
 #include "dsp2_op.cpp"
 
 void DSP2::init() {}
@@ -134,3 +137,5 @@ void DSP2::write(unsigned addr, uint8 data) {
 
 DSP2::DSP2() {}
 DSP2::~DSP2() {}
+};
+

tools/bsnes/chip/dsp3/dsp3.cpp

@@ -1,7 +1,10 @@
 #include <../base.hpp>
-#define DSP3_CPP
+
+#define DSP3_CPP
+namespace SNES {
+
+DSP3 dsp3;
 
-#include "dsp3.hpp"
 namespace DSP3i {
   #define bool8 uint8
   #include "dsp3emu.c"
@@ -33,3 +36,5 @@ void DSP3::write(unsigned addr, uint8 data) {
   DSP3i::dsp3_byte = data;
   DSP3i::DSP3SetByte();
 }
+};
+

tools/bsnes/chip/dsp4/dsp4.cpp

@@ -1,7 +1,10 @@
 #include <../base.hpp>
-#define DSP4_CPP
+
+#define DSP4_CPP
+namespace SNES {
+
+DSP4 dsp4;
 
-#include "dsp4.hpp"
 namespace DSP4i {
   inline uint16 READ_WORD(uint8 *addr) {
     return (addr[0]) + (addr[1] << 8);
@@ -53,3 +56,5 @@ void DSP4::write(unsigned addr, uint8 data) {
     DSP4i::DSP4SetByte();
   }
 }
+};
+

tools/bsnes/chip/obc1/obc1.cpp

@@ -1,6 +1,9 @@
 #include <../base.hpp>
-#include <../cart/cart.hpp>
-#include "obc1.hpp"
+
+#define OBC1_CPP
+namespace SNES {
+
+OBC1 obc1;
 
 void OBC1::init() {}
 void OBC1::enable() {}
@@ -21,7 +24,7 @@ uint8 OBC1::read(unsigned addr) {
   addr &= 0x1fff;
   if((addr & 0x1ff8) != 0x1ff0) return ram_read(addr);
 
-  switch(addr) { default: //never used, avoids compiler warning
+  switch(addr) { default:  //never used, avoids compiler warning
     case 0x1ff0: return ram_read(status.baseptr + (status.address << 2) + 0);
     case 0x1ff1: return ram_read(status.baseptr + (status.address << 2) + 1);
     case 0x1ff2: return ram_read(status.baseptr + (status.address << 2) + 2);
@@ -69,4 +72,7 @@ void OBC1::ram_write(unsigned addr, uint8 data) {
 }
 
 OBC1::OBC1() {}
-OBC1::~OBC1() {}
+OBC1::~OBC1() {}
+
+};
+

tools/bsnes/chip/sdd1/sdd1.cpp

@@ -1,8 +1,10 @@
 #include <../base.hpp>
-#include <../cart/cart.hpp>
-#define SDD1_CPP
+
+#define SDD1_CPP
+namespace SNES {
+
+SDD1 sdd1;
 
-#include "sdd1.hpp"
 #include "sdd1emu.cpp"
 
 void SDD1::init() {}
@@ -11,7 +13,7 @@ void SDD1::enable() {
   //hook S-CPU DMA MMIO registers to gather information for struct dma[];
   //buffer address and transfer size information for use in SDD1::read()
   for(unsigned i = 0x4300; i <= 0x437f; i++) {
-    cpu_mmio[i & 0x7f] = memory::mmio.get(i);
+    cpu_mmio[i & 0x7f] = memory::mmio.mmio[i - 0x2000];
     memory::mmio.map(i, *this);
   }
 
@@ -156,3 +158,5 @@ SDD1::SDD1() {
 SDD1::~SDD1() {
   delete[] buffer.data;
 }
+};
+

tools/bsnes/chip/spc7110/spc7110.cpp

@@ -1,8 +1,10 @@
 #include <../base.hpp>
-#include <../cart/cart.hpp>
-#define SPC7110_CPP
 
-#include "spc7110.hpp"
+#define SPC7110_CPP
+namespace SNES {
+
+SPC7110 spc7110;
+
 #include "decomp.cpp"
 
 const unsigned SPC7110::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
@@ -670,3 +672,6 @@ void SPC7110::write(unsigned addr, uint8 data) {
 
 SPC7110::SPC7110() {
 }
+
+};
+

tools/bsnes/chip/srtc/srtc.cpp

@@ -1,6 +1,9 @@
 #include <../base.hpp>
-#include <../cart/cart.hpp>
-#include "srtc.hpp"
+
+#define SRTC_CPP
+namespace SNES {
+
+SRTC srtc;
 
 const unsigned SRTC::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
 
@@ -224,3 +227,6 @@ void SRTC::mmio_write(unsigned addr, uint8 data) {
 
 SRTC::SRTC() {
 }
+
+};
+

tools/bsnes/chip/st010/st010.cpp

@@ -1,7 +1,10 @@
 #include <../base.hpp>
+
 #define ST010_CPP
+namespace SNES {
+
+ST010 st010;
 
-#include "st010.hpp"
 #include "st010_data.hpp"
 #include "st010_op.cpp"
 
@@ -85,3 +88,5 @@ void ST010::write(unsigned addr, uint8 data) {
     ram[0x0021] &= ~0x80;
   }
 }
+};
+