refactor debug to debug_P calls
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@@ -71,12 +71,12 @@ uint16_t crc_check_bulk_memory(uint32_t bottom_addr, uint32_t top_addr, uint32_t
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uint32_t addr = 0;
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uint8_t req_bank = 0;
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sram_bulk_read_start(bottom_addr);
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debug(DEBUG_CRC,"crc_check_bulk_memory: bottom_addr=0x%08lx top_addr=0x%08lx\n",
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debug_P(DEBUG_CRC, PSTR("crc_check_bulk_memory: bottom_addr=0x%08lx top_addr=0x%08lx\n"),
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bottom_addr,top_addr);
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for (addr = bottom_addr; addr < top_addr; addr++) {
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if (addr && addr % bank_size == 0) {
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debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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debug_P(DEBUG_CRC, PSTR("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n"),
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req_bank,addr,crc);
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req_bank++;
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crc = 0;
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@@ -85,7 +85,7 @@ uint16_t crc_check_bulk_memory(uint32_t bottom_addr, uint32_t top_addr, uint32_t
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sram_bulk_read_next();
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}
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if (addr % 0x8000 == 0)
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debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
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debug_P(DEBUG_CRC, PSTR("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n"),
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req_bank,addr,crc);
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sram_bulk_read_end();
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return crc;
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