Add pcb files
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files/pcb/v1.5_pcb_pool/PCB-POOL.dru
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files/pcb/v1.5_pcb_pool/PCB-POOL.dru
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description[de] = <b>EAGLE Design Rules Prototypen für PCB-POOL(R)</b>\n<p>\nWir haben in diesem DRU File alle notwendigen Design Einstellungen vorgenommen, damit Sie Ihre Leiterplatte \ngemäß unseren Mindestanforderungen bestellen können. Die Optionen Shapes und Misc sind dabei nicht relevant.\nDer minimale und maximale Wert für Roundness Shapes kann frei gewählt werden.\nBitte beachten Sie, daß die Mindesteinstellungen nicht geändert werden, da ansonsten keine Gewährleistung für eine \nfehlerfreie Produktion übernommen werden kann.<br>\nAbzudeckende Vias können in Masks (unter Limit) eingestellt werden.\n</p>Ihr Beta LAYOUT Team\n<p><p>\n<b>EAGLE Design Rules Prototypes to use with PCB-POOL(R)</b>\n<p>\nThe design rules in this DRU file have been set to cover our minimum requirements, the options Shapes and Misc are not\nrelevant. Values for Roundness (Shapes) can be chosen freely. Please do not change these minimum\nrequirements to avoid problems during production.<br>\nCovered vias can be set in Masks (Limit).\n\n</p>Your Beta LAYOUT Team
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layerSetup = (1*16)
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mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
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mtIsolate = 1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
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mdWireWire = 6mil
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mdWirePad = 6mil
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mdWireVia = 6mil
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mdPadPad = 6mil
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mdPadVia = 6mil
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mdViaVia = 6mil
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mdSmdPad = 6mil
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mdSmdVia = 6mil
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mdSmdSmd = 6mil
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mdViaViaSameLayer = 8mil
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mnLayersViaInSmd = 2
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mdCopperDimension = 20mil
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mdDrill = 8mil
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mdSmdStop = 0mil
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msWidth = 6mil
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msDrill = 12mil
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msMicroVia = 999mil
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msBlindViaRatio = 0.500000
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rvPadTop = 0.000000
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rvPadInner = 0.000000
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rvPadBottom = 0.000000
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rvViaOuter = 0.000000
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rvViaInner = 0.000000
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rvMicroViaOuter = 0.000000
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rvMicroViaInner = 0.000000
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rlMinPadTop = 8mil
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rlMaxPadTop = 100mil
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rlMinPadInner = 8mil
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rlMaxPadInner = 100mil
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rlMinPadBottom = 8mil
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rlMaxPadBottom = 100mil
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rlMinViaOuter = 6mil
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rlMaxViaOuter = 100mil
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rlMinViaInner = 8mil
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rlMaxViaInner = 100mil
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rlMinMicroViaOuter = 99mil
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rlMaxMicroViaOuter = 999mil
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rlMinMicroViaInner = 99mil
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rlMaxMicroViaInner = 999mil
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psTop = -1
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psBottom = -1
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psFirst = -1
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psElongationLong = 100
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psElongationOffset = 100
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mvStopFrame = 0.000000
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mvCreamFrame = 0.000000
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mlMinStopFrame = 3mil
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mlMaxStopFrame = 8mil
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mlMinCreamFrame = 0mil
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mlMaxCreamFrame = 8mil
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mlViaStopLimit = 99mil
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srRoundness = 0.000000
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srMinRoundness = 0mil
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srMaxRoundness = 0mil
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slThermalGap = 0.000000
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slMinThermalGap = 8mil
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slMaxThermalGap = 100mil
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slAnnulusIsolate = 8mil
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slThermalIsolate = 8mil
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slAnnulusRestring = 1
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slThermalRestring = 1
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slThermalsForVias = 0
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checkGrid = 0
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checkAngle = 0
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checkFont = 1
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checkRestrict = 1
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useDiameter = 13
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maxErrors = 50
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files/pcb/v1.5_pcb_pool/ref_b.png
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files/pcb/v1.5_pcb_pool/ref_t.png
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files/pcb/v1.5_pcb_pool/snesram.brd
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files/pcb/v1.5_pcb_pool/snesram.brd
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