Add pcb files

This commit is contained in:
optixx 2016-02-15 17:47:10 +01:00
parent f743bf5ea9
commit dad06d8ae9
442 changed files with 58503 additions and 0 deletions

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files/pcb/lib/brd_to_dsn.ulp Normal file

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files/pcb/lib/snes_con.lbr Executable file

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files/pcb/lib/snesram.dsn Normal file

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[Eagle]
Version="05 05 00"
Platform="Mac OS X"
Serial="62191E841E-LSR-WLM-1EL"
Globals="Globals"
Desktop="Desktop"
[Globals]
AutoSaveProject=1
UsedLibrary="/Applications/Eagle/lbr/19inch.lbr"
UsedLibrary="/Applications/Eagle/lbr/40xx.lbr"
UsedLibrary="/Applications/Eagle/lbr/41xx.lbr"
UsedLibrary="/Applications/Eagle/lbr/45xx.lbr"
UsedLibrary="/Applications/Eagle/lbr/74ac-logic.lbr"
UsedLibrary="/Applications/Eagle/lbr/74ttl-din.lbr"
UsedLibrary="/Applications/Eagle/lbr/74xx-eu.lbr"
UsedLibrary="/Applications/Eagle/lbr/74xx-little-de.lbr"
UsedLibrary="/Applications/Eagle/lbr/74xx-little-us.lbr"
UsedLibrary="/Applications/Eagle/lbr/74xx-us.lbr"
UsedLibrary="/Applications/Eagle/lbr/751xx.lbr"
UsedLibrary="/Applications/Eagle/lbr/agilent-technologies.lbr"
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UsedLibrary="/Applications/Eagle/lbr/amd-mach.lbr"
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UsedLibrary="/Applications/Eagle/lbr/con-rib.lbr"
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@ -0,0 +1,73 @@
description[de] = <b>EAGLE Design Rules</b>\n<p>\nDie Standard-Design-Rules sind so gewählt, dass sie für \ndie meisten Anwendungen passen. Sollte ihre Platine \nbesondere Anforderungen haben, treffen Sie die erforderlichen\nEinstellungen hier und speichern die Design Rules unter \neinem neuen Namen ab.
description[en] = <b>EAGLE Design Rules</b>\n<p>\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.
layerSetup = (1*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 8mil
mdWirePad = 8mil
mdWireVia = 8mil
mdPadPad = 8mil
mdPadVia = 8mil
mdViaVia = 8mil
mdSmdPad = 8mil
mdSmdVia = 8mil
mdSmdSmd = 8mil
mdViaViaSameLayer = 8mil
mnLayersViaInSmd = 2
mdCopperDimension = 40mil
mdDrill = 8mil
mdSmdStop = 0mil
msWidth = 8mil
msDrill = 24mil
msMicroVia = 9.99mm
msBlindViaRatio = 0.500000
rvPadTop = 0.250000
rvPadInner = 0.250000
rvPadBottom = 0.250000
rvViaOuter = 0.250000
rvViaInner = 0.250000
rvMicroViaOuter = 0.250000
rvMicroViaInner = 0.250000
rlMinPadTop = 10mil
rlMaxPadTop = 20mil
rlMinPadInner = 10mil
rlMaxPadInner = 20mil
rlMinPadBottom = 10mil
rlMaxPadBottom = 20mil
rlMinViaOuter = 8mil
rlMaxViaOuter = 20mil
rlMinViaInner = 8mil
rlMaxViaInner = 20mil
rlMinMicroViaOuter = 4mil
rlMaxMicroViaOuter = 20mil
rlMinMicroViaInner = 4mil
rlMaxMicroViaInner = 20mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 1.000000
mvCreamFrame = 0.000000
mlMinStopFrame = 4mil
mlMaxStopFrame = 4mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 0mil
mlViaStopLimit = 0mil
srRoundness = 0.000000
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalGap = 0.500000
slMinThermalGap = 20mil
slMaxThermalGap = 100mil
slAnnulusIsolate = 20mil
slThermalIsolate = 10mil
slAnnulusRestring = 0
slThermalRestring = 1
slThermalsForVias = 0
checkGrid = 0
checkAngle = 0
checkFont = 1
checkRestrict = 1
useDiameter = 13
maxErrors = 50

14116
files/pcb/v1.1/snesram.dsn Normal file

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#
# RTR file created by ELECTRA V2.3 made 03/02/2010 at 13:31:42
#
set run_memory 1
set run_fanout 1
set run_init_route 1
set run_init_clean 1
set run_final_route 1
set run_final_clean 1
set run_filter 1
set run_miter 1
set via_at_smd 1
set via_at_smd_grid 4
set via_at_smd_fit 0
set sharing_pin 0
set sharing_via 0
set fanout_dir 2
set fanout_dist 0
set share_dist 0
set init_route_passes 10
set init_clean_passes 2
set final_route_passes 10
set final_clean_passes 2
set fanout_passes 5
set filter_passes 5

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____________________________________________________________________________________________
ELECTRA DEMO Version 2.3
Design = C:/windows/profiles/david/My Documents/Dropbox/Tech/Quickdev16/pcb/v1.1/snesram.dsn
Report Time = 13:31:57
Nets = 204
Components = 50
Connections = 561
Vias = 76
Routed Length = 314.9 mm
Signal Layers = 2
Power Layers = 0
Total Pins = 1491
Completion = 0.00%
Unroutes = 594
Routing Time = 00:00:15
____________________________________________________________________________________________
| | | | | | | | | | |
| # | Algo | Shorts |DRC Errs|Failures|Unwired | Vias | %Red | Time | Total |
|_____|__________|________|________|________|________|________|________|_________|_________|
| 0| Bus | 12| 3509| 0| 53| 234| | 0:00:00| 0:00:00|
| 1| Fanout | 12| 3509| 61| 53| 234| | 0:00:00| 0:00:00|
| 2| Fanout | 12| 3509| 61| 53| 234| | 0:00:00| 0:00:00|
| 3| Fanout | 12| 3509| 61| 53| 234| | 0:00:00| 0:00:00|
| 4| Fanout | 12| 3509| 61| 53| 234| | 0:00:00| 0:00:00|
| 5| Fanout | 12| 3509| 61| 53| 234| | 0:00:00| 0:00:00|
| 6| Route | 14| 3494| 599| 53| 229| 0| 0:00:01| 0:00:01|
| 7| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:01|
| 8| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:02|
| 9| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:02|
| 10| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:03|
| 11| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:03|
| 12| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:04|
| 13| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:04|
| 14| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:05|
| 15| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:05|
| 16| Clean | 14| 3490| 605| 53| 228| | 0:00:01| 0:00:06|
| 17| Clean | 12| 3487| 593| 53| 228| | 0:00:01| 0:00:07|
| 18| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:07|
| 19| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:08|
| 20| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:08|
| 21| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:09|
| 22| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:09|
| 23| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:10|
| 24| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:10|
| 25| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:11|
| 26| Route | 14| 3490| 593| 53| 228| 0| 0:00:00| 0:00:11|
| 27| Route | 14| 3490| 593| 53| 228| 0| 0:00:01| 0:00:12|
| 28| Clean | 14| 3490| 605| 53| 228| | 0:00:00| 0:00:12|
| 29| Clean | 12| 3487| 593| 53| 228| | 0:00:01| 0:00:13|
| 30| Filter | 12| 2131| 593| 152| 140| 38| 0:00:00| 0:00:13|
| 31| Filter | 7| 1450| 593| 251| 98| 32| 0:00:01| 0:00:14|
| 32| Filter | 7| 488| 593| 443| 95| 66| 0:00:00| 0:00:14|
| 33| Filter | 4| 241| 593| 515| 78| 50| 0:00:01| 0:00:15|
| 34| Filter | 0| 140| 605| 594| 76| 42| 0:00:00| 0:00:15|
| 34| Recorner | 0| 140| 0| 594| 76| | 0:00:00| 0:00:15|
|_____|__________|________|________|________|________|________|________|_________|_________|

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#
# DO file created by ELECTRA V2.3 made 03/02/2010 at 13:31:42
#
bus diagonal
fanout 5 (direction out)
route 10
clean 2
route 10 16
clean 2
filter 5
recorner diagonal
status_file

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files/pcb/v1.2/snesram.brd Normal file

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description = <b>EAGLE Design Rules Prototypen für PCB-POOL(R)</b>\n<p>\nWir haben in diesem DRU File alle notwendigen Design Einstellungen vorgenommen, damit Sie Ihre Leiterplatte \ngemäß unseren Mindestanforderungen bestellen können. Die Optionen Shapes und Misc sind dabei nicht relevant.\nDer minimale und maximale Wert für Roundness Shapes kann frei gewählt werden.\nBitte beachten Sie, daß die Mindesteinstellungen nicht geändert werden, da ansonsten keine Gewährleistung für eine \nfehlerfreie Produktion übernommen werden kann.<br>\nAbzudeckende Vias können in Masks (unter Limit) eingestellt werden.\n</p>Ihr Beta LAYOUT Team\n<p><p>\n<b>EAGLE Design Rules Prototypes to use with PCB-POOL(R)</b>\n<p>\nThe design rules in this DRU file have been set to cover our minimum requirements, the options Shapes and Misc are not\nrelevant. Values for Roundness (Shapes) can be chosen freely. Please do not change these minimum\nrequirements to avoid problems during production.<br>\nCovered vias can be set in Masks (Limit).\n\n</p>Your Beta LAYOUT Team
layerSetup = (1*16)
mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
mtIsolate = 1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
mdWireWire = 6mil
mdWirePad = 6mil
mdWireVia = 6mil
mdPadPad = 6mil
mdPadVia = 6mil
mdViaVia = 6mil
mdSmdPad = 6mil
mdSmdVia = 6mil
mdSmdSmd = 6mil
mdViaViaSameLayer = 8mil
mnLayersViaInSmd = 2
mdCopperDimension = 20mil
mdDrill = 8mil
mdSmdStop = 0mil
msWidth = 6mil
msDrill = 12mil
msMicroVia = 999mil
msBlindViaRatio = 0.500000
rvPadTop = 0.000000
rvPadInner = 0.000000
rvPadBottom = 0.000000
rvViaOuter = 0.000000
rvViaInner = 0.000000
rvMicroViaOuter = 0.000000
rvMicroViaInner = 0.000000
rlMinPadTop = 8mil
rlMaxPadTop = 100mil
rlMinPadInner = 8mil
rlMaxPadInner = 100mil
rlMinPadBottom = 8mil
rlMaxPadBottom = 100mil
rlMinViaOuter = 6mil
rlMaxViaOuter = 100mil
rlMinViaInner = 8mil
rlMaxViaInner = 100mil
rlMinMicroViaOuter = 99mil
rlMaxMicroViaOuter = 999mil
rlMinMicroViaInner = 99mil
rlMaxMicroViaInner = 999mil
psTop = -1
psBottom = -1
psFirst = -1
psElongationLong = 100
psElongationOffset = 100
mvStopFrame = 0.000000
mvCreamFrame = 0.000000
mlMinStopFrame = 3mil
mlMaxStopFrame = 8mil
mlMinCreamFrame = 0mil
mlMaxCreamFrame = 8mil
mlViaStopLimit = 0mil
srRoundness = 0.000000
srMinRoundness = 0mil
srMaxRoundness = 0mil
slThermalGap = 0.000000
slMinThermalGap = 8mil
slMaxThermalGap = 100mil
slAnnulusIsolate = 8mil
slThermalIsolate = 8mil
slAnnulusRestring = 1
slThermalRestring = 1
slThermalsForVias = 0
checkGrid = 0
checkAngle = 0
checkFont = 1
checkRestrict = 1
useDiameter = 13
maxErrors = 50

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EAGLE AutoRouter Statistics:
Job : C:/Dokumente und Einstellungen/max/Desktop/snesram/snesram.brd
Start at : 14:52:19 (25.05.2009)
End at : 14:52:21 (25.05.2009)
Elapsed time : 00:00:02
Signals : 187 RoutingGrid: 50 mil Layers: 2
Connections : 570 predefined: 565 ( 291 Vias )
Router memory : 27900
Passname : Busses Route Optimize1 Optimize2 Optimize3 Optimize4
Time per pass : 00:00:01 00:00:00 00:00:00 00:00:01 00:00:00 00:00:00
Number of Ripups : 0 0 0 0 0 0
max. Level : 0 1 0 0 0 0
max. Total : 0 0 0 0 0 0
Routed : 0 0 0 0 0 0
Vias : 0 0 0 0 0 0
Resolution : 99.1 % 99.1 % 99.1 % 99.1 % 99.1 % 99.1 %
Final : 99.1% beendet

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files/pcb/v1.4/brd_to_dsn.ulp Executable file

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files/pcb/v1.4/snesram.pro Executable file
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EAGLE AutoRouter Statistics:
Job : C:/Dokumente und Einstellungen/max/Desktop/snesram/snesram.brd
Start at : 14:52:19 (25.05.2009)
End at : 14:52:21 (25.05.2009)
Elapsed time : 00:00:02
Signals : 187 RoutingGrid: 50 mil Layers: 2
Connections : 570 predefined: 565 ( 291 Vias )
Router memory : 27900
Passname : Busses Route Optimize1 Optimize2 Optimize3 Optimize4
Time per pass : 00:00:01 00:00:00 00:00:00 00:00:01 00:00:00 00:00:00
Number of Ripups : 0 0 0 0 0 0
max. Level : 0 1 0 0 0 0
max. Total : 0 0 0 0 0 0
Routed : 0 0 0 0 0 0
Vias : 0 0 0 0 0 0
Resolution : 99.1 % 99.1 % 99.1 % 99.1 % 99.1 % 99.1 %
Final : 99.1% beendet

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