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o got working version with the atmega88 board

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This commit is contained in:
optixx 2009-05-03 19:02:19 +02:00
parent 59aad4c7a8
commit ec2ef98d59
4 changed files with 22 additions and 22 deletions
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8
poc/avr_usbload/Makefile
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@ -7,14 +7,14 @@
# License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) # License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
# This Revision: $Id: Makefile 692 2008-11-07 15:07:40Z cs $ # This Revision: $Id: Makefile 692 2008-11-07 15:07:40Z cs $
DEVICE = atmega16 DEVICE = atmega88
F_CPU = 16000000 # in Hz F_CPU = 20000000 # in Hz
FUSE_L = # see below for fuse values for particular devices FUSE_L = # see below for fuse values for particular devices
FUSE_H = FUSE_H =
AVRDUDE = avrdude -c stk500v2 -p $(DEVICE) -P /dev/tty.PL2303-00002006 AVRDUDE = avrdude -c usbasp -p $(DEVICE)
CFLAGS = -Iusbdrv -I. -DDEBUG_LEVEL=0 CFLAGS = -Iusbdrv -I. -DDEBUG_LEVEL=0
OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o main.o uart.o fifo.o sram.o crc.o debug.o OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o main.o uart.o fifo.o crc.o debug.o
COMPILE = avr-gcc -Wall -Os -DF_CPU=$(F_CPU) $(CFLAGS) -mmcu=$(DEVICE) COMPILE = avr-gcc -Wall -Os -DF_CPU=$(F_CPU) $(CFLAGS) -mmcu=$(DEVICE)

2
poc/avr_usbload/commandline/snesuploader.c
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@ -19,7 +19,7 @@ respectively.
*/ */
#define BUFFER_SIZE 4 #define BUFFER_SIZE (128)
#define BUFFER_CRC (1024 * 64) #define BUFFER_CRC (1024 * 64)
#define BANK_SIZE (1<<15) #define BANK_SIZE (1<<15)

14
poc/avr_usbload/main.c
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@ -9,7 +9,7 @@
#include "oddebug.h" /* This is also an example for using debug macros */ #include "oddebug.h" /* This is also an example for using debug macros */
#include "requests.h" /* The custom request numbers we use */ #include "requests.h" /* The custom request numbers we use */
#include "uart.h" #include "uart.h"
#include "sram.h" //#include "sram.h"
#include "debug.h" #include "debug.h"
#include "crc.h" #include "crc.h"
@ -56,7 +56,7 @@ usbMsgLen_t usbFunctionSetup(uchar data[8]){
crc = 0; crc = 0;
cli(); cli();
for (addr=0x000000; addr<rom_addr; addr+=BUFFER_SIZE) { for (addr=0x000000; addr<rom_addr; addr+=BUFFER_SIZE) {
sram_read_buffer(addr,read_buffer,BUFFER_SIZE); //sram_read_buffer(addr,read_buffer,BUFFER_SIZE);
crc = do_crc_update(crc,read_buffer,BUFFER_SIZE); crc = do_crc_update(crc,read_buffer,BUFFER_SIZE);
//dump_packet(rom_addr,BUFFER_SIZE,read_buffer); //dump_packet(rom_addr,BUFFER_SIZE,read_buffer);
if (addr && addr%32768 == 0){ if (addr && addr%32768 == 0){
@ -80,7 +80,7 @@ uint8_t usbFunctionWrite(uint8_t *data, uint8_t len)
//printf("usbFunctionWrite addr=%lx len=%i remain=%i\n",rom_addr,len,bytes_remaining); //printf("usbFunctionWrite addr=%lx len=%i remain=%i\n",rom_addr,len,bytes_remaining);
cli(); cli();
sram_copy(rom_addr,data,len); //sram_copy(rom_addr,data,len);
sei(); sei();
rom_addr +=len; rom_addr +=len;
//printf("usbFunctionWrite %lx %x\n",rom_addr,len); //printf("usbFunctionWrite %lx %x\n",rom_addr,len);
@ -97,10 +97,10 @@ int main(void)
//wdt_enable(WDTO_1S); //wdt_enable(WDTO_1S);
uart_init(); uart_init();
stdout = &uart_stdout; stdout = &uart_stdout;
sram_init(); //sram_init();
printf("SRAM Init\n"); //printf("SRAM Init\n");
spi_init(); //spi_init();
printf("SPI Init\n"); //printf("SPI Init\n");
usbInit(); usbInit();
printf("USB Init\n"); printf("USB Init\n");
usbDeviceDisconnect(); /* enforce re-enumeration, do this while interrupts are disabled! */ usbDeviceDisconnect(); /* enforce re-enumeration, do this while interrupts are disabled! */

20
poc/avr_usbload/uart.c
View File

@ -24,18 +24,18 @@ FILE uart_stdout = FDEV_SETUP_STREAM(uart_stream, NULL, _FDEV_SETUP_WRITE);
void uart_init(void) void uart_init(void)
{ {
UCSRA = _BV(U2X); /* improves baud rate error @ F_CPU = 1 MHz */ UCSR0A = _BV(U2X0); /* improves baud rate error @ F_CPU = 1 MHz */
UCSRB = _BV(TXEN)|_BV(RXEN)|_BV(RXCIE); /* tx/rx enable, rx complete intr */ UCSR0B = _BV(TXEN0)|_BV(RXEN0)|_BV(RXCIE0); /* tx/rx enable, rx complete intr */
UBRRL = (F_CPU / (8 * 115200UL)) - 1; /* 9600 Bd */ UBRR0L = (F_CPU / (8 * 115200UL)) - 1; /* 9600 Bd */
} }
ISR(USART_RXC_vect) ISR(USART_RX_vect)
{ {
uint8_t c; uint8_t c;
c = UDR; c = UDR0;
if (bit_is_clear(UCSRA, FE)){ if (bit_is_clear(UCSR0A, FE0)){
rxbuff = c; rxbuff = c;
intflags.rx_int = 1; intflags.rx_int = 1;
} }
@ -44,8 +44,8 @@ ISR(USART_RXC_vect)
void uart_putc(uint8_t c) void uart_putc(uint8_t c)
{ {
loop_until_bit_is_set(UCSRA, UDRE); loop_until_bit_is_set(UCSR0A, UDRE0);
UDR = c; UDR0 = c;
} }
@ -72,8 +72,8 @@ static int uart_stream(char c, FILE *stream)
{ {
if (c == '\n') if (c == '\n')
uart_putc('\r'); uart_putc('\r');
loop_until_bit_is_set(UCSRA, UDRE); loop_until_bit_is_set(UCSR0A, UDRE0);
UDR = c; UDR0 = c;
return 0; return 0;
} }