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godzil:master godzil:deflate godzil:progmem godzil:mmc godzil:sdcard godzil:fatfs godzil:huffman godzil:—-track godzil:debug godzil:v46 godzil:usbload godzil:mem_compact godzil:asciiclean godzil:sdcard_m32
godzil:quickdev16_hw_v1.5

1 Commits
deflate ... usbload

Author SHA1 Message Date
optixx
ec2ef98d59 o got working version with the atmega88 board 2009-05-03 19:02:19 +02:00
1587 changed files with 262227 additions and 505663 deletions
Expand all files Collapse all files

4
.ditz-config Normal file
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@@ -0,0 +1,4 @@
--- !ditz.rubyforge.org,2008-03-06/config
name: David
email: david@optixx.org
issue_dir: bugs

15
.gitignore vendored
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@@ -21,18 +21,3 @@
*.swc *.swc
*.rom *.rom
*.usage *.usage
*.moc
*.obj
*.TMP
*.vfat
*.wla*
*.rcc
*.log
bootloader
snesuploader
tmtags
bsnes
web
ucon64.exe

3
.gitmodules vendored
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@@ -1,3 +0,0 @@
[submodule "scripts/webpy"]
path = scripts/webpy
url = git://github.com/webpy/webpy.git

9
README
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@@ -1,8 +1 @@
________ .__ __ ________ ____ ________ o Test
\_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
/ / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
/ \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
\_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
\__> \/ \/ \/ \/ \/
www.optixx.org

78
avr/bootloader/Makefile
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@@ -1,78 +0,0 @@
# microcontroller and project specific settings
TARGET = bootloader
F_CPU = 20000000UL
MCU = atmega644
SRC = bootloader.c
ASRC = usbdrv/usbdrvasm.S interrupts.S
OBJECTS += $(patsubst %.c,%.o,${SRC})
OBJECTS += $(patsubst %.S,%.o,${ASRC})
HEADERS += $(shell echo *.h)
# CFLAGS += -Werror
LDFLAGS += -L/usr/local/avr/avr/lib
CFLAGS += -Iusbdrv -I.
CFLAGS += -DHARDWARE_REV=$(HARDWARE_REV)
CDEFS += -DF_CPU
ASFLAGS += -x assembler-with-cpp
ASFLAGS += -Iusbdrv -I.
# use own linkerscript, for special interrupt table handling
LDFLAGS += -T ./ldscripts/avr5.x
# no safe mode checks
AVRDUDE_FLAGS += -u
# set name for dependency-file
MAKEFILE = Makefile
# bootloader section start
# (see datasheet)
ifeq ($(MCU),atmega168)
# atmega168 with 1024 words bootloader:
# bootloader section starts at 0x1c00 (word-address) == 0x3800 (byte-address)
BOOT_SECTION_START = 0x3800
else ifeq ($(MCU),atmega88)
# atmega88 with 1024 words bootloader:
# bootloader section starts at 0xc00 (word-address) == 0x1800 (byte-address)
BOOT_SECTION_START = 0x1800
else ifeq ($(MCU),atmega644)
# atmega644 with 2048 words bootloader:
# bootloader section starts at 0x7800 (word-address) == 0xF000 (byte-address)
BOOT_SECTION_START = 0xf000
endif
LDFLAGS += -Wl,--section-start=.text=$(BOOT_SECTION_START) -Wl,-u,vfprintf
CFLAGS += -DBOOT_SECTION_START=$(BOOT_SECTION_START)
include avr.mk
.PHONY: all
all: $(TARGET).hex $(TARGET).lss
@echo "==============================="
@echo "$(TARGET) compiled for: $(MCU)"
@echo -n "size is: "
@$(SIZE) -A $(TARGET).hex | grep "\.sec1" | tr -s " " | cut -d" " -f2
@echo "==============================="
$(TARGET): $(OBJECTS) $(TARGET).o
%.o: $(HEADERS)
.PHONY: clean clean-$(TARGET)
clean: clean-$(TARGET)
clean-$(TARGET):
$(RM) $(TARGET) $(OBJECTS)
.PHONY: depend test
depend:
$(CC) $(CFLAGS) -M $(CDEFS) $(CINCS) $(SRC) >> $(MAKEFILE).dep
-include $(MAKEFILE).dep

86
avr/bootloader/avr.mk
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@@ -1,86 +0,0 @@
# Programmer used for In System Programming
ISP_PROG = usbasp
# device the ISP programmer is connected to
ISP_DEV =
# Programmer used for serial programming (using the bootloader)
SERIAL_PROG = avr109
# device the serial programmer is connected to
SERIAL_DEV = /dev/ttyS0
# programs
CC = avr-gcc
OBJCOPY = avr-objcopy
OBJDUMP = avr-objdump
AS = avr-as
CP = cp
RM = rm -f
AVRDUDE = avrdude
SIZE = avr-size
-include $(CURDIR)/config.mk
# flags for avrdude
ifeq ($(MCU),atmega8)
AVRDUDE_MCU=m8
endif
ifeq ($(MCU),atmega48)
AVRDUDE_MCU=m48
endif
ifeq ($(MCU),atmega88)
AVRDUDE_MCU=m88
endif
ifeq ($(MCU),atmega168)
AVRDUDE_MCU=m168
endif
ifeq ($(MCU),atmega644)
AVRDUDE_MCU=m644
endif
AVRDUDE_FLAGS += -p $(AVRDUDE_MCU)
# flags for the compiler
CFLAGS += -g -Os -finline-limit=800 -mmcu=$(MCU) -DF_CPU=$(F_CPU) -std=gnu99
ASFLAGS += -g -mmcu=$(MCU) -DF_CPU=$(F_CPU)
# flags for the linker
LDFLAGS += -mmcu=$(MCU)
ifneq ($(DEBUG),)
CFLAGS += -Wall -W -Wchar-subscripts -Wmissing-prototypes
CFLAGS += -Wmissing-declarations -Wredundant-decls
CFLAGS += -Wstrict-prototypes -Wshadow -Wbad-function-cast
CFLAGS += -Winline -Wpointer-arith -Wsign-compare
#CFLAGS += -Wunreachable-code -Wdisabled-optimization -Werror
CFLAGS += -Wunreachable-code -Wdisabled-optimization
CFLAGS += -Wcast-align -Wwrite-strings -Wnested-externs -Wundef
CFLAGS += -Wa,-adhlns=$(basename $@).lst
CFLAGS += -DDEBUG
endif
all:
$(OBJECTS):
clean:
$(RM) *.hex *.eep.hex *.o *.lst *.lss
.PHONY: all clean interactive-isp interactive-serial launch-bootloader
flash: bootloader.hex
$(AVRDUDE) $(AVRDUDE_FLAGS) -c $(ISP_PROG) -U flash:w:$<
flash-eeprom-%: %.eep.hex
$(AVRDUDE) $(AVRDUDE_FLAGS) -c $(ISP_PROG) -P $(ISP_DEV) -U eeprom:w:$<
%.hex: %
$(OBJCOPY) -O ihex -R .eeprom $< $@
%.eep.hex: %
$(OBJCOPY) --set-section-flags=.eeprom="alloc,load" --change-section-lma .eeprom=0 -O ihex -j .eeprom $< $@
%.lss: %
$(OBJDUMP) -h -S $< > $@
%-size: %.hex
$(SIZE) $<

558
avr/bootloader/bootloader.c
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@@ -1,558 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* simple USBasp compatible bootloader by
* Alexander Neumann <alexander@lochraster.org>
* inspired by USBasploader by Christian Starkjohann,
* =====================================================================================
*/
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
#include <avr/boot.h>
#include <avr/eeprom.h>
#include <util/delay.h>
#include <string.h>
#include <avr/wdt.h>
#include "config.h"
#include "usbdrv/usbdrv.c"
/*
* USBasp requests, taken from the original USBasp sourcecode
*/
#define USBASP_FUNC_CONNECT 1
#define USBASP_FUNC_DISCONNECT 2
#define USBASP_FUNC_TRANSMIT 3
#define USBASP_FUNC_READFLASH 4
#define USBASP_FUNC_ENABLEPROG 5
#define USBASP_FUNC_WRITEFLASH 6
#define USBASP_FUNC_READEEPROM 7
#define USBASP_FUNC_WRITEEEPROM 8
#define USBASP_FUNC_SETLONGADDRESS 9
/*
* additional functions
*/
#define FUNC_ECHO 0x17
/*
* atmel isp commands
*/
#define ISP_CHIP_ERASE1 0xAC
#define ISP_CHIP_ERASE2 0x80
#define ISP_READ_SIGNATURE 0x30
#define ISP_READ_EEPROM 0xa0
#define ISP_WRITE_EEPROM 0xc0
#define LED_PORT PORTC
#define LED_DIR DDRC
#define LED_PIN PC7
#define DLED_ON {((LED_PORT &=~ (1 << LED_PIN)),\
(LED_DIR &=~ (1 << LED_PIN))); }
#define DLED_OFF {((LED_PORT &=~ (1 << LED_PIN)),\
(LED_DIR |= (1 << LED_PIN))); }
#define DLED_TGL {((LED_PORT &=~ (1 << LED_PIN)),\
(LED_DIR ^= (1 << LED_PIN)));}
#define AVR_BTLDR_EN_PORT PORTC
#define AVR_BTLDR_EN_DIR DDRC
#define AVR_BTLDR_EN_PIN PC1
#define AVR_BTLDR_EN_IN PINC
#undef AVR_BTLDR_SWITCH
/*
* some predefined signatures, taken from the original USBasp sourcecode
*/
static const uint8_t signature[4] = {
#ifdef SIGNATURE_BYTES
SIGNATURE_BYTES
#elif defined (__AVR_ATmega8__) || defined (__AVR_ATmega8HVA__)
0x1e, 0x93, 0x07, 0
#elif defined (__AVR_ATmega48__) || defined (__AVR_ATmega48P__)
0x1e, 0x92, 0x05, 0
#elif defined (__AVR_ATmega88__) || defined (__AVR_ATmega88P__)
0x1e, 0x93, 0x0a, 0
#elif defined (__AVR_ATmega168__) || defined (__AVR_ATmega168P__)
0x1e, 0x94, 0x06, 0
#elif defined (__AVR_ATmega328P__)
0x1e, 0x95, 0x0f, 0
#elif defined (__AVR_ATmega644__)
0x1e, 0x96, 0x09, 0
#else
# error "Device signature is not known, please edit config.h!"
#endif
};
#ifndef BOOT_SECTION_START
# error "BOOT_SECTION_START undefined!"
#endif
#if defined (__AVR_ATmega644__)
/*
* Due arvdude limitations we can't erase the whole progmem without running into an usb timeount on cleint side. So we we limit the
* erase section by 0x1000
*/
#define ERASE_SECTION 0xe000
#else
#define ERASE_SECTION BOOT_SECTION_START
#endif
#ifdef DEBUG_UART
static __attribute__ ((__noinline__))
void uart_putc(uint8_t data)
{
while (!(UCSR0A & _BV(UDRE0)));
UDR0 = data;
}
#else
#define uart_putc(x)
#endif
#ifdef DEBUG_UART
static __attribute__ ((__noinline__))
void uart_puts(uint8_t * data)
{
while (*data) {
uart_putc(*data);
data++;
}
}
#else
#define uart_puts(x)
#endif
/*
* supply custom usbDeviceConnect() and usbDeviceDisconnect() macros which turn the interrupt on and off at the right times, and prevent
* the execution of an interrupt while the pullup resistor is switched off
*/
#ifdef USB_CFG_PULLUP_IOPORTNAME
#undef usbDeviceConnect
#define usbDeviceConnect() do { \
USB_PULLUP_DDR |= (1<<USB_CFG_PULLUP_BIT); \
USB_PULLUP_OUT |= (1<<USB_CFG_PULLUP_BIT); \
USB_INTR_ENABLE |= (1 << USB_INTR_ENABLE_BIT); \
} while(0);
#undef usbDeviceDisconnect
#define usbDeviceDisconnect() do { \
USB_INTR_ENABLE &= ~(1 << USB_INTR_ENABLE_BIT); \
USB_PULLUP_DDR &= ~(1<<USB_CFG_PULLUP_BIT); \
USB_PULLUP_OUT &= ~(1<<USB_CFG_PULLUP_BIT); \
} while(0);
#endif
/*
* prototypes
*/
void __attribute__ ((__noreturn__, __noinline__,
__naked__)) leave_bootloader(void);
/*
* we just support flash sizes <= 64kb, for code size reasons if you need to program bigger devices, have a look at USBasploader:
* http://www.obdev.at/products/avrusb/usbasploader.html
*/
#if FLASHEND > 0xffff
# error "usbload only supports up to 64kb of flash!"
#endif
/*
* we are just checking the lower byte of flash_address, so make sure SPM_PAGESIZE is <= 256
*/
#if SPM_PAGESIZE > 256
# error "SPM_PAGESIZE is too big (just checking lower byte)"
#endif
/*
* start flash (byte address) read/write at this address
*/
usbWord_t flash_address;
uint8_t bytes_remaining;
uint8_t request;
uint8_t request_exit;
uint8_t timeout;
usbMsgLen_t usbFunctionSetup(uchar data[8])
{
usbRequest_t *req = (void *) data;
uint8_t len = 0;
static uint8_t buf[4];
/*
* set global data pointer to local buffer
*/
usbMsgPtr = buf;
/*
* on enableprog just return one zero, which means success
*/
if (req->bRequest == USBASP_FUNC_ENABLEPROG) {
buf[0] = 0;
len = 1;
timeout = 255;
} else if (req->bRequest == USBASP_FUNC_CONNECT) {
/*
* turn on led
*/
DLED_ON;
} else if (req->bRequest == USBASP_FUNC_DISCONNECT) {
/*
* turn off led
*/
DLED_OFF;
request_exit = 1;
/*
* catch query for the devicecode, chip erase and eeprom byte requests
*/
} else if (req->bRequest == USBASP_FUNC_TRANSMIT) {
/*
* reset buffer with zeroes
*/
memset(buf, '\0', sizeof(buf));
/*
* read the address for eeprom operations
*/
usbWord_t address;
address.bytes[0] = data[4]; /* low byte is data[4] */
address.bytes[1] = data[3]; /* high byte is data[3] */
/*
* if this is a request to read the device signature, answer with the appropiate signature byte
*/
if (data[2] == ISP_READ_SIGNATURE) {
/*
* the complete isp data is reported back to avrdude, but we just need byte 4 bits 0 and 1 of byte 3 determine the signature
* byte address
*/
buf[3] = signature[data[4] & 0x03];
#ifdef ENABLE_CATCH_EEPROM_ISP
/*
* catch eeprom read
*/
} else if (data[2] == ISP_READ_EEPROM) {
buf[3] = eeprom_read_byte((uint8_t *) address.word);
/*
* catch eeprom write
*/
} else if (data[2] == ISP_WRITE_EEPROM) {
/*
* address is in data[4], data[3], and databyte is in data[5]
*/
eeprom_write_byte((uint8_t *) address.word, data[5]);
#endif
/*
* catch a chip erase
*/
} else if (data[2] == ISP_CHIP_ERASE1 && data[3] == ISP_CHIP_ERASE2) {
uart_puts("\n\rErase Flash");
for (flash_address.word = 0;
flash_address.word < ERASE_SECTION;
flash_address.word += SPM_PAGESIZE) {
/*
* wait and erase page
*/
boot_spm_busy_wait();
if (flash_address.word && flash_address.word % 1024 == 0)
uart_putc('.');
cli();
boot_page_erase(flash_address.word);
sei();
}
uart_puts("\n\rWrite Flash");
}
/*
* in case no data has been filled in by the if's above, just return zeroes
*/
len = 4;
#ifdef ENABLE_ECHO_FUNC
/*
* implement a simple echo function, for testing the usb connectivity
*/
} else if (req->bRequest == FUNC_ECHO) {
buf[0] = req->wValue.bytes[0];
buf[1] = req->wValue.bytes[1];
len = 2;
#endif
} else if (req->bRequest >= USBASP_FUNC_READFLASH) {
/*
* && req->bRequest <= USBASP_FUNC_SETLONGADDRESS
*/
/*
* extract address and length
*/
flash_address.word = req->wValue.word;
bytes_remaining = req->wLength.bytes[0];
request = req->bRequest;
/*
* hand control over to usbFunctionRead()/usbFunctionWrite()
*/
len = 0xff;
}
return len;
}
uchar usbFunctionWrite(uchar * data, uchar len)
{
if (len > bytes_remaining)
len = bytes_remaining;
bytes_remaining -= len;
if (request == USBASP_FUNC_WRITEEEPROM) {
for (uint8_t i = 0; i < len; i++)
eeprom_write_byte((uint8_t *) flash_address.word++, *data++);
} else {
/*
* data is handled wordwise, adjust len
*/
len /= 2;
len -= 1;
for (uint8_t i = 0; i <= len; i++) {
uint16_t *w = (uint16_t *) data;
cli();
boot_page_fill(flash_address.word, *w);
sei();
usbWord_t next_address;
next_address.word = flash_address.word;
next_address.word += 2;
data += 2;
/*
* write page if page boundary is crossed or this is the last page
*/
if (next_address.bytes[0] % SPM_PAGESIZE == 0 ||
(bytes_remaining == 0 && i == len)) {
cli();
boot_page_write(flash_address.word);
sei();
boot_spm_busy_wait();
cli();
boot_rww_enable();
sei();
}
flash_address.word = next_address.word;
}
}
/*
* flash led on activity
*/
DLED_TGL;
return (bytes_remaining == 0);
}
uchar usbFunctionRead(uchar * data, uchar len)
{
if (len > bytes_remaining)
len = bytes_remaining;
bytes_remaining -= len;
for (uint8_t i = 0; i < len; i++) {
if (request == USBASP_FUNC_READEEPROM)
*data = eeprom_read_byte((void *) flash_address.word);
else
*data = pgm_read_byte_near((void *) flash_address.word);
data++;
flash_address.word++;
}
/*
* flash led on activity
*/
DLED_TGL;
return len;
}
void (*jump_to_app) (void) = 0x0000;
void leave_bootloader(void)
{
cli();
/*
* disconnect usb
*/
usbDeviceDisconnect();
#if 0
for (uint8_t i = 0; i < 50; i++)
_delay_ms(10); /* 0 means 0x10000, 38*1/f*0x10000 =~ 498ms */
#endif
/*
* enable watchdog to soft-reset the uC for clean startup of new application
*/
wdt_enable(WDTO_15MS);
/*
* let watchdog kick in and reset uC
*/
while (1);
}
void banner(){
uart_puts("\n\r");
uart_puts("\n\r");
uart_puts("\n\r");
uart_puts("Quickdev16 Bootloader v0.2\n\r");
uart_puts("www.optixx.org\n\r");
}
int __attribute__ ((noreturn, OS_main)) main(void)
{
/*
* start bootloader
*/
#ifdef DEBUG_UART
/*
* init uart (115200 baud, at 20mhz)
*/
UBRR0L = 10;
UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
UCSR0B = _BV(TXEN0);
#endif
uint8_t reset = MCUSR;
uint16_t delay = 0;
timeout = TIMEOUT;
DDRC &= ~(1 << AVR_BTLDR_EN_PIN);
PORTC &= ~(1 << AVR_BTLDR_EN_PIN);
/*
* if watchdog reset, disable watchdog and jump to app
*/
if (reset & _BV(WDRF)) {
uart_puts("Found watchdog reset\n\r");
MCUSR = 0;
wdt_disable();
uart_puts("Jump to 0x0000\n\r");
jump_to_app();
}
#ifdef AVR_BTLDR_SWITCH ENABLE
if ((AVR_BTLDR_EN_IN & ( 1 << AVR_BTLDR_EN_PIN)) == 0){
banner();
uart_puts("Bootloader flashing is disabled\n\r");
MCUSR = 0;
leave_bootloader();
}
#endif
/*
* if power-on reset, quit bootloader via watchdog reset
*/
if (reset & _BV(PORF)) {
banner();
uart_puts("Found power on reset\n\r");
MCUSR = 0;
leave_bootloader();
}
banner();
uart_puts("Enter programming mode\n\r");
/*
* else: enter programming mode
*/
/*
* clear external reset flags
*/
MCUSR = 0;
/*
* init exit request state
*/
request_exit = 0;
/*
* move interrupts to boot section
*/
MCUCR = (1 << IVCE);
MCUCR = (1 << IVSEL);
/*
* enable interrupts
*/
sei();
/*
* initialize usb pins
*/
usbInit();
/*
* disconnect for ~500ms, so that the host re-enumerates this device
*/
usbDeviceDisconnect();
for (uint8_t i = 0; i < 50; i++)
_delay_ms(10); /* 0 means 0x10000, 38*1/f*0x10000 =~ 498ms */
usbDeviceConnect();
uart_puts("Wait for firmware");
while (1) {
usbPoll();
delay++;
/*
* do some led blinking, so that it is visible that the bootloader is still running
*/
if (delay == 0) {
uart_putc('.');
DLED_TGL;
if (timeout < 255)
timeout--;
}
if (request_exit || timeout == 0) {
uart_puts("\n\rExit\n\r");
_delay_ms(10);
leave_bootloader();
}
}
}

22
avr/bootloader/config.h
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@@ -1,22 +0,0 @@
/* configuratino file for usbload */
/* after this timeout, the main application ist started, if no usb
* connection is detected */
#define TIMEOUT 50
/* uncomment this if you need to define some other signature bytes */
//#define SIGNATURE_BYTES 0x23, 0x24, 0x25, 0
/* uncomment this if you want to catch the eeprom isp bytewise read/write
* commands. costs ~34 byte */
//#define ENABLE_CATCH_EEPROM_ISP
/* uncomment this if you want a usb echo function (for communication testing) */
//#define ENABLE_ECHO_FUNC
/* uncomment this for debug information via uart */
#define DEBUG_UART
#define DEBUG 1
#define DEBUG_USB 2

21
avr/bootloader/fuses.txt
View File

@@ -1,21 +0,0 @@
additional fuse bit settings for using this bootloader:
=======================================================
atmega88/168:
extended fuse byte:
1024 words bootloader size: BOOTSZ0 = 0
BOOTSZ1 = 0
reset vector, jump to bootloader on reset: BOOTRST = 0
-> default: 0b001 = 0x01
new: 0b000 = 0x00
lock byte:
SPM is not allowed to write to the Boot Loader section BLB12 = 1
BLB11 = 0
-> default: 0b111111 = 0x3f
new: 0b101111 = 0x2f

9
avr/bootloader/interrupts.S
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@@ -1,9 +0,0 @@
.extern __init, __vector_1
.global __vector_default, exit
.section .vectors.bootloader
/* micro-jumptable, we are using just reset and int0 vectors */
exit:
__vector_default:
jmp __init
jmp __vector_1

174
avr/bootloader/ldscripts/avr5.x
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@@ -1,174 +0,0 @@
/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-avr","elf32-avr","elf32-avr")
OUTPUT_ARCH(avr:5)
MEMORY
{
text (rx) : ORIGIN = 0, LENGTH = 128K
data (rw!x) : ORIGIN = 0x800060, LENGTH = 0xffa0
eeprom (rw!x) : ORIGIN = 0x810000, LENGTH = 64K
}
SECTIONS
{
/* Read-only sections, merged into text segment: */
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.gnu.version : { *(.gnu.version) }
.gnu.version_d : { *(.gnu.version_d) }
.gnu.version_r : { *(.gnu.version_r) }
.rel.init : { *(.rel.init) }
.rela.init : { *(.rela.init) }
.rel.text :
{
*(.rel.text)
*(.rel.text.*)
*(.rel.gnu.linkonce.t*)
}
.rela.text :
{
*(.rela.text)
*(.rela.text.*)
*(.rela.gnu.linkonce.t*)
}
.rel.fini : { *(.rel.fini) }
.rela.fini : { *(.rela.fini) }
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}

146
avr/bootloader/usbdrv/Readme.txt
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@@ -1,146 +0,0 @@
This is the Readme file to Objective Development's firmware-only USB driver
for Atmel AVR microcontrollers. For more information please visit
http://www.obdev.at/avrusb/
This directory contains the USB firmware only. Copy it as-is to your own
project and add all .c and .S files to your project (these files are marked
with an asterisk in the list below). Then copy usbconfig-prototype.h as
usbconfig.h to your project and edit it according to your configuration.
TECHNICAL DOCUMENTATION
=======================
The technical documentation (API) for the firmware driver is contained in the
file "usbdrv.h". Please read all of it carefully! Configuration options are
documented in "usbconfig-prototype.h".
The driver consists of the following files:
Readme.txt ............. The file you are currently reading.
Changelog.txt .......... Release notes for all versions of the driver.
usbdrv.h ............... Driver interface definitions and technical docs.
* usbdrv.c ............... High level language part of the driver. Link this
module to your code!
* usbdrvasm.S ............ Assembler part of the driver. This module is mostly
a stub and includes one of the usbdrvasm*.S files
depending on processor clock. Link this module to
your code!
usbdrvasm*.inc ......... Assembler routines for particular clock frequencies.
Included by usbdrvasm.S, don't link it directly!
asmcommon.inc .......... Common assembler routines. Included by
usbdrvasm*.inc, don't link it directly!
usbconfig-prototype.h .. Prototype for your own usbdrv.h file.
* oddebug.c .............. Debug functions. Only used when DEBUG_LEVEL is
defined to a value greater than 0. Link this module
to your code!
oddebug.h .............. Interface definitions of the debug module.
iarcompat.h ............ Compatibility definitions for IAR C-compiler.
usbdrvasm.asm .......... Compatibility stub for IAR-C-compiler. Use this
module instead of usbdrvasm.S when you assembler
with IAR's tools.
License.txt ............ Open Source license for this driver.
CommercialLicense.txt .. Optional commercial license for this driver.
USBID-License.txt ...... Terms and conditions for using particular USB ID
values for particular purposes.
(*) ... These files should be linked to your project.
CPU CORE CLOCK FREQUENCY
========================
We supply assembler modules for clock frequencies of 12 MHz, 15 MHz, 16 MHz and
16.5 MHz. Other clock rates are not supported. The actual clock rate must be
configured in usbdrv.h unless you use the default 12 MHz.
12 MHz Clock
This is the traditional clock rate of AVR-USB because it's the lowest clock
rate where the timing constraints of the USB spec can be met.
15 MHz Clock
Similar to 12 MHz, but some NOPs inserted. On the other hand, the higher clock
rate allows for some loops which make the resulting code size somewhat smaller
than the 12 MHz version.
16 MHz Clock
This clock rate has been added for users of the Arduino board and other
ready-made boards which come with a fixed 16 MHz crystal. It's also an option
if you need the slightly higher clock rate for performance reasons. Since
16 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
is somewhat tricky and has to insert a leap cycle every third byte.
16.5 MHz Clock
The assembler module for this clock rate differs from the other modules because
it has been built for an RC oscillator with only 1% precision. The receiver
code inserts leap cycles to compensate for clock deviations. 1% is also the
precision which can be achieved by calibrating the internal RC oscillator of
the AVR. Please note that only AVRs with internal 64 MHz PLL oscillator can be
used since the 8 MHz RC oscillator cannot be trimmed up to 16.5 MHz. This
includes the very popular ATTiny25, ATTiny45, ATTiny85 series as well as the
ATTiny26.
See the EasyLogger example at http://www.obdev.at/avrusb/easylogger.html for
code which calibrates the RC oscillator based on the USB frame clock.
20 MHz Clock
This module is for people who won't do it with less than the maximum. Since
20 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
uses similar tricks as the 16 MHz module to insert leap cycles.
USB IDENTIFIERS
===============
Every USB device needs a vendor- and a product-identifier (VID and PID). VIDs
are obtained from usb.org for a price of 1,500 USD. Once you have a VID, you
can assign PIDs at will.
Since an entry level cost of 1,500 USD is too high for most small companies
and hobbyists, we provide some VID/PID pairs for free. See the file
USBID-License.txt for details.
Objective Development also has some license offerings which include product
IDs. See http://www.obdev.at/avrusb/ for details.
DEVELOPMENT SYSTEM
==================
This driver has been developed and optimized for the GNU compiler version 3
(gcc 3). It does work well with gcc 4, but with bigger code size. We recommend
that you use the GNU compiler suite because it is freely available. AVR-USB
has also been ported to the IAR compiler and assembler. It has been tested
with IAR 4.10B/W32 and 4.12A/W32 on an ATmega8 with the "small" and "tiny"
memory model. Not every release is tested with IAR CC and the driver may
therefore fail to compile with IAR. Please note that gcc is more efficient for
usbdrv.c because this module has been deliberately optimized for gcc.
USING AVR-USB FOR FREE
======================
The AVR firmware driver is published under the GNU General Public License
Version 2 (GPL2). See the file "License.txt" for details.
If you decide for the free GPL2, we STRONGLY ENCOURAGE you to do the following
things IN ADDITION to the obligations from the GPL2:
(1) Publish your entire project on a web site and drop us a note with the URL.
Use the form at http://www.obdev.at/avrusb/feedback.html for your submission.
If you don't have a web site, you can publish the project in obdev's
documentation wiki at
http://www.obdev.at/goto.php?t=avrusb-wiki&p=hosted-projects.
(2) Adhere to minimum publication standards. Please include AT LEAST:
- a circuit diagram in PDF, PNG or GIF format
- full source code for the host software
- a Readme.txt file in ASCII format which describes the purpose of the
project and what can be found in which directories and which files
- a reference to http://www.obdev.at/avrusb/
(3) If you improve the driver firmware itself, please give us a free license
to your modifications for our commercial license offerings.
COMMERCIAL LICENSES FOR AVR-USB
===============================
If you don't want to publish your source code under the terms of the GPL2,
you can simply pay money for AVR-USB. As an additional benefit you get
USB PIDs for free, licensed exclusively to you. See the file
"CommercialLicense.txt" for details.

178
avr/bootloader/usbdrv/asmcommon.inc
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@@ -1,178 +0,0 @@
/* Name: asmcommon.inc
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2007-11-05
* Tabsize: 4
* Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* Revision: $Id$
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file contains assembler code which is shared among the USB driver
implementations for different CPU cocks. Since the code must be inserted
in the middle of the module, it's split out into this file and #included.
Jump destinations called from outside:
sofError: Called when no start sequence was found.
se0: Called when a package has been successfully received.
overflow: Called when receive buffer overflows.
doReturn: Called after sending data.
Outside jump destinations used by this module:
waitForJ: Called to receive an already arriving packet.
sendAckAndReti:
sendNakAndReti:
sendCntAndReti:
usbSendAndReti:
The following macros must be defined before this file is included:
.macro POP_STANDARD
.endm
.macro POP_RETI
.endm
*/
#define token x1
overflow:
ldi x2, 1<<USB_INTR_PENDING_BIT
USB_STORE_PENDING(x2) ; clear any pending interrupts
ignorePacket:
clr token
rjmp storeTokenAndReturn
;----------------------------------------------------------------------------
; Processing of received packet (numbers in brackets are cycles after center of SE0)
;----------------------------------------------------------------------------
;This is the only non-error exit point for the software receiver loop
;we don't check any CRCs here because there is no time left.
se0:
subi cnt, USB_BUFSIZE ;[5]
neg cnt ;[6]
sub YL, cnt ;[7]
sbci YH, 0 ;[8]
ldi x2, 1<<USB_INTR_PENDING_BIT ;[9]
USB_STORE_PENDING(x2) ;[10] clear pending intr and check flag later. SE0 should be over.
ld token, y ;[11]
cpi token, USBPID_DATA0 ;[13]
breq handleData ;[14]
cpi token, USBPID_DATA1 ;[15]
breq handleData ;[16]
lds shift, usbDeviceAddr;[17]
ldd x2, y+1 ;[19] ADDR and 1 bit endpoint number
lsl x2 ;[21] shift out 1 bit endpoint number
cpse x2, shift ;[22]
rjmp ignorePacket ;[23]
/* only compute endpoint number in x3 if required later */
#if USB_CFG_HAVE_INTRIN_ENDPOINT || USB_CFG_IMPLEMENT_FN_WRITEOUT
ldd x3, y+2 ;[24] endpoint number + crc
rol x3 ;[26] shift in LSB of endpoint
#endif
cpi token, USBPID_IN ;[27]
breq handleIn ;[28]
cpi token, USBPID_SETUP ;[29]
breq handleSetupOrOut ;[30]
cpi token, USBPID_OUT ;[31]
brne ignorePacket ;[32] must be ack, nak or whatever
; rjmp handleSetupOrOut ; fallthrough
;Setup and Out are followed by a data packet two bit times (16 cycles) after
;the end of SE0. The sync code allows up to 40 cycles delay from the start of
;the sync pattern until the first bit is sampled. That's a total of 56 cycles.
handleSetupOrOut: ;[32]
#if USB_CFG_IMPLEMENT_FN_WRITEOUT /* if we have data for endpoint != 0, set usbCurrentTok to address */
andi x3, 0xf ;[32]
breq storeTokenAndReturn ;[33]
mov token, x3 ;[34] indicate that this is endpoint x OUT
#endif
storeTokenAndReturn:
sts usbCurrentTok, token;[35]
doReturn:
POP_STANDARD ;[37] 12...16 cycles
USB_LOAD_PENDING(YL) ;[49]
sbrc YL, USB_INTR_PENDING_BIT;[50] check whether data is already arriving
rjmp waitForJ ;[51] save the pops and pushes -- a new interrupt is already pending
sofError:
POP_RETI ;macro call
reti
handleData:
lds token, usbCurrentTok;[18]
tst token ;[20]
breq doReturn ;[21]
lds x2, usbRxLen ;[22]
tst x2 ;[24]
brne sendNakAndReti ;[25]
; 2006-03-11: The following two lines fix a problem where the device was not
; recognized if usbPoll() was called less frequently than once every 4 ms.
cpi cnt, 4 ;[26] zero sized data packets are status phase only -- ignore and ack
brmi sendAckAndReti ;[27] keep rx buffer clean -- we must not NAK next SETUP
sts usbRxLen, cnt ;[28] store received data, swap buffers
sts usbRxToken, token ;[30]
lds x2, usbInputBufOffset;[32] swap buffers
ldi cnt, USB_BUFSIZE ;[34]
sub cnt, x2 ;[35]
sts usbInputBufOffset, cnt;[36] buffers now swapped
rjmp sendAckAndReti ;[38] 40 + 17 = 57 until SOP
handleIn:
;We don't send any data as long as the C code has not processed the current
;input data and potentially updated the output data. That's more efficient
;in terms of code size than clearing the tx buffers when a packet is received.
lds x1, usbRxLen ;[30]
cpi x1, 1 ;[32] negative values are flow control, 0 means "buffer free"
brge sendNakAndReti ;[33] unprocessed input packet?
ldi x1, USBPID_NAK ;[34] prepare value for usbTxLen
#if USB_CFG_HAVE_INTRIN_ENDPOINT
andi x3, 0xf ;[35] x3 contains endpoint
brne handleIn1 ;[36]
#endif
lds cnt, usbTxLen ;[37]
sbrc cnt, 4 ;[39] all handshake tokens have bit 4 set
rjmp sendCntAndReti ;[40] 42 + 16 = 58 until SOP
sts usbTxLen, x1 ;[41] x1 == USBPID_NAK from above
ldi YL, lo8(usbTxBuf) ;[43]
ldi YH, hi8(usbTxBuf) ;[44]
rjmp usbSendAndReti ;[45] 57 + 12 = 59 until SOP
; Comment about when to set usbTxLen to USBPID_NAK:
; We should set it back when we receive the ACK from the host. This would
; be simple to implement: One static variable which stores whether the last
; tx was for endpoint 0 or 1 and a compare in the receiver to distinguish the
; ACK. However, we set it back immediately when we send the package,
; assuming that no error occurs and the host sends an ACK. We save one byte
; RAM this way and avoid potential problems with endless retries. The rest of
; the driver assumes error-free transfers anyway.
#if USB_CFG_HAVE_INTRIN_ENDPOINT /* placed here due to relative jump range */
handleIn1: ;[38]
#if USB_CFG_HAVE_INTRIN_ENDPOINT3
; 2006-06-10 as suggested by O.Tamura: support second INTR IN / BULK IN endpoint
cpi x3, USB_CFG_EP3_NUMBER;[38]
breq handleIn3 ;[39]
#endif
lds cnt, usbTxLen1 ;[40]
sbrc cnt, 4 ;[42] all handshake tokens have bit 4 set
rjmp sendCntAndReti ;[43] 47 + 16 = 63 until SOP
sts usbTxLen1, x1 ;[44] x1 == USBPID_NAK from above
ldi YL, lo8(usbTxBuf1) ;[46]
ldi YH, hi8(usbTxBuf1) ;[47]
rjmp usbSendAndReti ;[48] 50 + 12 = 62 until SOP
#endif
#if USB_CFG_HAVE_INTRIN_ENDPOINT && USB_CFG_HAVE_INTRIN_ENDPOINT3
handleIn3:
lds cnt, usbTxLen3 ;[41]
sbrc cnt, 4 ;[43]
rjmp sendCntAndReti ;[44] 49 + 16 = 65 until SOP
sts usbTxLen3, x1 ;[45] x1 == USBPID_NAK from above
ldi YL, lo8(usbTxBuf3) ;[47]
ldi YH, hi8(usbTxBuf3) ;[48]
rjmp usbSendAndReti ;[49] 51 + 12 = 63 until SOP
#endif

65
avr/bootloader/usbdrv/iarcompat.h
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@@ -1,65 +0,0 @@
/* Name: iarcompat.h
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2006-03-01
* Tabsize: 4
* Copyright: (c) 2006 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* This Revision: $Id: iarcompat.h 533 2008-02-28 15:35:25Z cs $
*/
/*
General Description:
This header is included when we compile with the IAR C-compiler and assembler.
It defines macros for cross compatibility between gcc and IAR-cc.
Thanks to Oleg Semyonov for his help with the IAR tools port!
*/
#ifndef __iarcompat_h_INCLUDED__
#define __iarcompat_h_INCLUDED__
#if defined __IAR_SYSTEMS_ICC__ || defined __IAR_SYSTEMS_ASM__
/* Enable bit definitions */
#ifndef ENABLE_BIT_DEFINITIONS
# define ENABLE_BIT_DEFINITIONS 1
#endif
/* Include IAR headers */
#include <ioavr.h>
#ifndef __IAR_SYSTEMS_ASM__
# include <inavr.h>
#endif
#define __attribute__(arg)
#ifdef __IAR_SYSTEMS_ASM__
# define __ASSEMBLER__
#endif
#ifdef __HAS_ELPM__
# define PROGMEM __farflash
#else
# define PROGMEM __flash
#endif
#define PRG_RDB(addr) (*(PROGMEM char *)(addr))
/* The following definitions are not needed by the driver, but may be of some
* help if you port a gcc based project to IAR.
*/
#define cli() __disable_interrupt()
#define sei() __enable_interrupt()
#define wdt_reset() __watchdog_reset()
/* Depending on the device you use, you may get problems with the way usbdrv.h
* handles the differences between devices. Since IAR does not use #defines
* for MCU registers, we can't check for the existence of a particular
* register with an #ifdef. If the autodetection mechanism fails, include
* definitions for the required USB_INTR_* macros in your usbconfig.h. See
* usbconfig-prototype.h and usbdrv.h for details.
*/
#endif /* defined __IAR_SYSTEMS_ICC__ || defined __IAR_SYSTEMS_ASM__ */
#endif /* __iarcompat_h_INCLUDED__ */

50
avr/bootloader/usbdrv/oddebug.c
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@@ -1,50 +0,0 @@
/* Name: oddebug.c
* Project: AVR library
* Author: Christian Starkjohann
* Creation Date: 2005-01-16
* Tabsize: 4
* Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* This Revision: $Id: oddebug.c 275 2007-03-20 09:58:28Z cs $
*/
#include "oddebug.h"
#if DEBUG_LEVEL > 0
#warning "Never compile production devices with debugging enabled"
static void uartPutc(char c)
{
while(!(ODDBG_USR & (1 << ODDBG_UDRE))); /* wait for data register empty */
ODDBG_UDR = c;
}
static uchar hexAscii(uchar h)
{
h &= 0xf;
if(h >= 10)
h += 'a' - (uchar)10 - '0';
h += '0';
return h;
}
static void printHex(uchar c)
{
uartPutc(hexAscii(c >> 4));
uartPutc(hexAscii(c));
}
void odDebug(uchar prefix, uchar *data, uchar len)
{
printHex(prefix);
uartPutc(':');
while(len--){
uartPutc(' ');
printHex(*data++);
}
uartPutc('\r');
uartPutc('\n');
}
#endif

126
avr/bootloader/usbdrv/oddebug.h
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@@ -1,126 +0,0 @@
/* Name: oddebug.h
* Project: AVR library
* Author: Christian Starkjohann
* Creation Date: 2005-01-16
* Tabsize: 4
* Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* This Revision: $Id: oddebug.h 275 2007-03-20 09:58:28Z cs $
*/
#ifndef __oddebug_h_included__
#define __oddebug_h_included__
/*
General Description:
This module implements a function for debug logs on the serial line of the
AVR microcontroller. Debugging can be configured with the define
'DEBUG_LEVEL'. If this macro is not defined or defined to 0, all debugging
calls are no-ops. If it is 1, DBG1 logs will appear, but not DBG2. If it is
2, DBG1 and DBG2 logs will be printed.
A debug log consists of a label ('prefix') to indicate which debug log created
the output and a memory block to dump in hex ('data' and 'len').
*/
#ifndef F_CPU
# define F_CPU 12000000 /* 12 MHz */
#endif
/* make sure we have the UART defines: */
#include "iarcompat.h"
#ifndef __IAR_SYSTEMS_ICC__
# include <avr/io.h>
#endif
#ifndef uchar
# define uchar unsigned char
#endif
#if DEBUG_LEVEL > 0 && !(defined TXEN || defined TXEN0) /* no UART in device */
# warning "Debugging disabled because device has no UART"
# undef DEBUG_LEVEL
#endif
#ifndef DEBUG_LEVEL
# define DEBUG_LEVEL 0
#endif
/* ------------------------------------------------------------------------- */
#if DEBUG_LEVEL > 0
# define DBG1(prefix, data, len) odDebug(prefix, data, len)
#else
# define DBG1(prefix, data, len)
#endif
#if DEBUG_LEVEL > 1
# define DBG2(prefix, data, len) odDebug(prefix, data, len)
#else
# define DBG2(prefix, data, len)
#endif
/* ------------------------------------------------------------------------- */
#if DEBUG_LEVEL > 0
extern void odDebug(uchar prefix, uchar *data, uchar len);
/* Try to find our control registers; ATMEL likes to rename these */
#if defined UBRR
# define ODDBG_UBRR UBRR
#elif defined UBRRL
# define ODDBG_UBRR UBRRL
#elif defined UBRR0
# define ODDBG_UBRR UBRR0
#elif defined UBRR0L
# define ODDBG_UBRR UBRR0L
#endif
#if defined UCR
# define ODDBG_UCR UCR
#elif defined UCSRB
# define ODDBG_UCR UCSRB
#elif defined UCSR0B
# define ODDBG_UCR UCSR0B
#endif
#if defined TXEN
# define ODDBG_TXEN TXEN
#else
# define ODDBG_TXEN TXEN0
#endif
#if defined USR
# define ODDBG_USR USR
#elif defined UCSRA
# define ODDBG_USR UCSRA
#elif defined UCSR0A
# define ODDBG_USR UCSR0A
#endif
#if defined UDRE
# define ODDBG_UDRE UDRE
#else
# define ODDBG_UDRE UDRE0
#endif
#if defined UDR
# define ODDBG_UDR UDR
#elif defined UDR0
# define ODDBG_UDR UDR0
#endif
static inline void odDebugInit(void)
{
ODDBG_UCR |= (1<<ODDBG_TXEN);
ODDBG_UBRR = F_CPU / (19200 * 16L) - 1;
}
#else
# define odDebugInit()
#endif
/* ------------------------------------------------------------------------- */
#endif /* __oddebug_h_included__ */

629
avr/bootloader/usbdrv/usbdrv.c
View File

@@ -1,629 +0,0 @@
/* Name: usbdrv.c
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2004-12-29
* Tabsize: 4
* Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* This Revision: $Id: usbdrv.c 591 2008-05-03 20:21:19Z cs $
*/
#include "iarcompat.h"
#ifndef __IAR_SYSTEMS_ICC__
# include <avr/io.h>
# include <avr/pgmspace.h>
#endif
#include "usbdrv.h"
#include "oddebug.h"
/*
General Description:
This module implements the C-part of the USB driver. See usbdrv.h for a
documentation of the entire driver.
*/
/* ------------------------------------------------------------------------- */
/* raw USB registers / interface to assembler code: */
uchar usbRxBuf[2*USB_BUFSIZE]; /* raw RX buffer: PID, 8 bytes data, 2 bytes CRC */
uchar usbInputBufOffset; /* offset in usbRxBuf used for low level receiving */
uchar usbDeviceAddr; /* assigned during enumeration, defaults to 0 */
uchar usbNewDeviceAddr; /* device ID which should be set after status phase */
uchar usbConfiguration; /* currently selected configuration. Administered by driver, but not used */
volatile schar usbRxLen; /* = 0; number of bytes in usbRxBuf; 0 means free, -1 for flow control */
uchar usbCurrentTok; /* last token received or endpoint number for last OUT token if != 0 */
uchar usbRxToken; /* token for data we received; or endpont number for last OUT */
volatile uchar usbTxLen = USBPID_NAK; /* number of bytes to transmit with next IN token or handshake token */
uchar usbTxBuf[USB_BUFSIZE];/* data to transmit with next IN, free if usbTxLen contains handshake token */
#if USB_COUNT_SOF
volatile uchar usbSofCount; /* incremented by assembler module every SOF */
#endif
#if USB_CFG_HAVE_INTRIN_ENDPOINT
usbTxStatus_t usbTxStatus1;
# if USB_CFG_HAVE_INTRIN_ENDPOINT3
usbTxStatus_t usbTxStatus3;
# endif
#endif
/* USB status registers / not shared with asm code */
uchar *usbMsgPtr; /* data to transmit next -- ROM or RAM address */
static usbMsgLen_t usbMsgLen = USB_NO_MSG; /* remaining number of bytes */
static uchar usbMsgFlags; /* flag values see below */
#define USB_FLG_MSGPTR_IS_ROM (1<<6)
#define USB_FLG_USE_USER_RW (1<<7)
/*
optimizing hints:
- do not post/pre inc/dec integer values in operations
- assign value of PRG_RDB() to register variables and don't use side effects in arg
- use narrow scope for variables which should be in X/Y/Z register
- assign char sized expressions to variables to force 8 bit arithmetics
*/
/* -------------------------- String Descriptors --------------------------- */
#if USB_CFG_DESCR_PROPS_STRINGS == 0
#if USB_CFG_DESCR_PROPS_STRING_0 == 0
#undef USB_CFG_DESCR_PROPS_STRING_0
#define USB_CFG_DESCR_PROPS_STRING_0 sizeof(usbDescriptorString0)
PROGMEM char usbDescriptorString0[] = { /* language descriptor */
4, /* sizeof(usbDescriptorString0): length of descriptor in bytes */
3, /* descriptor type */
0x09, 0x04, /* language index (0x0409 = US-English) */
};
#endif
#if USB_CFG_DESCR_PROPS_STRING_VENDOR == 0 && USB_CFG_VENDOR_NAME_LEN
#undef USB_CFG_DESCR_PROPS_STRING_VENDOR
#define USB_CFG_DESCR_PROPS_STRING_VENDOR sizeof(usbDescriptorStringVendor)
PROGMEM int usbDescriptorStringVendor[] = {
USB_STRING_DESCRIPTOR_HEADER(USB_CFG_VENDOR_NAME_LEN),
USB_CFG_VENDOR_NAME
};
#endif
#if USB_CFG_DESCR_PROPS_STRING_PRODUCT == 0 && USB_CFG_DEVICE_NAME_LEN
#undef USB_CFG_DESCR_PROPS_STRING_PRODUCT
#define USB_CFG_DESCR_PROPS_STRING_PRODUCT sizeof(usbDescriptorStringDevice)
PROGMEM int usbDescriptorStringDevice[] = {
USB_STRING_DESCRIPTOR_HEADER(USB_CFG_DEVICE_NAME_LEN),
USB_CFG_DEVICE_NAME
};
#endif
#if USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER == 0 && USB_CFG_SERIAL_NUMBER_LEN
#undef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER sizeof(usbDescriptorStringSerialNumber)
PROGMEM int usbDescriptorStringSerialNumber[] = {
USB_STRING_DESCRIPTOR_HEADER(USB_CFG_SERIAL_NUMBER_LEN),
USB_CFG_SERIAL_NUMBER
};
#endif
#endif /* USB_CFG_DESCR_PROPS_STRINGS == 0 */
/* --------------------------- Device Descriptor --------------------------- */
#if USB_CFG_DESCR_PROPS_DEVICE == 0
#undef USB_CFG_DESCR_PROPS_DEVICE
#define USB_CFG_DESCR_PROPS_DEVICE sizeof(usbDescriptorDevice)
PROGMEM char usbDescriptorDevice[] = { /* USB device descriptor */
18, /* sizeof(usbDescriptorDevice): length of descriptor in bytes */
USBDESCR_DEVICE, /* descriptor type */
0x10, 0x01, /* USB version supported */
USB_CFG_DEVICE_CLASS,
USB_CFG_DEVICE_SUBCLASS,
0, /* protocol */
8, /* max packet size */
/* the following two casts affect the first byte of the constant only, but
* that's sufficient to avoid a warning with the default values.
*/
(char)USB_CFG_VENDOR_ID,/* 2 bytes */
(char)USB_CFG_DEVICE_ID,/* 2 bytes */
USB_CFG_DEVICE_VERSION, /* 2 bytes */
USB_CFG_DESCR_PROPS_STRING_VENDOR != 0 ? 1 : 0, /* manufacturer string index */
USB_CFG_DESCR_PROPS_STRING_PRODUCT != 0 ? 2 : 0, /* product string index */
USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER != 0 ? 3 : 0, /* serial number string index */
1, /* number of configurations */
};
#endif
/* ----------------------- Configuration Descriptor ------------------------ */
#if USB_CFG_DESCR_PROPS_HID_REPORT != 0 && USB_CFG_DESCR_PROPS_HID == 0
#undef USB_CFG_DESCR_PROPS_HID
#define USB_CFG_DESCR_PROPS_HID 9 /* length of HID descriptor in config descriptor below */
#endif
#if USB_CFG_DESCR_PROPS_CONFIGURATION == 0
#undef USB_CFG_DESCR_PROPS_CONFIGURATION
#define USB_CFG_DESCR_PROPS_CONFIGURATION sizeof(usbDescriptorConfiguration)
PROGMEM char usbDescriptorConfiguration[] = { /* USB configuration descriptor */
9, /* sizeof(usbDescriptorConfiguration): length of descriptor in bytes */
USBDESCR_CONFIG, /* descriptor type */
18 + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT3 +
(USB_CFG_DESCR_PROPS_HID & 0xff), 0,
/* total length of data returned (including inlined descriptors) */
1, /* number of interfaces in this configuration */
1, /* index of this configuration */
0, /* configuration name string index */
#if USB_CFG_IS_SELF_POWERED
USBATTR_SELFPOWER, /* attributes */
#else
(char)USBATTR_BUSPOWER, /* attributes */
#endif
USB_CFG_MAX_BUS_POWER/2, /* max USB current in 2mA units */
/* interface descriptor follows inline: */
9, /* sizeof(usbDescrInterface): length of descriptor in bytes */
USBDESCR_INTERFACE, /* descriptor type */
0, /* index of this interface */
0, /* alternate setting for this interface */
USB_CFG_HAVE_INTRIN_ENDPOINT + USB_CFG_HAVE_INTRIN_ENDPOINT3, /* endpoints excl 0: number of endpoint descriptors to follow */
USB_CFG_INTERFACE_CLASS,
USB_CFG_INTERFACE_SUBCLASS,
USB_CFG_INTERFACE_PROTOCOL,
0, /* string index for interface */
#if (USB_CFG_DESCR_PROPS_HID & 0xff) /* HID descriptor */
9, /* sizeof(usbDescrHID): length of descriptor in bytes */
USBDESCR_HID, /* descriptor type: HID */
0x01, 0x01, /* BCD representation of HID version */
0x00, /* target country code */
0x01, /* number of HID Report (or other HID class) Descriptor infos to follow */
0x22, /* descriptor type: report */
USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH, 0, /* total length of report descriptor */
#endif
#if USB_CFG_HAVE_INTRIN_ENDPOINT /* endpoint descriptor for endpoint 1 */
7, /* sizeof(usbDescrEndpoint) */
USBDESCR_ENDPOINT, /* descriptor type = endpoint */
(char)0x81, /* IN endpoint number 1 */
0x03, /* attrib: Interrupt endpoint */
8, 0, /* maximum packet size */
USB_CFG_INTR_POLL_INTERVAL, /* in ms */
#endif
#if USB_CFG_HAVE_INTRIN_ENDPOINT3 /* endpoint descriptor for endpoint 3 */
7, /* sizeof(usbDescrEndpoint) */
USBDESCR_ENDPOINT, /* descriptor type = endpoint */
(char)0x83, /* IN endpoint number 1 */
0x03, /* attrib: Interrupt endpoint */
8, 0, /* maximum packet size */
USB_CFG_INTR_POLL_INTERVAL, /* in ms */
#endif
};
#endif
/* ------------------------------------------------------------------------- */
/* We don't use prog_int or prog_int16_t for compatibility with various libc
* versions. Here's an other compatibility hack:
*/
#ifndef PRG_RDB
#define PRG_RDB(addr) pgm_read_byte(addr)
#endif
/* ------------------------------------------------------------------------- */
static inline void usbResetDataToggling(void)
{
#if USB_CFG_HAVE_INTRIN_ENDPOINT
USB_SET_DATATOKEN1(USB_INITIAL_DATATOKEN); /* reset data toggling for interrupt endpoint */
# if USB_CFG_HAVE_INTRIN_ENDPOINT3
USB_SET_DATATOKEN3(USB_INITIAL_DATATOKEN); /* reset data toggling for interrupt endpoint */
# endif
#endif
}
static inline void usbResetStall(void)
{
#if USB_CFG_IMPLEMENT_HALT && USB_CFG_HAVE_INTRIN_ENDPOINT
usbTxLen1 = USBPID_NAK;
#if USB_CFG_HAVE_INTRIN_ENDPOINT3
usbTxLen3 = USBPID_NAK;
#endif
#endif
}
/* ------------------------------------------------------------------------- */
#if USB_CFG_HAVE_INTRIN_ENDPOINT
static void usbGenericSetInterrupt(uchar *data, uchar len, usbTxStatus_t *txStatus)
{
uchar *p;
char i;
#if USB_CFG_IMPLEMENT_HALT
if(usbTxLen1 == USBPID_STALL)
return;
#endif
if(txStatus->len & 0x10){ /* packet buffer was empty */
txStatus->buffer[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* toggle token */
}else{
txStatus->len = USBPID_NAK; /* avoid sending outdated (overwritten) interrupt data */
}
p = txStatus->buffer + 1;
i = len;
do{ /* if len == 0, we still copy 1 byte, but that's no problem */
*p++ = *data++;
}while(--i > 0); /* loop control at the end is 2 bytes shorter than at beginning */
usbCrc16Append(&txStatus->buffer[1], len);
txStatus->len = len + 4; /* len must be given including sync byte */
DBG2(0x21 + (((int)txStatus >> 3) & 3), txStatus->buffer, len + 3);
}
USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len)
{
usbGenericSetInterrupt(data, len, &usbTxStatus1);
}
#endif
#if USB_CFG_HAVE_INTRIN_ENDPOINT3
USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len)
{
usbGenericSetInterrupt(data, len, &usbTxStatus3);
}
#endif
/* ------------------ utilities for code following below ------------------- */
/* Use defines for the switch statement so that we can choose between an
* if()else if() and a switch/case based implementation. switch() is more
* efficient for a LARGE set of sequential choices, if() is better in all other
* cases.
*/
#if USB_CFG_USE_SWITCH_STATEMENT
# define SWITCH_START(cmd) switch(cmd){{
# define SWITCH_CASE(value) }break; case (value):{
# define SWITCH_CASE2(v1,v2) }break; case (v1): case(v2):{
# define SWITCH_CASE3(v1,v2,v3) }break; case (v1): case(v2): case(v3):{
# define SWITCH_DEFAULT }break; default:{
# define SWITCH_END }}
#else
# define SWITCH_START(cmd) {uchar _cmd = cmd; if(0){
# define SWITCH_CASE(value) }else if(_cmd == (value)){
# define SWITCH_CASE2(v1,v2) }else if(_cmd == (v1) || _cmd == (v2)){
# define SWITCH_CASE3(v1,v2,v3) }else if(_cmd == (v1) || _cmd == (v2) || (_cmd == v3)){
# define SWITCH_DEFAULT }else{
# define SWITCH_END }}
#endif
#ifndef USB_RX_USER_HOOK
#define USB_RX_USER_HOOK(data, len)
#endif
#ifndef USB_SET_ADDRESS_HOOK
#define USB_SET_ADDRESS_HOOK()
#endif
/* ------------------------------------------------------------------------- */
/* We use if() instead of #if in the macro below because #if can't be used
* in macros and the compiler optimizes constant conditions anyway.
* This may cause problems with undefined symbols if compiled without
* optimizing!
*/
#define GET_DESCRIPTOR(cfgProp, staticName) \
if(cfgProp){ \
if((cfgProp) & USB_PROP_IS_RAM) \
flags = 0; \
if((cfgProp) & USB_PROP_IS_DYNAMIC){ \
len = usbFunctionDescriptor(rq); \
}else{ \
len = USB_PROP_LENGTH(cfgProp); \
usbMsgPtr = (uchar *)(staticName); \
} \
}
/* usbDriverDescriptor() is similar to usbFunctionDescriptor(), but used
* internally for all types of descriptors.
*/
static inline usbMsgLen_t usbDriverDescriptor(usbRequest_t *rq)
{
usbMsgLen_t len = 0;
uchar flags = USB_FLG_MSGPTR_IS_ROM;
SWITCH_START(rq->wValue.bytes[1])
SWITCH_CASE(USBDESCR_DEVICE) /* 1 */
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_DEVICE, usbDescriptorDevice)
SWITCH_CASE(USBDESCR_CONFIG) /* 2 */
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_CONFIGURATION, usbDescriptorConfiguration)
SWITCH_CASE(USBDESCR_STRING) /* 3 */
#if USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC
if(USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_RAM)
flags = 0;
len = usbFunctionDescriptor(rq);
#else /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
SWITCH_START(rq->wValue.bytes[0])
SWITCH_CASE(0)
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_0, usbDescriptorString0)
SWITCH_CASE(1)
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_VENDOR, usbDescriptorStringVendor)
SWITCH_CASE(2)
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_PRODUCT, usbDescriptorStringDevice)
SWITCH_CASE(3)
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER, usbDescriptorStringSerialNumber)
SWITCH_DEFAULT
if(USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC){
len = usbFunctionDescriptor(rq);
}
SWITCH_END
#endif /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
#if USB_CFG_DESCR_PROPS_HID_REPORT /* only support HID descriptors if enabled */
SWITCH_CASE(USBDESCR_HID) /* 0x21 */
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID, usbDescriptorConfiguration + 18)
SWITCH_CASE(USBDESCR_HID_REPORT)/* 0x22 */
GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID_REPORT, usbDescriptorHidReport)
#endif
SWITCH_DEFAULT
if(USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC){
len = usbFunctionDescriptor(rq);
}
SWITCH_END
usbMsgFlags = flags;
return len;
}
/* ------------------------------------------------------------------------- */
/* usbDriverSetup() is similar to usbFunctionSetup(), but it's used for
* standard requests instead of class and custom requests.
*/
static inline usbMsgLen_t usbDriverSetup(usbRequest_t *rq)
{
uchar len = 0, *dataPtr = usbTxBuf + 9; /* there are 2 bytes free space at the end of the buffer */
uchar value = rq->wValue.bytes[0];
#if USB_CFG_IMPLEMENT_HALT
uchar index = rq->wIndex.bytes[0];
#endif
dataPtr[0] = 0; /* default reply common to USBRQ_GET_STATUS and USBRQ_GET_INTERFACE */
SWITCH_START(rq->bRequest)
SWITCH_CASE(USBRQ_GET_STATUS) /* 0 */
uchar recipient = rq->bmRequestType & USBRQ_RCPT_MASK; /* assign arith ops to variables to enforce byte size */
if(USB_CFG_IS_SELF_POWERED && recipient == USBRQ_RCPT_DEVICE)
dataPtr[0] = USB_CFG_IS_SELF_POWERED;
#if USB_CFG_IMPLEMENT_HALT
if(recipient == USBRQ_RCPT_ENDPOINT && index == 0x81) /* request status for endpoint 1 */
dataPtr[0] = usbTxLen1 == USBPID_STALL;
#endif
dataPtr[1] = 0;
len = 2;
#if USB_CFG_IMPLEMENT_HALT
SWITCH_CASE2(USBRQ_CLEAR_FEATURE, USBRQ_SET_FEATURE) /* 1, 3 */
if(value == 0 && index == 0x81){ /* feature 0 == HALT for endpoint == 1 */
usbTxLen1 = rq->bRequest == USBRQ_CLEAR_FEATURE ? USBPID_NAK : USBPID_STALL;
usbResetDataToggling();
}
#endif
SWITCH_CASE(USBRQ_SET_ADDRESS) /* 5 */
usbNewDeviceAddr = value;
USB_SET_ADDRESS_HOOK();
SWITCH_CASE(USBRQ_GET_DESCRIPTOR) /* 6 */
len = usbDriverDescriptor(rq);
goto skipMsgPtrAssignment;
SWITCH_CASE(USBRQ_GET_CONFIGURATION) /* 8 */
dataPtr = &usbConfiguration; /* send current configuration value */
len = 1;
SWITCH_CASE(USBRQ_SET_CONFIGURATION) /* 9 */
usbConfiguration = value;
usbResetStall();
SWITCH_CASE(USBRQ_GET_INTERFACE) /* 10 */
len = 1;
#if USB_CFG_HAVE_INTRIN_ENDPOINT
SWITCH_CASE(USBRQ_SET_INTERFACE) /* 11 */
usbResetDataToggling();
usbResetStall();
#endif
SWITCH_DEFAULT /* 7=SET_DESCRIPTOR, 12=SYNC_FRAME */
/* Should we add an optional hook here? */
SWITCH_END
usbMsgPtr = dataPtr;
skipMsgPtrAssignment:
return len;
}
/* ------------------------------------------------------------------------- */
/* usbProcessRx() is called for every message received by the interrupt
* routine. It distinguishes between SETUP and DATA packets and processes
* them accordingly.
*/
static inline void usbProcessRx(uchar *data, uchar len)
{
usbRequest_t *rq = (void *)data;
/* usbRxToken can be:
* 0x2d 00101101 (USBPID_SETUP for setup data)
* 0xe1 11100001 (USBPID_OUT: data phase of setup transfer)
* 0...0x0f for OUT on endpoint X
*/
DBG2(0x10 + (usbRxToken & 0xf), data, len); /* SETUP=1d, SETUP-DATA=11, OUTx=1x */
USB_RX_USER_HOOK(data, len)
#if USB_CFG_IMPLEMENT_FN_WRITEOUT
if(usbRxToken < 0x10){ /* OUT to endpoint != 0: endpoint number in usbRxToken */
usbFunctionWriteOut(data, len);
return;
}
#endif
if(usbRxToken == (uchar)USBPID_SETUP){
if(len != 8) /* Setup size must be always 8 bytes. Ignore otherwise. */
return;
usbMsgLen_t replyLen;
usbTxBuf[0] = USBPID_DATA0; /* initialize data toggling */
usbTxLen = USBPID_NAK; /* abort pending transmit */
usbMsgFlags = 0;
uchar type = rq->bmRequestType & USBRQ_TYPE_MASK;
if(type != USBRQ_TYPE_STANDARD){ /* standard requests are handled by driver */
replyLen = usbFunctionSetup(data);
}else{
replyLen = usbDriverSetup(rq);
}
#if USB_CFG_IMPLEMENT_FN_READ || USB_CFG_IMPLEMENT_FN_WRITE
if(replyLen == USB_NO_MSG){ /* use user-supplied read/write function */
/* do some conditioning on replyLen */
if((rq->bmRequestType & USBRQ_DIR_MASK) != USBRQ_DIR_HOST_TO_DEVICE){
replyLen = rq->wLength.bytes[0]; /* IN transfers only */
}
usbMsgFlags = USB_FLG_USE_USER_RW;
}else /* The 'else' prevents that we limit a replyLen of USB_NO_MSG to the maximum transfer len. */
#endif
if(sizeof(replyLen) < sizeof(rq->wLength.word)){ /* help compiler with optimizing */
if(!rq->wLength.bytes[1] && replyLen > rq->wLength.bytes[0]) /* limit length to max */
replyLen = rq->wLength.bytes[0];
}else{
if(replyLen > rq->wLength.word) /* limit length to max */
replyLen = rq->wLength.word;
}
usbMsgLen = replyLen;
}else{ /* usbRxToken must be USBPID_OUT, which means data phase of setup (control-out) */
#if USB_CFG_IMPLEMENT_FN_WRITE
if(usbMsgFlags & USB_FLG_USE_USER_RW){
uchar rval = usbFunctionWrite(data, len);
if(rval == 0xff){ /* an error occurred */
usbTxLen = USBPID_STALL;
}else if(rval != 0){ /* This was the final package */
usbMsgLen = 0; /* answer with a zero-sized data packet */
}
}
#endif
}
}
/* ------------------------------------------------------------------------- */
/* This function is similar to usbFunctionRead(), but it's also called for
* data handled automatically by the driver (e.g. descriptor reads).
*/
static uchar usbDeviceRead(uchar *data, uchar len)
{
if(len > 0){ /* don't bother app with 0 sized reads */
#if USB_CFG_IMPLEMENT_FN_READ
if(usbMsgFlags & USB_FLG_USE_USER_RW){
len = usbFunctionRead(data, len);
}else
#endif
{
uchar i = len, *r = usbMsgPtr;
if(usbMsgFlags & USB_FLG_MSGPTR_IS_ROM){ /* ROM data */
do{
uchar c = PRG_RDB(r); /* assign to char size variable to enforce byte ops */
*data++ = c;
r++;
}while(--i);
}else{ /* RAM data */
do{
*data++ = *r++;
}while(--i);
}
usbMsgPtr = r;
}
}
return len;
}
/* ------------------------------------------------------------------------- */
/* usbBuildTxBlock() is called when we have data to transmit and the
* interrupt routine's transmit buffer is empty.
*/
static inline void usbBuildTxBlock(void)
{
usbMsgLen_t wantLen;
uchar len;
wantLen = usbMsgLen;
if(wantLen > 8)
wantLen = 8;
usbMsgLen -= wantLen;
usbTxBuf[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* DATA toggling */
len = usbDeviceRead(usbTxBuf + 1, wantLen);
if(len <= 8){ /* valid data packet */
usbCrc16Append(&usbTxBuf[1], len);
len += 4; /* length including sync byte */
if(len < 12) /* a partial package identifies end of message */
usbMsgLen = USB_NO_MSG;
}else{
len = USBPID_STALL; /* stall the endpoint */
usbMsgLen = USB_NO_MSG;
}
usbTxLen = len;
DBG2(0x20, usbTxBuf, len-1);
}
/* ------------------------------------------------------------------------- */
static inline void usbHandleResetHook(uchar notResetState)
{
#ifdef USB_RESET_HOOK
static uchar wasReset;
uchar isReset = !notResetState;
if(wasReset != isReset){
USB_RESET_HOOK(isReset);
wasReset = isReset;
}
#endif
}
/* ------------------------------------------------------------------------- */
USB_PUBLIC void usbPoll(void)
{
schar len;
uchar i;
len = usbRxLen - 3;
if(len >= 0){
/* We could check CRC16 here -- but ACK has already been sent anyway. If you
* need data integrity checks with this driver, check the CRC in your app
* code and report errors back to the host. Since the ACK was already sent,
* retries must be handled on application level.
* unsigned crc = usbCrc16(buffer + 1, usbRxLen - 3);
*/
usbProcessRx(usbRxBuf + USB_BUFSIZE + 1 - usbInputBufOffset, len);
#if USB_CFG_HAVE_FLOWCONTROL
if(usbRxLen > 0) /* only mark as available if not inactivated */
usbRxLen = 0;
#else
usbRxLen = 0; /* mark rx buffer as available */
#endif
}
if(usbTxLen & 0x10){ /* transmit system idle */
if(usbMsgLen != USB_NO_MSG){ /* transmit data pending? */
usbBuildTxBlock();
}
}
for(i = 10; i > 0; i--){
uchar usbLineStatus = USBIN & USBMASK;
if(usbLineStatus != 0) /* SE0 has ended */
break;
}
if(i == 0){ /* RESET condition, called multiple times during reset */
usbNewDeviceAddr = 0;
usbDeviceAddr = 0;
usbResetStall();
DBG1(0xff, 0, 0);
}
usbHandleResetHook(i);
}
/* ------------------------------------------------------------------------- */
USB_PUBLIC void usbInit(void)
{
#if USB_INTR_CFG_SET != 0
USB_INTR_CFG |= USB_INTR_CFG_SET;
#endif
#if USB_INTR_CFG_CLR != 0
USB_INTR_CFG &= ~(USB_INTR_CFG_CLR);
#endif
USB_INTR_ENABLE |= (1 << USB_INTR_ENABLE_BIT);
usbResetDataToggling();
#if USB_CFG_HAVE_INTRIN_ENDPOINT
usbTxLen1 = USBPID_NAK;
#if USB_CFG_HAVE_INTRIN_ENDPOINT3
usbTxLen3 = USBPID_NAK;
#endif
#endif
}
/* ------------------------------------------------------------------------- */

712
avr/bootloader/usbdrv/usbdrv.h
View File

@@ -1,712 +0,0 @@
/* Name: usbdrv.h
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2004-12-29
* Tabsize: 4
* Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* This Revision: $Id: usbdrv.h 607 2008-05-13 15:57:28Z cs $
*/
#ifndef __usbdrv_h_included__
#define __usbdrv_h_included__
#include "usbconfig.h"
#include "iarcompat.h"
/*
Hardware Prerequisites:
=======================
USB lines D+ and D- MUST be wired to the same I/O port. We recommend that D+
triggers the interrupt (best achieved by using INT0 for D+), but it is also
possible to trigger the interrupt from D-. If D- is used, interrupts are also
triggered by SOF packets. D- requires a pull-up of 1.5k to +3.5V (and the
device must be powered at 3.5V) to identify as low-speed USB device. A
pull-down or pull-up of 1M SHOULD be connected from D+ to +3.5V to prevent
interference when no USB master is connected. If you use Zener diodes to limit
the voltage on D+ and D-, you MUST use a pull-down resistor, not a pull-up.
We use D+ as interrupt source and not D- because it does not trigger on
keep-alive and RESET states. If you want to count keep-alive events with
USB_COUNT_SOF, you MUST use D- as an interrupt source.
As a compile time option, the 1.5k pull-up resistor on D- can be made
switchable to allow the device to disconnect at will. See the definition of
usbDeviceConnect() and usbDeviceDisconnect() further down in this file.
Please adapt the values in usbconfig.h according to your hardware!
The device MUST be clocked at exactly 12 MHz, 15 MHz or 16 MHz
or at 16.5 MHz +/- 1%. See usbconfig-prototype.h for details.
Limitations:
============
Robustness with respect to communication errors:
The driver assumes error-free communication. It DOES check for errors in
the PID, but does NOT check bit stuffing errors, SE0 in middle of a byte,
token CRC (5 bit) and data CRC (16 bit). CRC checks can not be performed due
to timing constraints: We must start sending a reply within 7 bit times.
Bit stuffing and misplaced SE0 would have to be checked in real-time, but CPU
performance does not permit that. The driver does not check Data0/Data1
toggling, but application software can implement the check.
Input characteristics:
Since no differential receiver circuit is used, electrical interference
robustness may suffer. The driver samples only one of the data lines with
an ordinary I/O pin's input characteristics. However, since this is only a
low speed USB implementation and the specification allows for 8 times the
bit rate over the same hardware, we should be on the safe side. Even the spec
requires detection of asymmetric states at high bit rate for SE0 detection.
Number of endpoints:
The driver supports the following endpoints:
- Endpoint 0, the default control endpoint.
- Any number of interrupt- or bulk-out endpoints. The data is sent to
usbFunctionWriteOut() and USB_CFG_IMPLEMENT_FN_WRITEOUT must be defined
to 1 to activate this feature. The endpoint number can be found in the
global variable 'usbRxToken'.
- One default interrupt- or bulk-in endpoint. This endpoint is used for
interrupt- or bulk-in transfers which are not handled by any other endpoint.
You must define USB_CFG_HAVE_INTRIN_ENDPOINT in order to activate this
feature and call usbSetInterrupt() to send interrupt/bulk data.
- One additional interrupt- or bulk-in endpoint. This was endpoint 3 in
previous versions of this driver but can now be configured to any endpoint
number. You must define USB_CFG_HAVE_INTRIN_ENDPOINT3 in order to activate
this feature and call usbSetInterrupt3() to send interrupt/bulk data. The
endpoint number can be set with USB_CFG_EP3_NUMBER.
Please note that the USB standard forbids bulk endpoints for low speed devices!
Most operating systems allow them anyway, but the AVR will spend 90% of the CPU
time in the USB interrupt polling for bulk data.
Maximum data payload:
Data payload of control in and out transfers may be up to 254 bytes. In order
to accept payload data of out transfers, you need to implement
'usbFunctionWrite()'.
USB Suspend Mode supply current:
The USB standard limits power consumption to 500uA when the bus is in suspend
mode. This is not a problem for self-powered devices since they don't need
bus power anyway. Bus-powered devices can achieve this only by putting the
CPU in sleep mode. The driver does not implement suspend handling by itself.
However, the application may implement activity monitoring and wakeup from
sleep. The host sends regular SE0 states on the bus to keep it active. These
SE0 states can be detected by using D- as the interrupt source. Define
USB_COUNT_SOF to 1 and use the global variable usbSofCount to check for bus
activity.
Operation without an USB master:
The driver behaves neutral without connection to an USB master if D- reads
as 1. To avoid spurious interrupts, we recommend a high impedance (e.g. 1M)
pull-down or pull-up resistor on D+ (interrupt). If Zener diodes are used,
use a pull-down. If D- becomes statically 0, the driver may block in the
interrupt routine.
Interrupt latency:
The application must ensure that the USB interrupt is not disabled for more
than 25 cycles (this is for 12 MHz, faster clocks allow longer latency).
This implies that all interrupt routines must either be declared as "INTERRUPT"
instead of "SIGNAL" (see "avr/signal.h") or that they are written in assembler
with "sei" as the first instruction.
Maximum interrupt duration / CPU cycle consumption:
The driver handles all USB communication during the interrupt service
routine. The routine will not return before an entire USB message is received
and the reply is sent. This may be up to ca. 1200 cycles @ 12 MHz (= 100us) if
the host conforms to the standard. The driver will consume CPU cycles for all
USB messages, even if they address another (low-speed) device on the same bus.
*/
/* ------------------------------------------------------------------------- */
/* --------------------------- Module Interface ---------------------------- */
/* ------------------------------------------------------------------------- */
#define USBDRV_VERSION 20080513
/* This define uniquely identifies a driver version. It is a decimal number
* constructed from the driver's release date in the form YYYYMMDD. If the
* driver's behavior or interface changes, you can use this constant to
* distinguish versions. If it is not defined, the driver's release date is
* older than 2006-01-25.
*/
#ifndef USB_PUBLIC
#define USB_PUBLIC
#endif
/* USB_PUBLIC is used as declaration attribute for all functions exported by
* the USB driver. The default is no attribute (see above). You may define it
* to static either in usbconfig.h or from the command line if you include
* usbdrv.c instead of linking against it. Including the C module of the driver
* directly in your code saves a couple of bytes in flash memory.
*/
#ifndef __ASSEMBLER__
#ifndef uchar
#define uchar unsigned char
#endif
#ifndef schar
#define schar signed char
#endif
/* shortcuts for well defined 8 bit integer types */
#if USB_CFG_LONG_TRANSFERS /* if more than 254 bytes transfer size required */
# define usbMsgLen_t unsigned
#else
# define usbMsgLen_t uchar
#endif
/* usbMsgLen_t is the data type used for transfer lengths. By default, it is
* defined to uchar, allowing a maximum of 254 bytes (255 is reserved for
* USB_NO_MSG below). If the usbconfig.h defines USB_CFG_LONG_TRANSFERS to 1,
* a 16 bit data type is used, allowing up to 16384 bytes (the rest is used
* for flags in the descriptor configuration).
*/
#define USB_NO_MSG ((usbMsgLen_t)-1) /* constant meaning "no message" */
struct usbRequest; /* forward declaration */
USB_PUBLIC void usbInit(void);
/* This function must be called before interrupts are enabled and the main
* loop is entered.
*/
USB_PUBLIC void usbPoll(void);
/* This function must be called at regular intervals from the main loop.
* Maximum delay between calls is somewhat less than 50ms (USB timeout for
* accepting a Setup message). Otherwise the device will not be recognized.
* Please note that debug outputs through the UART take ~ 0.5ms per byte
* at 19200 bps.
*/
extern uchar *usbMsgPtr;
/* This variable may be used to pass transmit data to the driver from the
* implementation of usbFunctionWrite(). It is also used internally by the
* driver for standard control requests.
*/
USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]);
/* This function is called when the driver receives a SETUP transaction from
* the host which is not answered by the driver itself (in practice: class and
* vendor requests). All control transfers start with a SETUP transaction where
* the host communicates the parameters of the following (optional) data
* transfer. The SETUP data is available in the 'data' parameter which can
* (and should) be casted to 'usbRequest_t *' for a more user-friendly access
* to parameters.
*
* If the SETUP indicates a control-in transfer, you should provide the
* requested data to the driver. There are two ways to transfer this data:
* (1) Set the global pointer 'usbMsgPtr' to the base of the static RAM data
* block and return the length of the data in 'usbFunctionSetup()'. The driver
* will handle the rest. Or (2) return USB_NO_MSG in 'usbFunctionSetup()'. The
* driver will then call 'usbFunctionRead()' when data is needed. See the
* documentation for usbFunctionRead() for details.
*
* If the SETUP indicates a control-out transfer, the only way to receive the
* data from the host is through the 'usbFunctionWrite()' call. If you
* implement this function, you must return USB_NO_MSG in 'usbFunctionSetup()'
* to indicate that 'usbFunctionWrite()' should be used. See the documentation
* of this function for more information. If you just want to ignore the data
* sent by the host, return 0 in 'usbFunctionSetup()'.
*
* Note that calls to the functions usbFunctionRead() and usbFunctionWrite()
* are only done if enabled by the configuration in usbconfig.h.
*/
USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq);
/* You need to implement this function ONLY if you provide USB descriptors at
* runtime (which is an expert feature). It is very similar to
* usbFunctionSetup() above, but it is called only to request USB descriptor
* data. See the documentation of usbFunctionSetup() above for more info.
*/
#if USB_CFG_HAVE_INTRIN_ENDPOINT
USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len);
/* This function sets the message which will be sent during the next interrupt
* IN transfer. The message is copied to an internal buffer and must not exceed
* a length of 8 bytes. The message may be 0 bytes long just to indicate the
* interrupt status to the host.
* If you need to transfer more bytes, use a control read after the interrupt.
*/
#define usbInterruptIsReady() (usbTxLen1 & 0x10)
/* This macro indicates whether the last interrupt message has already been
* sent. If you set a new interrupt message before the old was sent, the
* message already buffered will be lost.
*/
#if USB_CFG_HAVE_INTRIN_ENDPOINT3
USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len);
#define usbInterruptIsReady3() (usbTxLen3 & 0x10)
/* Same as above for endpoint 3 */
#endif
#endif /* USB_CFG_HAVE_INTRIN_ENDPOINT */
#if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH /* simplified interface for backward compatibility */
#define usbHidReportDescriptor usbDescriptorHidReport
/* should be declared as: PROGMEM char usbHidReportDescriptor[]; */
/* If you implement an HID device, you need to provide a report descriptor.
* The HID report descriptor syntax is a bit complex. If you understand how
* report descriptors are constructed, we recommend that you use the HID
* Descriptor Tool from usb.org, see http://www.usb.org/developers/hidpage/.
* Otherwise you should probably start with a working example.
*/
#endif /* USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH */
#if USB_CFG_IMPLEMENT_FN_WRITE
USB_PUBLIC uchar usbFunctionWrite(uchar *data, uchar len);
/* This function is called by the driver to provide a control transfer's
* payload data (control-out). It is called in chunks of up to 8 bytes. The
* total count provided in the current control transfer can be obtained from
* the 'length' property in the setup data. If an error occurred during
* processing, return 0xff (== -1). The driver will answer the entire transfer
* with a STALL token in this case. If you have received the entire payload
* successfully, return 1. If you expect more data, return 0. If you don't
* know whether the host will send more data (you should know, the total is
* provided in the usbFunctionSetup() call!), return 1.
* NOTE: If you return 0xff for STALL, 'usbFunctionWrite()' may still be called
* for the remaining data. You must continue to return 0xff for STALL in these
* calls.
* In order to get usbFunctionWrite() called, define USB_CFG_IMPLEMENT_FN_WRITE
* to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
*/
#endif /* USB_CFG_IMPLEMENT_FN_WRITE */
#if USB_CFG_IMPLEMENT_FN_READ
USB_PUBLIC uchar usbFunctionRead(uchar *data, uchar len);
/* This function is called by the driver to ask the application for a control
* transfer's payload data (control-in). It is called in chunks of up to 8
* bytes each. You should copy the data to the location given by 'data' and
* return the actual number of bytes copied. If you return less than requested,
* the control-in transfer is terminated. If you return 0xff, the driver aborts
* the transfer with a STALL token.
* In order to get usbFunctionRead() called, define USB_CFG_IMPLEMENT_FN_READ
* to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
*/
#endif /* USB_CFG_IMPLEMENT_FN_READ */
#if USB_CFG_IMPLEMENT_FN_WRITEOUT
USB_PUBLIC void usbFunctionWriteOut(uchar *data, uchar len);
/* This function is called by the driver when data is received on an interrupt-
* or bulk-out endpoint. The endpoint number can be found in the global
* variable usbRxToken. You must define USB_CFG_IMPLEMENT_FN_WRITEOUT to 1 in
* usbconfig.h to get this function called.
*/
#endif /* USB_CFG_IMPLEMENT_FN_WRITEOUT */
#ifdef USB_CFG_PULLUP_IOPORTNAME
#define usbDeviceConnect() ((USB_PULLUP_DDR |= (1<<USB_CFG_PULLUP_BIT)), \
(USB_PULLUP_OUT |= (1<<USB_CFG_PULLUP_BIT)))
#define usbDeviceDisconnect() ((USB_PULLUP_DDR &= ~(1<<USB_CFG_PULLUP_BIT)), \
(USB_PULLUP_OUT &= ~(1<<USB_CFG_PULLUP_BIT)))
#else /* USB_CFG_PULLUP_IOPORTNAME */
#define usbDeviceConnect() (USBDDR &= ~(1<<USBMINUS))
#define usbDeviceDisconnect() (USBDDR |= (1<<USBMINUS))
#endif /* USB_CFG_PULLUP_IOPORTNAME */
/* The macros usbDeviceConnect() and usbDeviceDisconnect() (intended to look
* like a function) connect resp. disconnect the device from the host's USB.
* If the constants USB_CFG_PULLUP_IOPORT and USB_CFG_PULLUP_BIT are defined
* in usbconfig.h, a disconnect consists of removing the pull-up resisitor
* from D-, otherwise the disconnect is done by brute-force pulling D- to GND.
* This does not conform to the spec, but it works.
* Please note that the USB interrupt must be disabled while the device is
* in disconnected state, or the interrupt handler will hang! You can either
* turn off the USB interrupt selectively with
* USB_INTR_ENABLE &= ~(1 << USB_INTR_ENABLE_BIT)
* or use cli() to disable interrupts globally.
*/
extern unsigned usbCrc16(unsigned data, uchar len);
#define usbCrc16(data, len) usbCrc16((unsigned)(data), len)
/* This function calculates the binary complement of the data CRC used in
* USB data packets. The value is used to build raw transmit packets.
* You may want to use this function for data checksums or to verify received
* data. We enforce 16 bit calling conventions for compatibility with IAR's
* tiny memory model.
*/
extern unsigned usbCrc16Append(unsigned data, uchar len);
#define usbCrc16Append(data, len) usbCrc16Append((unsigned)(data), len)
/* This function is equivalent to usbCrc16() above, except that it appends
* the 2 bytes CRC (lowbyte first) in the 'data' buffer after reading 'len'
* bytes.
*/
#if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
extern unsigned usbMeasureFrameLength(void);
/* This function MUST be called IMMEDIATELY AFTER USB reset and measures 1/7 of
* the number of CPU cycles during one USB frame minus one low speed bit
* length. In other words: return value = 1499 * (F_CPU / 10.5 MHz)
* Since this is a busy wait, you MUST disable all interrupts with cli() before
* calling this function.
* This can be used to calibrate the AVR's RC oscillator.
*/
#endif
extern uchar usbConfiguration;
/* This value contains the current configuration set by the host. The driver
* allows setting and querying of this variable with the USB SET_CONFIGURATION
* and GET_CONFIGURATION requests, but does not use it otherwise.
* You may want to reflect the "configured" status with a LED on the device or
* switch on high power parts of the circuit only if the device is configured.
*/
#if USB_COUNT_SOF
extern volatile uchar usbSofCount;
/* This variable is incremented on every SOF packet. It is only available if
* the macro USB_COUNT_SOF is defined to a value != 0.
*/
#endif
#define USB_STRING_DESCRIPTOR_HEADER(stringLength) ((2*(stringLength)+2) | (3<<8))
/* This macro builds a descriptor header for a string descriptor given the
* string's length. See usbdrv.c for an example how to use it.
*/
#if USB_CFG_HAVE_FLOWCONTROL
extern volatile schar usbRxLen;
#define usbDisableAllRequests() usbRxLen = -1
/* Must be called from usbFunctionWrite(). This macro disables all data input
* from the USB interface. Requests from the host are answered with a NAK
* while they are disabled.
*/
#define usbEnableAllRequests() usbRxLen = 0
/* May only be called if requests are disabled. This macro enables input from
* the USB interface after it has been disabled with usbDisableAllRequests().
*/
#define usbAllRequestsAreDisabled() (usbRxLen < 0)
/* Use this macro to find out whether requests are disabled. It may be needed
* to ensure that usbEnableAllRequests() is never called when requests are
* enabled.
*/
#endif
#define USB_SET_DATATOKEN1(token) usbTxBuf1[0] = token
#define USB_SET_DATATOKEN3(token) usbTxBuf3[0] = token
/* These two macros can be used by application software to reset data toggling
* for interrupt-in endpoints 1 and 3. Since the token is toggled BEFORE
* sending data, you must set the opposite value of the token which should come
* first.
*/
#endif /* __ASSEMBLER__ */
/* ------------------------------------------------------------------------- */
/* ----------------- Definitions for Descriptor Properties ----------------- */
/* ------------------------------------------------------------------------- */
/* This is advanced stuff. See usbconfig-prototype.h for more information
* about the various methods to define USB descriptors. If you do nothing,
* the default descriptors will be used.
*/
#define USB_PROP_IS_DYNAMIC (1 << 14)
/* If this property is set for a descriptor, usbFunctionDescriptor() will be
* used to obtain the particular descriptor.
*/
#define USB_PROP_IS_RAM (1 << 15)
/* If this property is set for a descriptor, the data is read from RAM
* memory instead of Flash. The property is used for all methods to provide
* external descriptors.
*/
#define USB_PROP_LENGTH(len) ((len) & 0x3fff)
/* If a static external descriptor is used, this is the total length of the
* descriptor in bytes.
*/
/* all descriptors which may have properties: */
#ifndef USB_CFG_DESCR_PROPS_DEVICE
#define USB_CFG_DESCR_PROPS_DEVICE 0
#endif
#ifndef USB_CFG_DESCR_PROPS_CONFIGURATION
#define USB_CFG_DESCR_PROPS_CONFIGURATION 0
#endif
#ifndef USB_CFG_DESCR_PROPS_STRINGS
#define USB_CFG_DESCR_PROPS_STRINGS 0
#endif
#ifndef USB_CFG_DESCR_PROPS_STRING_0
#define USB_CFG_DESCR_PROPS_STRING_0 0
#endif
#ifndef USB_CFG_DESCR_PROPS_STRING_VENDOR
#define USB_CFG_DESCR_PROPS_STRING_VENDOR 0
#endif
#ifndef USB_CFG_DESCR_PROPS_STRING_PRODUCT
#define USB_CFG_DESCR_PROPS_STRING_PRODUCT 0
#endif
#ifndef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER 0
#endif
#ifndef USB_CFG_DESCR_PROPS_HID
#define USB_CFG_DESCR_PROPS_HID 0
#endif
#if !(USB_CFG_DESCR_PROPS_HID_REPORT)
# undef USB_CFG_DESCR_PROPS_HID_REPORT
# if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH /* do some backward compatibility tricks */
# define USB_CFG_DESCR_PROPS_HID_REPORT USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
# else
# define USB_CFG_DESCR_PROPS_HID_REPORT 0
# endif
#endif
#ifndef USB_CFG_DESCR_PROPS_UNKNOWN
#define USB_CFG_DESCR_PROPS_UNKNOWN 0
#endif
/* ------------------ forward declaration of descriptors ------------------- */
/* If you use external static descriptors, they must be stored in global
* arrays as declared below:
*/
#ifndef __ASSEMBLER__
extern
#if !(USB_CFG_DESCR_PROPS_DEVICE & USB_PROP_IS_RAM)
PROGMEM
#endif
char usbDescriptorDevice[];
extern
#if !(USB_CFG_DESCR_PROPS_CONFIGURATION & USB_PROP_IS_RAM)
PROGMEM
#endif
char usbDescriptorConfiguration[];
extern
#if !(USB_CFG_DESCR_PROPS_HID_REPORT & USB_PROP_IS_RAM)
PROGMEM
#endif
char usbDescriptorHidReport[];
extern
#if !(USB_CFG_DESCR_PROPS_STRING_0 & USB_PROP_IS_RAM)
PROGMEM
#endif
char usbDescriptorString0[];
extern
#if !(USB_CFG_DESCR_PROPS_STRING_VENDOR & USB_PROP_IS_RAM)
PROGMEM
#endif
int usbDescriptorStringVendor[];
extern
#if !(USB_CFG_DESCR_PROPS_STRING_PRODUCT & USB_PROP_IS_RAM)
PROGMEM
#endif
int usbDescriptorStringDevice[];
extern
#if !(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER & USB_PROP_IS_RAM)
PROGMEM
#endif
int usbDescriptorStringSerialNumber[];
#endif /* __ASSEMBLER__ */
/* ------------------------------------------------------------------------- */
/* ------------------------ General Purpose Macros ------------------------- */
/* ------------------------------------------------------------------------- */
#define USB_CONCAT(a, b) a ## b
#define USB_CONCAT_EXPANDED(a, b) USB_CONCAT(a, b)
#define USB_OUTPORT(name) USB_CONCAT(PORT, name)
#define USB_INPORT(name) USB_CONCAT(PIN, name)
#define USB_DDRPORT(name) USB_CONCAT(DDR, name)
/* The double-define trick above lets us concatenate strings which are
* defined by macros.
*/
/* ------------------------------------------------------------------------- */
/* ------------------------- Constant definitions -------------------------- */
/* ------------------------------------------------------------------------- */
#if !defined __ASSEMBLER__ && (!defined USB_CFG_VENDOR_ID || !defined USB_CFG_DEVICE_ID)
#warning "You should define USB_CFG_VENDOR_ID and USB_CFG_DEVICE_ID in usbconfig.h"
/* If the user has not defined IDs, we default to obdev's free IDs.
* See USBID-License.txt for details.
*/
#endif
/* make sure we have a VID and PID defined, byte order is lowbyte, highbyte */
#ifndef USB_CFG_VENDOR_ID
# define USB_CFG_VENDOR_ID 0xc0, 0x16 /* 5824 in dec, stands for VOTI */
#endif
#ifndef USB_CFG_DEVICE_ID
# if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
# define USB_CFG_DEVICE_ID 0xdf, 0x05 /* 1503 in dec, shared PID for HIDs */
# elif USB_CFG_INTERFACE_CLASS == 2
# define USB_CFG_DEVICE_ID 0xe1, 0x05 /* 1505 in dec, shared PID for CDC Modems */
# else
# define USB_CFG_DEVICE_ID 0xdc, 0x05 /* 1500 in dec, obdev's free PID */
# endif
#endif
/* Derive Output, Input and DataDirection ports from port names */
#ifndef USB_CFG_IOPORTNAME
#error "You must define USB_CFG_IOPORTNAME in usbconfig.h, see usbconfig-prototype.h"
#endif
#define USBOUT USB_OUTPORT(USB_CFG_IOPORTNAME)
#define USB_PULLUP_OUT USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
#define USBIN USB_INPORT(USB_CFG_IOPORTNAME)
#define USBDDR USB_DDRPORT(USB_CFG_IOPORTNAME)
#define USB_PULLUP_DDR USB_DDRPORT(USB_CFG_PULLUP_IOPORTNAME)
#define USBMINUS USB_CFG_DMINUS_BIT
#define USBPLUS USB_CFG_DPLUS_BIT
#define USBIDLE (1<<USB_CFG_DMINUS_BIT) /* value representing J state */
#define USBMASK ((1<<USB_CFG_DPLUS_BIT) | (1<<USB_CFG_DMINUS_BIT)) /* mask for USB I/O bits */
/* defines for backward compatibility with older driver versions: */
#define USB_CFG_IOPORT USB_OUTPORT(USB_CFG_IOPORTNAME)
#ifdef USB_CFG_PULLUP_IOPORTNAME
#define USB_CFG_PULLUP_IOPORT USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
#endif
#ifndef USB_CFG_EP3_NUMBER /* if not defined in usbconfig.h */
#define USB_CFG_EP3_NUMBER 3
#endif
#define USB_BUFSIZE 11 /* PID, 8 bytes data, 2 bytes CRC */
/* ----- Try to find registers and bits responsible for ext interrupt 0 ----- */
#ifndef USB_INTR_CFG /* allow user to override our default */
# if defined EICRA
# define USB_INTR_CFG EICRA
# else
# define USB_INTR_CFG MCUCR
# endif
#endif
#ifndef USB_INTR_CFG_SET /* allow user to override our default */
# define USB_INTR_CFG_SET ((1 << ISC00) | (1 << ISC01)) /* cfg for rising edge */
#endif
#ifndef USB_INTR_CFG_CLR /* allow user to override our default */
# define USB_INTR_CFG_CLR 0 /* no bits to clear */
#endif
#ifndef USB_INTR_ENABLE /* allow user to override our default */
# if defined GIMSK
# define USB_INTR_ENABLE GIMSK
# elif defined EIMSK
# define USB_INTR_ENABLE EIMSK
# else
# define USB_INTR_ENABLE GICR
# endif
#endif
#ifndef USB_INTR_ENABLE_BIT /* allow user to override our default */
# define USB_INTR_ENABLE_BIT INT0
#endif
#ifndef USB_INTR_PENDING /* allow user to override our default */
# if defined EIFR
# define USB_INTR_PENDING EIFR
# else
# define USB_INTR_PENDING GIFR
# endif
#endif
#ifndef USB_INTR_PENDING_BIT /* allow user to override our default */
# define USB_INTR_PENDING_BIT INTF0
#endif
/*
The defines above don't work for the following chips
at90c8534: no ISC0?, no PORTB, can't find a data sheet
at86rf401: no PORTB, no MCUCR etc, low clock rate
atmega103: no ISC0? (maybe omission in header, can't find data sheet)
atmega603: not defined in avr-libc
at43usb320, at43usb355, at76c711: have USB anyway
at94k: is different...
at90s1200, attiny11, attiny12, attiny15, attiny28: these have no RAM
*/
/* ------------------------------------------------------------------------- */
/* ----------------- USB Specification Constants and Types ----------------- */
/* ------------------------------------------------------------------------- */
/* USB Token values */
#define USBPID_SETUP 0x2d
#define USBPID_OUT 0xe1
#define USBPID_IN 0x69
#define USBPID_DATA0 0xc3
#define USBPID_DATA1 0x4b
#define USBPID_ACK 0xd2
#define USBPID_NAK 0x5a
#define USBPID_STALL 0x1e
#ifndef USB_INITIAL_DATATOKEN
#define USB_INITIAL_DATATOKEN USBPID_DATA1
#endif
#ifndef __ASSEMBLER__
typedef struct usbTxStatus{
volatile uchar len;
uchar buffer[USB_BUFSIZE];
}usbTxStatus_t;
extern usbTxStatus_t usbTxStatus1, usbTxStatus3;
#define usbTxLen1 usbTxStatus1.len
#define usbTxBuf1 usbTxStatus1.buffer
#define usbTxLen3 usbTxStatus3.len
#define usbTxBuf3 usbTxStatus3.buffer
typedef union usbWord{
unsigned word;
uchar bytes[2];
}usbWord_t;
typedef struct usbRequest{
uchar bmRequestType;
uchar bRequest;
usbWord_t wValue;
usbWord_t wIndex;
usbWord_t wLength;
}usbRequest_t;
/* This structure matches the 8 byte setup request */
#endif
/* bmRequestType field in USB setup:
* d t t r r r r r, where
* d ..... direction: 0=host->device, 1=device->host
* t ..... type: 0=standard, 1=class, 2=vendor, 3=reserved
* r ..... recipient: 0=device, 1=interface, 2=endpoint, 3=other
*/
/* USB setup recipient values */
#define USBRQ_RCPT_MASK 0x1f
#define USBRQ_RCPT_DEVICE 0
#define USBRQ_RCPT_INTERFACE 1
#define USBRQ_RCPT_ENDPOINT 2
/* USB request type values */
#define USBRQ_TYPE_MASK 0x60
#define USBRQ_TYPE_STANDARD (0<<5)
#define USBRQ_TYPE_CLASS (1<<5)
#define USBRQ_TYPE_VENDOR (2<<5)
/* USB direction values: */
#define USBRQ_DIR_MASK 0x80
#define USBRQ_DIR_HOST_TO_DEVICE (0<<7)
#define USBRQ_DIR_DEVICE_TO_HOST (1<<7)
/* USB Standard Requests */
#define USBRQ_GET_STATUS 0
#define USBRQ_CLEAR_FEATURE 1
#define USBRQ_SET_FEATURE 3
#define USBRQ_SET_ADDRESS 5
#define USBRQ_GET_DESCRIPTOR 6
#define USBRQ_SET_DESCRIPTOR 7
#define USBRQ_GET_CONFIGURATION 8
#define USBRQ_SET_CONFIGURATION 9
#define USBRQ_GET_INTERFACE 10
#define USBRQ_SET_INTERFACE 11
#define USBRQ_SYNCH_FRAME 12
/* USB descriptor constants */
#define USBDESCR_DEVICE 1
#define USBDESCR_CONFIG 2
#define USBDESCR_STRING 3
#define USBDESCR_INTERFACE 4
#define USBDESCR_ENDPOINT 5
#define USBDESCR_HID 0x21
#define USBDESCR_HID_REPORT 0x22
#define USBDESCR_HID_PHYS 0x23
#define USBATTR_BUSPOWER 0x80
#define USBATTR_SELFPOWER 0x40
#define USBATTR_REMOTEWAKE 0x20
/* USB HID Requests */
#define USBRQ_HID_GET_REPORT 0x01
#define USBRQ_HID_GET_IDLE 0x02
#define USBRQ_HID_GET_PROTOCOL 0x03
#define USBRQ_HID_SET_REPORT 0x09
#define USBRQ_HID_SET_IDLE 0x0a
#define USBRQ_HID_SET_PROTOCOL 0x0b
/* ------------------------------------------------------------------------- */
#endif /* __usbdrv_h_included__ */

314
avr/bootloader/usbdrv/usbdrvasm.S
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@@ -1,314 +0,0 @@
/* Name: usbdrvasm.S
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2007-06-13
* Tabsize: 4
* Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* Revision: $Id$
*/
/*
General Description:
This module is the assembler part of the USB driver. This file contains
general code (preprocessor acrobatics and CRC computation) and then includes
the file appropriate for the given clock rate.
*/
#include "iarcompat.h"
#ifndef __IAR_SYSTEMS_ASM__
/* configs for io.h */
# define __SFR_OFFSET 0
# define _VECTOR(N) __vector_ ## N /* io.h does not define this for asm */
# include <avr/io.h> /* for CPU I/O register definitions and vectors */
# define macro .macro /* GNU Assembler macro definition */
# define endm .endm /* End of GNU Assembler macro definition */
#endif /* __IAR_SYSTEMS_ASM__ */
#include "usbdrv.h" /* for common defs */
/* register names */
#define x1 r16
#define x2 r17
#define shift r18
#define cnt r19
#define x3 r20
#define x4 r21
#define bitcnt r22
#define phase x4
#define leap x4
/* Some assembler dependent definitions and declarations: */
#ifdef __IAR_SYSTEMS_ASM__
# define nop2 rjmp $+2 /* jump to next instruction */
# define XL r26
# define XH r27
# define YL r28
# define YH r29
# define ZL r30
# define ZH r31
# define lo8(x) LOW(x)
# define hi8(x) (((x)>>8) & 0xff) /* not HIGH to allow XLINK to make a proper range check */
extern usbRxBuf, usbDeviceAddr, usbNewDeviceAddr, usbInputBufOffset
extern usbCurrentTok, usbRxLen, usbRxToken, usbTxLen
extern usbTxBuf, usbTxStatus1, usbTxStatus3
# if USB_COUNT_SOF
extern usbSofCount
# endif
public usbCrc16
public usbCrc16Append
COMMON INTVEC
# ifndef USB_INTR_VECTOR
ORG INT0_vect
# else /* USB_INTR_VECTOR */
ORG USB_INTR_VECTOR
# undef USB_INTR_VECTOR
# endif /* USB_INTR_VECTOR */
# define USB_INTR_VECTOR usbInterruptHandler
rjmp USB_INTR_VECTOR
RSEG CODE
#else /* __IAR_SYSTEMS_ASM__ */
# define nop2 rjmp .+0 /* jump to next instruction */
# ifndef USB_INTR_VECTOR /* default to hardware interrupt INT0 */
# define USB_INTR_VECTOR SIG_INTERRUPT0
# endif
.text
.global USB_INTR_VECTOR
.type USB_INTR_VECTOR, @function
.global usbCrc16
.global usbCrc16Append
#endif /* __IAR_SYSTEMS_ASM__ */
#if USB_INTR_PENDING < 0x40 /* This is an I/O address, use in and out */
# define USB_LOAD_PENDING(reg) in reg, USB_INTR_PENDING
# define USB_STORE_PENDING(reg) out USB_INTR_PENDING, reg
#else /* It's a memory address, use lds and sts */
# define USB_LOAD_PENDING(reg) lds reg, USB_INTR_PENDING
# define USB_STORE_PENDING(reg) sts USB_INTR_PENDING, reg
#endif
#define usbTxLen1 usbTxStatus1
#define usbTxBuf1 (usbTxStatus1 + 1)
#define usbTxLen3 usbTxStatus3
#define usbTxBuf3 (usbTxStatus3 + 1)
;----------------------------------------------------------------------------
; Utility functions
;----------------------------------------------------------------------------
#ifdef __IAR_SYSTEMS_ASM__
/* Register assignments for usbCrc16 on IAR cc */
/* Calling conventions on IAR:
* First parameter passed in r16/r17, second in r18/r19 and so on.
* Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
* Result is passed in r16/r17
* In case of the "tiny" memory model, pointers are only 8 bit with no
* padding. We therefore pass argument 1 as "16 bit unsigned".
*/
RTMODEL "__rt_version", "3"
/* The line above will generate an error if cc calling conventions change.
* The value "3" above is valid for IAR 4.10B/W32
*/
# define argLen r18 /* argument 2 */
# define argPtrL r16 /* argument 1 */
# define argPtrH r17 /* argument 1 */
# define resCrcL r16 /* result */
# define resCrcH r17 /* result */
# define ptrL ZL
# define ptrH ZH
# define ptr Z
# define byte r22
# define bitCnt r19
# define polyL r20
# define polyH r21
# define scratch r23
#else /* __IAR_SYSTEMS_ASM__ */
/* Register assignments for usbCrc16 on gcc */
/* Calling conventions on gcc:
* First parameter passed in r24/r25, second in r22/23 and so on.
* Callee must preserve r1-r17, r28/r29
* Result is passed in r24/r25
*/
# define argLen r22 /* argument 2 */
# define argPtrL r24 /* argument 1 */
# define argPtrH r25 /* argument 1 */
# define resCrcL r24 /* result */
# define resCrcH r25 /* result */
# define ptrL XL
# define ptrH XH
# define ptr x
# define byte r18
# define bitCnt r19
# define polyL r20
# define polyH r21
# define scratch r23
#endif
; extern unsigned usbCrc16(unsigned char *data, unsigned char len);
; data: r24/25
; len: r22
; temp variables:
; r18: data byte
; r19: bit counter
; r20/21: polynomial
; r23: scratch
; r24/25: crc-sum
; r26/27=X: ptr
usbCrc16:
mov ptrL, argPtrL
mov ptrH, argPtrH
ldi resCrcL, 0
ldi resCrcH, 0
ldi polyL, lo8(0xa001)
ldi polyH, hi8(0xa001)
com argLen ; argLen = -argLen - 1
crcByteLoop:
subi argLen, -1
brcc crcReady ; modified loop to ensure that carry is set below
ld byte, ptr+
ldi bitCnt, -8 ; strange loop counter to ensure that carry is set where we need it
eor resCrcL, byte
crcBitLoop:
ror resCrcH ; carry is always set here
ror resCrcL
brcs crcNoXor
eor resCrcL, polyL
eor resCrcH, polyH
crcNoXor:
subi bitCnt, -1
brcs crcBitLoop
rjmp crcByteLoop
crcReady:
ret
; Thanks to Reimar Doeffinger for optimizing this CRC routine!
; extern unsigned usbCrc16Append(unsigned char *data, unsigned char len);
usbCrc16Append:
rcall usbCrc16
st ptr+, resCrcL
st ptr+, resCrcH
ret
#undef argLen
#undef argPtrL
#undef argPtrH
#undef resCrcL
#undef resCrcH
#undef ptrL
#undef ptrH
#undef ptr
#undef byte
#undef bitCnt
#undef polyL
#undef polyH
#undef scratch
#if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
#ifdef __IAR_SYSTEMS_ASM__
/* Register assignments for usbMeasureFrameLength on IAR cc */
/* Calling conventions on IAR:
* First parameter passed in r16/r17, second in r18/r19 and so on.
* Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
* Result is passed in r16/r17
* In case of the "tiny" memory model, pointers are only 8 bit with no
* padding. We therefore pass argument 1 as "16 bit unsigned".
*/
# define resL r16
# define resH r17
# define cnt16L r30
# define cnt16H r31
# define cntH r18
#else /* __IAR_SYSTEMS_ASM__ */
/* Register assignments for usbMeasureFrameLength on gcc */
/* Calling conventions on gcc:
* First parameter passed in r24/r25, second in r22/23 and so on.
* Callee must preserve r1-r17, r28/r29
* Result is passed in r24/r25
*/
# define resL r24
# define resH r25
# define cnt16L r24
# define cnt16H r25
# define cntH r26
#endif
# define cnt16 cnt16L
; extern unsigned usbMeasurePacketLength(void);
; returns time between two idle strobes in multiples of 7 CPU clocks
.global usbMeasureFrameLength
usbMeasureFrameLength:
ldi cntH, 6 ; wait ~ 10 ms for D- == 0
clr cnt16L
clr cnt16H
usbMFTime16:
dec cntH
breq usbMFTimeout
usbMFWaitStrobe: ; first wait for D- == 0 (idle strobe)
sbiw cnt16, 1 ;[0] [6]
breq usbMFTime16 ;[2]
sbic USBIN, USBMINUS ;[3]
rjmp usbMFWaitStrobe ;[4]
usbMFWaitIdle: ; then wait until idle again
sbis USBIN, USBMINUS ;1 wait for D- == 1
rjmp usbMFWaitIdle ;2
ldi cnt16L, 1 ;1 represents cycles so far
clr cnt16H ;1
usbMFWaitLoop:
in cntH, USBIN ;[0] [7]
adiw cnt16, 1 ;[1]
breq usbMFTimeout ;[3]
andi cntH, USBMASK ;[4]
brne usbMFWaitLoop ;[5]
usbMFTimeout:
#if resL != cnt16L
mov resL, cnt16L
mov resH, cnt16H
#endif
ret
#undef resL
#undef resH
#undef cnt16
#undef cnt16L
#undef cnt16H
#undef cntH
#endif /* USB_CFG_HAVE_MEASURE_FRAME_LENGTH */
;----------------------------------------------------------------------------
; Now include the clock rate specific code
;----------------------------------------------------------------------------
#ifndef USB_CFG_CLOCK_KHZ
# define USB_CFG_CLOCK_KHZ 12000
#endif
#if USB_CFG_CLOCK_KHZ == 12000
# include "usbdrvasm12.inc"
#elif USB_CFG_CLOCK_KHZ == 15000
# include "usbdrvasm15.inc"
#elif USB_CFG_CLOCK_KHZ == 16000
# include "usbdrvasm16.inc"
#elif USB_CFG_CLOCK_KHZ == 16500
# include "usbdrvasm165.inc"
#elif USB_CFG_CLOCK_KHZ == 20000
# include "usbdrvasm20.inc"
#else
# error "USB_CFG_CLOCK_KHZ is not one of the supported rates!"
#endif

21
avr/bootloader/usbdrv/usbdrvasm.asm
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@@ -1,21 +0,0 @@
/* Name: usbdrvasm.asm
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2006-03-01
* Tabsize: 4
* Copyright: (c) 2006 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* This Revision: $Id$
*/
/*
General Description:
The IAR compiler/assembler system prefers assembler files with file extension
".asm". We simply provide this file as an alias for usbdrvasm.S.
Thanks to Oleg Semyonov for his help with the IAR tools port!
*/
#include "usbdrvasm.S"
end

427
avr/bootloader/usbdrv/usbdrvasm12.inc
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@@ -1,427 +0,0 @@
/* Name: usbdrvasm12.inc
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2004-12-29
* Tabsize: 4
* Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* This Revision: $Id: usbdrvasm12.inc 483 2008-02-05 15:05:32Z cs $
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file is the 12 MHz version of the asssembler part of the USB driver. It
requires a 12 MHz crystal (not a ceramic resonator and not a calibrated RC
oscillator).
See usbdrv.h for a description of the entire driver.
Since almost all of this code is timing critical, don't change unless you
really know what you are doing! Many parts require not only a maximum number
of CPU cycles, but even an exact number of cycles!
Timing constraints according to spec (in bit times):
timing subject min max CPUcycles
---------------------------------------------------------------------------
EOP of OUT/SETUP to sync pattern of DATA0 (both rx) 2 16 16-128
EOP of IN to sync pattern of DATA0 (rx, then tx) 2 7.5 16-60
DATAx (rx) to ACK/NAK/STALL (tx) 2 7.5 16-60
*/
;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
;max allowable interrupt latency: 34 cycles -> max 25 cycles interrupt disable
;max stack usage: [ret(2), YL, SREG, YH, shift, x1, x2, x3, cnt, x4] = 11 bytes
;Numbers in brackets are maximum cycles since SOF.
USB_INTR_VECTOR:
;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt
push YL ;2 [35] push only what is necessary to sync with edge ASAP
in YL, SREG ;1 [37]
push YL ;2 [39]
;----------------------------------------------------------------------------
; Synchronize with sync pattern:
;----------------------------------------------------------------------------
;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
;sync up with J to K edge during sync pattern -- use fastest possible loops
;first part has no timeout because it waits for IDLE or SE1 (== disconnected)
waitForJ:
sbis USBIN, USBMINUS ;1 [40] wait for D- == 1
rjmp waitForJ ;2
waitForK:
;The following code results in a sampling window of 1/4 bit which meets the spec.
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
#if USB_COUNT_SOF
lds YL, usbSofCount
inc YL
sts usbSofCount, YL
#endif /* USB_COUNT_SOF */
rjmp sofError
foundK:
;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
;are cycles from center of first sync (double K) bit after the instruction
push YH ;2 [2]
lds YL, usbInputBufOffset;2 [4]
clr YH ;1 [5]
subi YL, lo8(-(usbRxBuf));1 [6]
sbci YH, hi8(-(usbRxBuf));1 [7]
sbis USBIN, USBMINUS ;1 [8] we want two bits K [sample 1 cycle too early]
rjmp haveTwoBitsK ;2 [10]
pop YH ;2 [11] undo the push from before
rjmp waitForK ;2 [13] this was not the end of sync, retry
haveTwoBitsK:
;----------------------------------------------------------------------------
; push more registers and initialize values while we sample the first bits:
;----------------------------------------------------------------------------
push shift ;2 [16]
push x1 ;2 [12]
push x2 ;2 [14]
in x1, USBIN ;1 [17] <-- sample bit 0
ldi shift, 0xff ;1 [18]
bst x1, USBMINUS ;1 [19]
bld shift, 0 ;1 [20]
push x3 ;2 [22]
push cnt ;2 [24]
in x2, USBIN ;1 [25] <-- sample bit 1
ser x3 ;1 [26] [inserted init instruction]
eor x1, x2 ;1 [27]
bst x1, USBMINUS ;1 [28]
bld shift, 1 ;1 [29]
ldi cnt, USB_BUFSIZE;1 [30] [inserted init instruction]
rjmp rxbit2 ;2 [32]
;----------------------------------------------------------------------------
; Receiver loop (numbers in brackets are cycles within byte after instr)
;----------------------------------------------------------------------------
unstuff0: ;1 (branch taken)
andi x3, ~0x01 ;1 [15]
mov x1, x2 ;1 [16] x2 contains last sampled (stuffed) bit
in x2, USBIN ;1 [17] <-- sample bit 1 again
ori shift, 0x01 ;1 [18]
rjmp didUnstuff0 ;2 [20]
unstuff1: ;1 (branch taken)
mov x2, x1 ;1 [21] x1 contains last sampled (stuffed) bit
andi x3, ~0x02 ;1 [22]
ori shift, 0x02 ;1 [23]
nop ;1 [24]
in x1, USBIN ;1 [25] <-- sample bit 2 again
rjmp didUnstuff1 ;2 [27]
unstuff2: ;1 (branch taken)
andi x3, ~0x04 ;1 [29]
ori shift, 0x04 ;1 [30]
mov x1, x2 ;1 [31] x2 contains last sampled (stuffed) bit
nop ;1 [32]
in x2, USBIN ;1 [33] <-- sample bit 3
rjmp didUnstuff2 ;2 [35]
unstuff3: ;1 (branch taken)
in x2, USBIN ;1 [34] <-- sample stuffed bit 3 [one cycle too late]
andi x3, ~0x08 ;1 [35]
ori shift, 0x08 ;1 [36]
rjmp didUnstuff3 ;2 [38]
unstuff4: ;1 (branch taken)
andi x3, ~0x10 ;1 [40]
in x1, USBIN ;1 [41] <-- sample stuffed bit 4
ori shift, 0x10 ;1 [42]
rjmp didUnstuff4 ;2 [44]
unstuff5: ;1 (branch taken)
andi x3, ~0x20 ;1 [48]
in x2, USBIN ;1 [49] <-- sample stuffed bit 5
ori shift, 0x20 ;1 [50]
rjmp didUnstuff5 ;2 [52]
unstuff6: ;1 (branch taken)
andi x3, ~0x40 ;1 [56]
in x1, USBIN ;1 [57] <-- sample stuffed bit 6
ori shift, 0x40 ;1 [58]
rjmp didUnstuff6 ;2 [60]
; extra jobs done during bit interval:
; bit 0: store, clear [SE0 is unreliable here due to bit dribbling in hubs]
; bit 1: se0 check
; bit 2: overflow check
; bit 3: recovery from delay [bit 0 tasks took too long]
; bit 4: none
; bit 5: none
; bit 6: none
; bit 7: jump, eor
rxLoop:
eor x3, shift ;1 [0] reconstruct: x3 is 0 at bit locations we changed, 1 at others
in x1, USBIN ;1 [1] <-- sample bit 0
st y+, x3 ;2 [3] store data
ser x3 ;1 [4]
nop ;1 [5]
eor x2, x1 ;1 [6]
bst x2, USBMINUS;1 [7]
bld shift, 0 ;1 [8]
in x2, USBIN ;1 [9] <-- sample bit 1 (or possibly bit 0 stuffed)
andi x2, USBMASK ;1 [10]
breq se0 ;1 [11] SE0 check for bit 1
andi shift, 0xf9 ;1 [12]
didUnstuff0:
breq unstuff0 ;1 [13]
eor x1, x2 ;1 [14]
bst x1, USBMINUS;1 [15]
bld shift, 1 ;1 [16]
rxbit2:
in x1, USBIN ;1 [17] <-- sample bit 2 (or possibly bit 1 stuffed)
andi shift, 0xf3 ;1 [18]
breq unstuff1 ;1 [19] do remaining work for bit 1
didUnstuff1:
subi cnt, 1 ;1 [20]
brcs overflow ;1 [21] loop control
eor x2, x1 ;1 [22]
bst x2, USBMINUS;1 [23]
bld shift, 2 ;1 [24]
in x2, USBIN ;1 [25] <-- sample bit 3 (or possibly bit 2 stuffed)
andi shift, 0xe7 ;1 [26]
breq unstuff2 ;1 [27]
didUnstuff2:
eor x1, x2 ;1 [28]
bst x1, USBMINUS;1 [29]
bld shift, 3 ;1 [30]
didUnstuff3:
andi shift, 0xcf ;1 [31]
breq unstuff3 ;1 [32]
in x1, USBIN ;1 [33] <-- sample bit 4
eor x2, x1 ;1 [34]
bst x2, USBMINUS;1 [35]
bld shift, 4 ;1 [36]
didUnstuff4:
andi shift, 0x9f ;1 [37]
breq unstuff4 ;1 [38]
nop2 ;2 [40]
in x2, USBIN ;1 [41] <-- sample bit 5
eor x1, x2 ;1 [42]
bst x1, USBMINUS;1 [43]
bld shift, 5 ;1 [44]
didUnstuff5:
andi shift, 0x3f ;1 [45]
breq unstuff5 ;1 [46]
nop2 ;2 [48]
in x1, USBIN ;1 [49] <-- sample bit 6
eor x2, x1 ;1 [50]
bst x2, USBMINUS;1 [51]
bld shift, 6 ;1 [52]
didUnstuff6:
cpi shift, 0x02 ;1 [53]
brlo unstuff6 ;1 [54]
nop2 ;2 [56]
in x2, USBIN ;1 [57] <-- sample bit 7
eor x1, x2 ;1 [58]
bst x1, USBMINUS;1 [59]
bld shift, 7 ;1 [60]
didUnstuff7:
cpi shift, 0x04 ;1 [61]
brsh rxLoop ;2 [63] loop control
unstuff7:
andi x3, ~0x80 ;1 [63]
ori shift, 0x80 ;1 [64]
in x2, USBIN ;1 [65] <-- sample stuffed bit 7
nop ;1 [66]
rjmp didUnstuff7 ;2 [68]
macro POP_STANDARD ; 12 cycles
pop cnt
pop x3
pop x2
pop x1
pop shift
pop YH
endm
macro POP_RETI ; 5 cycles
pop YL
out SREG, YL
pop YL
endm
#include "asmcommon.inc"
;----------------------------------------------------------------------------
; Transmitting data
;----------------------------------------------------------------------------
bitstuff0: ;1 (for branch taken)
eor x1, x4 ;1
ldi x2, 0 ;1
out USBOUT, x1 ;1 <-- out
rjmp didStuff0 ;2 branch back 2 cycles earlier
bitstuff1: ;1 (for branch taken)
eor x1, x4 ;1
rjmp didStuff1 ;2 we know that C is clear, jump back to do OUT and ror 0 into x2
bitstuff2: ;1 (for branch taken)
eor x1, x4 ;1
rjmp didStuff2 ;2 jump back 4 cycles earlier and do out and ror 0 into x2
bitstuff3: ;1 (for branch taken)
eor x1, x4 ;1
rjmp didStuff3 ;2 jump back earlier and ror 0 into x2
bitstuff4: ;1 (for branch taken)
eor x1, x4 ;1
ldi x2, 0 ;1
out USBOUT, x1 ;1 <-- out
rjmp didStuff4 ;2 jump back 2 cycles earlier
sendNakAndReti: ;0 [-19] 19 cycles until SOP
ldi x3, USBPID_NAK ;1 [-18]
rjmp usbSendX3 ;2 [-16]
sendAckAndReti: ;0 [-19] 19 cycles until SOP
ldi x3, USBPID_ACK ;1 [-18]
rjmp usbSendX3 ;2 [-16]
sendCntAndReti: ;0 [-17] 17 cycles until SOP
mov x3, cnt ;1 [-16]
usbSendX3: ;0 [-16]
ldi YL, 20 ;1 [-15] 'x3' is R20
ldi YH, 0 ;1 [-14]
ldi cnt, 2 ;1 [-13]
; rjmp usbSendAndReti fallthrough
; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
;usbSend:
;pointer to data in 'Y'
;number of bytes in 'cnt' -- including sync byte
;uses: x1...x4, shift, cnt, Y
;Numbers in brackets are time since first bit of sync pattern is sent
usbSendAndReti: ;0 [-13] timing: 13 cycles until SOP
in x2, USBDDR ;1 [-12]
ori x2, USBMASK ;1 [-11]
sbi USBOUT, USBMINUS;2 [-9] prepare idle state; D+ and D- must have been 0 (no pullups)
in x1, USBOUT ;1 [-8] port mirror for tx loop
out USBDDR, x2 ;1 [-7] <- acquire bus
; need not init x2 (bitstuff history) because sync starts with 0
push x4 ;2 [-5]
ldi x4, USBMASK ;1 [-4] exor mask
ldi shift, 0x80 ;1 [-3] sync byte is first byte sent
txLoop: ; [62]
sbrs shift, 0 ;1 [-2] [62]
eor x1, x4 ;1 [-1] [63]
out USBOUT, x1 ;1 [0] <-- out bit 0
ror shift ;1 [1]
ror x2 ;1 [2]
didStuff0:
cpi x2, 0xfc ;1 [3]
brsh bitstuff0 ;1 [4]
sbrs shift, 0 ;1 [5]
eor x1, x4 ;1 [6]
ror shift ;1 [7]
didStuff1:
out USBOUT, x1 ;1 [8] <-- out bit 1
ror x2 ;1 [9]
cpi x2, 0xfc ;1 [10]
brsh bitstuff1 ;1 [11]
sbrs shift, 0 ;1 [12]
eor x1, x4 ;1 [13]
ror shift ;1 [14]
didStuff2:
ror x2 ;1 [15]
out USBOUT, x1 ;1 [16] <-- out bit 2
cpi x2, 0xfc ;1 [17]
brsh bitstuff2 ;1 [18]
sbrs shift, 0 ;1 [19]
eor x1, x4 ;1 [20]
ror shift ;1 [21]
didStuff3:
ror x2 ;1 [22]
cpi x2, 0xfc ;1 [23]
out USBOUT, x1 ;1 [24] <-- out bit 3
brsh bitstuff3 ;1 [25]
nop2 ;2 [27]
ld x3, y+ ;2 [29]
sbrs shift, 0 ;1 [30]
eor x1, x4 ;1 [31]
out USBOUT, x1 ;1 [32] <-- out bit 4
ror shift ;1 [33]
ror x2 ;1 [34]
didStuff4:
cpi x2, 0xfc ;1 [35]
brsh bitstuff4 ;1 [36]
sbrs shift, 0 ;1 [37]
eor x1, x4 ;1 [38]
ror shift ;1 [39]
didStuff5:
out USBOUT, x1 ;1 [40] <-- out bit 5
ror x2 ;1 [41]
cpi x2, 0xfc ;1 [42]
brsh bitstuff5 ;1 [43]
sbrs shift, 0 ;1 [44]
eor x1, x4 ;1 [45]
ror shift ;1 [46]
didStuff6:
ror x2 ;1 [47]
out USBOUT, x1 ;1 [48] <-- out bit 6
cpi x2, 0xfc ;1 [49]
brsh bitstuff6 ;1 [50]
sbrs shift, 0 ;1 [51]
eor x1, x4 ;1 [52]
ror shift ;1 [53]
didStuff7:
ror x2 ;1 [54]
cpi x2, 0xfc ;1 [55]
out USBOUT, x1 ;1 [56] <-- out bit 7
brsh bitstuff7 ;1 [57]
mov shift, x3 ;1 [58]
dec cnt ;1 [59]
brne txLoop ;1/2 [60/61]
;make SE0:
cbr x1, USBMASK ;1 [61] prepare SE0 [spec says EOP may be 15 to 18 cycles]
pop x4 ;2 [63]
;brackets are cycles from start of SE0 now
out USBOUT, x1 ;1 [0] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
;set address only after data packet was sent, not after handshake
lds x2, usbNewDeviceAddr;2 [2]
lsl x2; ;1 [3] we compare with left shifted address
subi YL, 20 + 2 ;1 [4] Only assign address on data packets, not ACK/NAK in x3
sbci YH, 0 ;1 [5]
breq skipAddrAssign ;2 [7]
sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
skipAddrAssign:
;end of usbDeviceAddress transfer
ldi x2, 1<<USB_INTR_PENDING_BIT;1 [8] int0 occurred during TX -- clear pending flag
USB_STORE_PENDING(x2) ;1 [9]
ori x1, USBIDLE ;1 [10]
in x2, USBDDR ;1 [11]
cbr x2, USBMASK ;1 [12] set both pins to input
mov x3, x1 ;1 [13]
cbr x3, USBMASK ;1 [14] configure no pullup on both pins
out USBOUT, x1 ;1 [15] <-- out J (idle) -- end of SE0 (EOP signal)
out USBDDR, x2 ;1 [16] <-- release bus now
out USBOUT, x3 ;1 [17] <-- ensure no pull-up resistors are active
rjmp doReturn
bitstuff5: ;1 (for branch taken)
eor x1, x4 ;1
rjmp didStuff5 ;2 same trick as in bitstuff1...
bitstuff6: ;1 (for branch taken)
eor x1, x4 ;1
rjmp didStuff6 ;2 same trick as above...
bitstuff7: ;1 (for branch taken)
eor x1, x4 ;1
rjmp didStuff7 ;2 same trick as above...

418
avr/bootloader/usbdrv/usbdrvasm15.inc
View File

@@ -1,418 +0,0 @@
/* Name: usbdrvasm15.inc
* Project: AVR USB driver
* Author: contributed by V. Bosch
* Creation Date: 2007-08-06
* Tabsize: 4
* Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* Revision: $Id: usbdrvasm15.inc 607 2008-05-13 15:57:28Z cs $
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file is the 15 MHz version of the asssembler part of the USB driver. It
requires a 15 MHz crystal (not a ceramic resonator and not a calibrated RC
oscillator).
See usbdrv.h for a description of the entire driver.
Since almost all of this code is timing critical, don't change unless you
really know what you are doing! Many parts require not only a maximum number
of CPU cycles, but even an exact number of cycles!
*/
;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
;nominal frequency: 15 MHz -> 10.0 cycles per bit, 80.0 cycles per byte
; Numbers in brackets are clocks counted from center of last sync bit
; when instruction starts
;----------------------------------------------------------------------------
; order of registers pushed:
; YL, SREG [sofError] YH, shift, x1, x2, x3, bitcnt, cnt, x4
;----------------------------------------------------------------------------
USB_INTR_VECTOR:
push YL ;2 push only what is necessary to sync with edge ASAP
in YL, SREG ;1
push YL ;2
;----------------------------------------------------------------------------
; Synchronize with sync pattern:
;
; sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
; sync up with J to K edge during sync pattern -- use fastest possible loops
; first part has no timeout because it waits for IDLE or SE1 (== disconnected)
;-------------------------------------------------------------------------------
waitForJ: ;-
sbis USBIN, USBMINUS ;1 <-- sample: wait for D- == 1
rjmp waitForJ ;2
;-------------------------------------------------------------------------------
; The following code results in a sampling window of < 1/4 bit
; which meets the spec.
;-------------------------------------------------------------------------------
waitForK: ;-
sbis USBIN, USBMINUS ;1 [00] <-- sample
rjmp foundK ;2 [01]
sbis USBIN, USBMINUS ; <-- sample
rjmp foundK
sbis USBIN, USBMINUS ; <-- sample
rjmp foundK
sbis USBIN, USBMINUS ; <-- sample
rjmp foundK
sbis USBIN, USBMINUS ; <-- sample
rjmp foundK
sbis USBIN, USBMINUS ; <-- sample
rjmp foundK
#if USB_COUNT_SOF
lds YL, usbSofCount
inc YL
sts usbSofCount, YL
#endif /* USB_COUNT_SOF */
rjmp sofError
;------------------------------------------------------------------------------
; {3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for
; center sampling]
; we have 1 bit time for setup purposes, then sample again.
; Numbers in brackets are cycles from center of first sync (double K)
; bit after the instruction
;------------------------------------------------------------------------------
foundK: ;- [02]
lds YL, usbInputBufOffset;2 [03+04] tx loop
push YH ;2 [05+06]
clr YH ;1 [07]
subi YL, lo8(-(usbRxBuf)) ;1 [08] [rx loop init]
sbci YH, hi8(-(usbRxBuf)) ;1 [09] [rx loop init]
push shift ;2 [10+11]
ser shift ;1 [12]
sbis USBIN, USBMINUS ;1 [-1] [13] <--sample:we want two bits K (sample 1 cycle too early)
rjmp haveTwoBitsK ;2 [00] [14]
pop shift ;2 [15+16] undo the push from before
pop YH ;2 [17+18] undo the push from before
rjmp waitForK ;2 [19+20] this was not the end of sync, retry
; The entire loop from waitForK until rjmp waitForK above must not exceed two
; bit times (= 20 cycles).
;----------------------------------------------------------------------------
; push more registers and initialize values while we sample the first bits:
;----------------------------------------------------------------------------
haveTwoBitsK: ;- [01]
push x1 ;2 [02+03]
push x2 ;2 [04+05]
push x3 ;2 [06+07]
push bitcnt ;2 [08+09]
in x1, USBIN ;1 [00] [10] <-- sample bit 0
bst x1, USBMINUS ;1 [01]
bld shift, 0 ;1 [02]
push cnt ;2 [03+04]
ldi cnt, USB_BUFSIZE ;1 [05]
push x4 ;2 [06+07] tx loop
rjmp rxLoop ;2 [08]
;----------------------------------------------------------------------------
; Receiver loop (numbers in brackets are cycles within byte after instr)
;----------------------------------------------------------------------------
unstuff0: ;- [07] (branch taken)
andi x3, ~0x01 ;1 [08]
mov x1, x2 ;1 [09] x2 contains last sampled (stuffed) bit
in x2, USBIN ;1 [00] [10] <-- sample bit 1 again
andi x2, USBMASK ;1 [01]
breq se0Hop ;1 [02] SE0 check for bit 1
ori shift, 0x01 ;1 [03] 0b00000001
nop ;1 [04]
rjmp didUnstuff0 ;2 [05]
;-----------------------------------------------------
unstuff1: ;- [05] (branch taken)
mov x2, x1 ;1 [06] x1 contains last sampled (stuffed) bit
andi x3, ~0x02 ;1 [07]
ori shift, 0x02 ;1 [08] 0b00000010
nop ;1 [09]
in x1, USBIN ;1 [00] [10] <-- sample bit 2 again
andi x1, USBMASK ;1 [01]
breq se0Hop ;1 [02] SE0 check for bit 2
rjmp didUnstuff1 ;2 [03]
;-----------------------------------------------------
unstuff2: ;- [05] (branch taken)
andi x3, ~0x04 ;1 [06]
ori shift, 0x04 ;1 [07] 0b00000100
mov x1, x2 ;1 [08] x2 contains last sampled (stuffed) bit
nop ;1 [09]
in x2, USBIN ;1 [00] [10] <-- sample bit 3
andi x2, USBMASK ;1 [01]
breq se0Hop ;1 [02] SE0 check for bit 3
rjmp didUnstuff2 ;2 [03]
;-----------------------------------------------------
unstuff3: ;- [00] [10] (branch taken)
in x2, USBIN ;1 [01] [11] <-- sample stuffed bit 3 one cycle too late
andi x2, USBMASK ;1 [02]
breq se0Hop ;1 [03] SE0 check for stuffed bit 3
andi x3, ~0x08 ;1 [04]
ori shift, 0x08 ;1 [05] 0b00001000
rjmp didUnstuff3 ;2 [06]
;----------------------------------------------------------------------------
; extra jobs done during bit interval:
;
; bit 0: store, clear [SE0 is unreliable here due to bit dribbling in hubs],
; overflow check, jump to the head of rxLoop
; bit 1: SE0 check
; bit 2: SE0 check, recovery from delay [bit 0 tasks took too long]
; bit 3: SE0 check, recovery from delay [bit 0 tasks took too long]
; bit 4: SE0 check, none
; bit 5: SE0 check, none
; bit 6: SE0 check, none
; bit 7: SE0 check, reconstruct: x3 is 0 at bit locations we changed, 1 at others
;----------------------------------------------------------------------------
rxLoop: ;- [09]
in x2, USBIN ;1 [00] [10] <-- sample bit 1 (or possibly bit 0 stuffed)
andi x2, USBMASK ;1 [01]
brne SkipSe0Hop ;1 [02]
se0Hop: ;- [02]
rjmp se0 ;2 [03] SE0 check for bit 1
SkipSe0Hop: ;- [03]
ser x3 ;1 [04]
andi shift, 0xf9 ;1 [05] 0b11111001
breq unstuff0 ;1 [06]
didUnstuff0: ;- [06]
eor x1, x2 ;1 [07]
bst x1, USBMINUS ;1 [08]
bld shift, 1 ;1 [09]
in x1, USBIN ;1 [00] [10] <-- sample bit 2 (or possibly bit 1 stuffed)
andi x1, USBMASK ;1 [01]
breq se0Hop ;1 [02] SE0 check for bit 2
andi shift, 0xf3 ;1 [03] 0b11110011
breq unstuff1 ;1 [04] do remaining work for bit 1
didUnstuff1: ;- [04]
eor x2, x1 ;1 [05]
bst x2, USBMINUS ;1 [06]
bld shift, 2 ;1 [07]
nop2 ;2 [08+09]
in x2, USBIN ;1 [00] [10] <-- sample bit 3 (or possibly bit 2 stuffed)
andi x2, USBMASK ;1 [01]
breq se0Hop ;1 [02] SE0 check for bit 3
andi shift, 0xe7 ;1 [03] 0b11100111
breq unstuff2 ;1 [04]
didUnstuff2: ;- [04]
eor x1, x2 ;1 [05]
bst x1, USBMINUS ;1 [06]
bld shift, 3 ;1 [07]
didUnstuff3: ;- [07]
andi shift, 0xcf ;1 [08] 0b11001111
breq unstuff3 ;1 [09]
in x1, USBIN ;1 [00] [10] <-- sample bit 4
andi x1, USBMASK ;1 [01]
breq se0Hop ;1 [02] SE0 check for bit 4
eor x2, x1 ;1 [03]
bst x2, USBMINUS ;1 [04]
bld shift, 4 ;1 [05]
didUnstuff4: ;- [05]
andi shift, 0x9f ;1 [06] 0b10011111
breq unstuff4 ;1 [07]
nop2 ;2 [08+09]
in x2, USBIN ;1 [00] [10] <-- sample bit 5
andi x2, USBMASK ;1 [01]
breq se0 ;1 [02] SE0 check for bit 5
eor x1, x2 ;1 [03]
bst x1, USBMINUS ;1 [04]
bld shift, 5 ;1 [05]
didUnstuff5: ;- [05]
andi shift, 0x3f ;1 [06] 0b00111111
breq unstuff5 ;1 [07]
nop2 ;2 [08+09]
in x1, USBIN ;1 [00] [10] <-- sample bit 6
andi x1, USBMASK ;1 [01]
breq se0 ;1 [02] SE0 check for bit 6
eor x2, x1 ;1 [03]
bst x2, USBMINUS ;1 [04]
bld shift, 6 ;1 [05]
didUnstuff6: ;- [05]
cpi shift, 0x02 ;1 [06] 0b00000010
brlo unstuff6 ;1 [07]
nop2 ;2 [08+09]
in x2, USBIN ;1 [00] [10] <-- sample bit 7
andi x2, USBMASK ;1 [01]
breq se0 ;1 [02] SE0 check for bit 7
eor x1, x2 ;1 [03]
bst x1, USBMINUS ;1 [04]
bld shift, 7 ;1 [05]
didUnstuff7: ;- [05]
cpi shift, 0x04 ;1 [06] 0b00000100
brlo unstuff7 ;1 [07]
eor x3, shift ;1 [08] reconstruct: x3 is 0 at bit locations we changed, 1 at others
nop ;1 [09]
in x1, USBIN ;1 [00] [10] <-- sample bit 0
st y+, x3 ;2 [01+02] store data
eor x2, x1 ;1 [03]
bst x2, USBMINUS ;1 [04]
bld shift, 0 ;1 [05]
subi cnt, 1 ;1 [06]
brcs overflow ;1 [07]
rjmp rxLoop ;2 [08]
;-----------------------------------------------------
unstuff4: ;- [08]
andi x3, ~0x10 ;1 [09]
in x1, USBIN ;1 [00] [10] <-- sample stuffed bit 4
andi x1, USBMASK ;1 [01]
breq se0 ;1 [02] SE0 check for stuffed bit 4
ori shift, 0x10 ;1 [03]
rjmp didUnstuff4 ;2 [04]
;-----------------------------------------------------
unstuff5: ;- [08]
ori shift, 0x20 ;1 [09]
in x2, USBIN ;1 [00] [10] <-- sample stuffed bit 5
andi x2, USBMASK ;1 [01]
breq se0 ;1 [02] SE0 check for stuffed bit 5
andi x3, ~0x20 ;1 [03]
rjmp didUnstuff5 ;2 [04]
;-----------------------------------------------------
unstuff6: ;- [08]
andi x3, ~0x40 ;1 [09]
in x1, USBIN ;1 [00] [10] <-- sample stuffed bit 6
andi x1, USBMASK ;1 [01]
breq se0 ;1 [02] SE0 check for stuffed bit 6
ori shift, 0x40 ;1 [03]
rjmp didUnstuff6 ;2 [04]
;-----------------------------------------------------
unstuff7: ;- [08]
andi x3, ~0x80 ;1 [09]
in x2, USBIN ;1 [00] [10] <-- sample stuffed bit 7
andi x2, USBMASK ;1 [01]
breq se0 ;1 [02] SE0 check for stuffed bit 7
ori shift, 0x80 ;1 [03]
rjmp didUnstuff7 ;2 [04]
macro POP_STANDARD ; 16 cycles
pop x4
pop cnt
pop bitcnt
pop x3
pop x2
pop x1
pop shift
pop YH
endm
macro POP_RETI ; 5 cycles
pop YL
out SREG, YL
pop YL
endm
#include "asmcommon.inc"
;---------------------------------------------------------------------------
; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1)
; K = (D+ = 1), (D- = 0)
; Spec allows 7.5 bit times from EOP to SOP for replies
;---------------------------------------------------------------------------
bitstuffN: ;- [04]
eor x1, x4 ;1 [05]
clr x2 ;1 [06]
nop ;1 [07]
rjmp didStuffN ;1 [08]
;---------------------------------------------------------------------------
bitstuff6: ;- [04]
eor x1, x4 ;1 [05]
clr x2 ;1 [06]
rjmp didStuff6 ;1 [07]
;---------------------------------------------------------------------------
bitstuff7: ;- [02]
eor x1, x4 ;1 [03]
clr x2 ;1 [06]
nop ;1 [05]
rjmp didStuff7 ;1 [06]
;---------------------------------------------------------------------------
sendNakAndReti: ;- [-19]
ldi x3, USBPID_NAK ;1 [-18]
rjmp sendX3AndReti ;1 [-17]
;---------------------------------------------------------------------------
sendAckAndReti: ;- [-17]
ldi cnt, USBPID_ACK ;1 [-16]
sendCntAndReti: ;- [-16]
mov x3, cnt ;1 [-15]
sendX3AndReti: ;- [-15]
ldi YL, 20 ;1 [-14] x3==r20 address is 20
ldi YH, 0 ;1 [-13]
ldi cnt, 2 ;1 [-12]
; rjmp usbSendAndReti fallthrough
;---------------------------------------------------------------------------
;usbSend:
;pointer to data in 'Y'
;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
;uses: x1...x4, btcnt, shift, cnt, Y
;Numbers in brackets are time since first bit of sync pattern is sent
;We need not to match the transfer rate exactly because the spec demands
;only 1.5% precision anyway.
usbSendAndReti: ;- [-13] 13 cycles until SOP
in x2, USBDDR ;1 [-12]
ori x2, USBMASK ;1 [-11]
sbi USBOUT, USBMINUS ;2 [-09-10] prepare idle state; D+ and D- must have been 0 (no pullups)
in x1, USBOUT ;1 [-08] port mirror for tx loop
out USBDDR, x2 ;1 [-07] <- acquire bus
; need not init x2 (bitstuff history) because sync starts with 0
ldi x4, USBMASK ;1 [-06] exor mask
ldi shift, 0x80 ;1 [-05] sync byte is first byte sent
ldi bitcnt, 6 ;1 [-04]
txBitLoop: ;- [-04] [06]
sbrs shift, 0 ;1 [-03] [07]
eor x1, x4 ;1 [-02] [08]
ror shift ;1 [-01] [09]
didStuffN: ;- [09]
out USBOUT, x1 ;1 [00] [10] <-- out N
ror x2 ;1 [01]
cpi x2, 0xfc ;1 [02]
brcc bitstuffN ;1 [03]
dec bitcnt ;1 [04]
brne txBitLoop ;1 [05]
sbrs shift, 0 ;1 [06]
eor x1, x4 ;1 [07]
ror shift ;1 [08]
didStuff6: ;- [08]
nop ;1 [09]
out USBOUT, x1 ;1 [00] [10] <-- out 6
ror x2 ;1 [01]
cpi x2, 0xfc ;1 [02]
brcc bitstuff6 ;1 [03]
sbrs shift, 0 ;1 [04]
eor x1, x4 ;1 [05]
ror shift ;1 [06]
ror x2 ;1 [07]
didStuff7: ;- [07]
ldi bitcnt, 6 ;1 [08]
cpi x2, 0xfc ;1 [09]
out USBOUT, x1 ;1 [00] [10] <-- out 7
brcc bitstuff7 ;1 [01]
ld shift, y+ ;2 [02+03]
dec cnt ;1 [04]
brne txBitLoop ;1 [05]
makeSE0:
cbr x1, USBMASK ;1 [06] prepare SE0 [spec says EOP may be 19 to 23 cycles]
lds x2, usbNewDeviceAddr;2 [07+08]
lsl x2 ;1 [09] we compare with left shifted address
;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
;set address only after data packet was sent, not after handshake
out USBOUT, x1 ;1 [00] [10] <-- out SE0-- from now 2 bits==20 cycl. until bus idle
subi YL, 20 + 2 ;1 [01] Only assign address on data packets, not ACK/NAK in x3
sbci YH, 0 ;1 [02]
breq skipAddrAssign ;1 [03]
sts usbDeviceAddr, x2 ;2 [04+05] if not skipped: SE0 is one cycle longer
;----------------------------------------------------------------------------
;end of usbDeviceAddress transfer
skipAddrAssign: ;- [03/04]
ldi x2, 1<<USB_INTR_PENDING_BIT ;1 [05] int0 occurred during TX -- clear pending flag
USB_STORE_PENDING(x2) ;1 [06]
ori x1, USBIDLE ;1 [07]
in x2, USBDDR ;1 [08]
cbr x2, USBMASK ;1 [09] set both pins to input
mov x3, x1 ;1 [10]
cbr x3, USBMASK ;1 [11] configure no pullup on both pins
ldi x4, 3 ;1 [12]
se0Delay: ;- [12] [15]
dec x4 ;1 [13] [16]
brne se0Delay ;1 [14] [17]
nop2 ;2 [18+19]
out USBOUT, x1 ;1 [20] <--out J (idle) -- end of SE0 (EOP sig.)
out USBDDR, x2 ;1 [21] <--release bus now
out USBOUT, x3 ;1 [22] <--ensure no pull-up resistors are active
rjmp doReturn ;1 [23]
;---------------------------------------------------------------------------

337
avr/bootloader/usbdrv/usbdrvasm16.inc
View File

@@ -1,337 +0,0 @@
/* Name: usbdrvasm16.inc
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2007-06-15
* Tabsize: 4
* Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* Revision: $Id: usbdrvasm16.inc 607 2008-05-13 15:57:28Z cs $
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file is the 16 MHz version of the asssembler part of the USB driver. It
requires a 16 MHz crystal (not a ceramic resonator and not a calibrated RC
oscillator).
See usbdrv.h for a description of the entire driver.
Since almost all of this code is timing critical, don't change unless you
really know what you are doing! Many parts require not only a maximum number
of CPU cycles, but even an exact number of cycles!
*/
;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
;nominal frequency: 16 MHz -> 10.6666666 cycles per bit, 85.333333333 cycles per byte
; Numbers in brackets are clocks counted from center of last sync bit
; when instruction starts
USB_INTR_VECTOR:
;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
push YL ;[-25] push only what is necessary to sync with edge ASAP
in YL, SREG ;[-23]
push YL ;[-22]
push YH ;[-20]
;----------------------------------------------------------------------------
; Synchronize with sync pattern:
;----------------------------------------------------------------------------
;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
;sync up with J to K edge during sync pattern -- use fastest possible loops
;first part has no timeout because it waits for IDLE or SE1 (== disconnected)
waitForJ:
sbis USBIN, USBMINUS ;[-18] wait for D- == 1
rjmp waitForJ
waitForK:
;The following code results in a sampling window of < 1/4 bit which meets the spec.
sbis USBIN, USBMINUS ;[-15]
rjmp foundK ;[-14]
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
#if USB_COUNT_SOF
lds YL, usbSofCount
inc YL
sts usbSofCount, YL
#endif /* USB_COUNT_SOF */
rjmp sofError
foundK: ;[-12]
;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
;are cycles from center of first sync (double K) bit after the instruction
push bitcnt ;[-12]
; [---] ;[-11]
lds YL, usbInputBufOffset;[-10]
; [---] ;[-9]
clr YH ;[-8]
subi YL, lo8(-(usbRxBuf));[-7] [rx loop init]
sbci YH, hi8(-(usbRxBuf));[-6] [rx loop init]
push shift ;[-5]
; [---] ;[-4]
ldi bitcnt, 0x55 ;[-3] [rx loop init]
sbis USBIN, USBMINUS ;[-2] we want two bits K (sample 2 cycles too early)
rjmp haveTwoBitsK ;[-1]
pop shift ;[0] undo the push from before
pop bitcnt ;[2] undo the push from before
rjmp waitForK ;[4] this was not the end of sync, retry
; The entire loop from waitForK until rjmp waitForK above must not exceed two
; bit times (= 21 cycles).
;----------------------------------------------------------------------------
; push more registers and initialize values while we sample the first bits:
;----------------------------------------------------------------------------
haveTwoBitsK:
push x1 ;[1]
push x2 ;[3]
push x3 ;[5]
ldi shift, 0 ;[7]
ldi x3, 1<<4 ;[8] [rx loop init] first sample is inverse bit, compensate that
push x4 ;[9] == leap
in x1, USBIN ;[11] <-- sample bit 0
andi x1, USBMASK ;[12]
bst x1, USBMINUS ;[13]
bld shift, 7 ;[14]
push cnt ;[15]
ldi leap, 0 ;[17] [rx loop init]
ldi cnt, USB_BUFSIZE;[18] [rx loop init]
rjmp rxbit1 ;[19] arrives at [21]
;----------------------------------------------------------------------------
; Receiver loop (numbers in brackets are cycles within byte after instr)
;----------------------------------------------------------------------------
unstuff6:
andi x2, USBMASK ;[03]
ori x3, 1<<6 ;[04] will not be shifted any more
andi shift, ~0x80;[05]
mov x1, x2 ;[06] sampled bit 7 is actually re-sampled bit 6
subi leap, 3 ;[07] since this is a short (10 cycle) bit, enforce leap bit
rjmp didUnstuff6 ;[08]
unstuff7:
ori x3, 1<<7 ;[09] will not be shifted any more
in x2, USBIN ;[00] [10] re-sample bit 7
andi x2, USBMASK ;[01]
andi shift, ~0x80;[02]
subi leap, 3 ;[03] since this is a short (10 cycle) bit, enforce leap bit
rjmp didUnstuff7 ;[04]
unstuffEven:
ori x3, 1<<6 ;[09] will be shifted right 6 times for bit 0
in x1, USBIN ;[00] [10]
andi shift, ~0x80;[01]
andi x1, USBMASK ;[02]
breq se0 ;[03]
subi leap, 3 ;[04] since this is a short (10 cycle) bit, enforce leap bit
nop ;[05]
rjmp didUnstuffE ;[06]
unstuffOdd:
ori x3, 1<<5 ;[09] will be shifted right 4 times for bit 1
in x2, USBIN ;[00] [10]
andi shift, ~0x80;[01]
andi x2, USBMASK ;[02]
breq se0 ;[03]
subi leap, 3 ;[04] since this is a short (10 cycle) bit, enforce leap bit
nop ;[05]
rjmp didUnstuffO ;[06]
rxByteLoop:
andi x1, USBMASK ;[03]
eor x2, x1 ;[04]
subi leap, 1 ;[05]
brpl skipLeap ;[06]
subi leap, -3 ;1 one leap cycle every 3rd byte -> 85 + 1/3 cycles per byte
nop ;1
skipLeap:
subi x2, 1 ;[08]
ror shift ;[09]
didUnstuff6:
cpi shift, 0xfc ;[10]
in x2, USBIN ;[00] [11] <-- sample bit 7
brcc unstuff6 ;[01]
andi x2, USBMASK ;[02]
eor x1, x2 ;[03]
subi x1, 1 ;[04]
ror shift ;[05]
didUnstuff7:
cpi shift, 0xfc ;[06]
brcc unstuff7 ;[07]
eor x3, shift ;[08] reconstruct: x3 is 1 at bit locations we changed, 0 at others
st y+, x3 ;[09] store data
rxBitLoop:
in x1, USBIN ;[00] [11] <-- sample bit 0/2/4
andi x1, USBMASK ;[01]
eor x2, x1 ;[02]
andi x3, 0x3f ;[03] topmost two bits reserved for 6 and 7
subi x2, 1 ;[04]
ror shift ;[05]
cpi shift, 0xfc ;[06]
brcc unstuffEven ;[07]
didUnstuffE:
lsr x3 ;[08]
lsr x3 ;[09]
rxbit1:
in x2, USBIN ;[00] [10] <-- sample bit 1/3/5
andi x2, USBMASK ;[01]
breq se0 ;[02]
eor x1, x2 ;[03]
subi x1, 1 ;[04]
ror shift ;[05]
cpi shift, 0xfc ;[06]
brcc unstuffOdd ;[07]
didUnstuffO:
subi bitcnt, 0xab;[08] == addi 0x55, 0x55 = 0x100/3
brcs rxBitLoop ;[09]
subi cnt, 1 ;[10]
in x1, USBIN ;[00] [11] <-- sample bit 6
brcc rxByteLoop ;[01]
rjmp overflow
macro POP_STANDARD ; 14 cycles
pop cnt
pop x4
pop x3
pop x2
pop x1
pop shift
pop bitcnt
endm
macro POP_RETI ; 7 cycles
pop YH
pop YL
out SREG, YL
pop YL
endm
#include "asmcommon.inc"
; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1)
; K = (D+ = 1), (D- = 0)
; Spec allows 7.5 bit times from EOP to SOP for replies
bitstuffN:
eor x1, x4 ;[5]
ldi x2, 0 ;[6]
nop2 ;[7]
nop ;[9]
out USBOUT, x1 ;[10] <-- out
rjmp didStuffN ;[0]
bitstuff6:
eor x1, x4 ;[5]
ldi x2, 0 ;[6] Carry is zero due to brcc
rol shift ;[7] compensate for ror shift at branch destination
rjmp didStuff6 ;[8]
bitstuff7:
ldi x2, 0 ;[2] Carry is zero due to brcc
rjmp didStuff7 ;[3]
sendNakAndReti:
ldi x3, USBPID_NAK ;[-18]
rjmp sendX3AndReti ;[-17]
sendAckAndReti:
ldi cnt, USBPID_ACK ;[-17]
sendCntAndReti:
mov x3, cnt ;[-16]
sendX3AndReti:
ldi YL, 20 ;[-15] x3==r20 address is 20
ldi YH, 0 ;[-14]
ldi cnt, 2 ;[-13]
; rjmp usbSendAndReti fallthrough
;usbSend:
;pointer to data in 'Y'
;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
;uses: x1...x4, btcnt, shift, cnt, Y
;Numbers in brackets are time since first bit of sync pattern is sent
;We don't match the transfer rate exactly (don't insert leap cycles every third
;byte) because the spec demands only 1.5% precision anyway.
usbSendAndReti: ; 12 cycles until SOP
in x2, USBDDR ;[-12]
ori x2, USBMASK ;[-11]
sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
in x1, USBOUT ;[-8] port mirror for tx loop
out USBDDR, x2 ;[-7] <- acquire bus
; need not init x2 (bitstuff history) because sync starts with 0
ldi x4, USBMASK ;[-6] exor mask
ldi shift, 0x80 ;[-5] sync byte is first byte sent
txByteLoop:
ldi bitcnt, 0x35 ;[-4] [6] binary 0011 0101
txBitLoop:
sbrs shift, 0 ;[-3] [7]
eor x1, x4 ;[-2] [8]
out USBOUT, x1 ;[-1] [9] <-- out N
ror shift ;[0] [10]
ror x2 ;[1]
didStuffN:
cpi x2, 0xfc ;[2]
brcc bitstuffN ;[3]
lsr bitcnt ;[4]
brcc txBitLoop ;[5]
brne txBitLoop ;[6]
sbrs shift, 0 ;[7]
eor x1, x4 ;[8]
didStuff6:
out USBOUT, x1 ;[-1] [9] <-- out 6
ror shift ;[0] [10]
ror x2 ;[1]
cpi x2, 0xfc ;[2]
brcc bitstuff6 ;[3]
ror shift ;[4]
didStuff7:
ror x2 ;[5]
sbrs x2, 7 ;[6]
eor x1, x4 ;[7]
nop ;[8]
cpi x2, 0xfc ;[9]
out USBOUT, x1 ;[-1][10] <-- out 7
brcc bitstuff7 ;[0] [11]
ld shift, y+ ;[1]
dec cnt ;[3]
brne txByteLoop ;[4]
;make SE0:
cbr x1, USBMASK ;[5] prepare SE0 [spec says EOP may be 21 to 25 cycles]
lds x2, usbNewDeviceAddr;[6]
lsl x2 ;[8] we compare with left shifted address
subi YL, 20 + 2 ;[9] Only assign address on data packets, not ACK/NAK in x3
sbci YH, 0 ;[10]
out USBOUT, x1 ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
;set address only after data packet was sent, not after handshake
breq skipAddrAssign ;[0]
sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
skipAddrAssign:
;end of usbDeviceAddress transfer
ldi x2, 1<<USB_INTR_PENDING_BIT;[2] int0 occurred during TX -- clear pending flag
USB_STORE_PENDING(x2) ;[3]
ori x1, USBIDLE ;[4]
in x2, USBDDR ;[5]
cbr x2, USBMASK ;[6] set both pins to input
mov x3, x1 ;[7]
cbr x3, USBMASK ;[8] configure no pullup on both pins
ldi x4, 4 ;[9]
se0Delay:
dec x4 ;[10] [13] [16] [19]
brne se0Delay ;[11] [14] [17] [20]
out USBOUT, x1 ;[21] <-- out J (idle) -- end of SE0 (EOP signal)
out USBDDR, x2 ;[22] <-- release bus now
out USBOUT, x3 ;[23] <-- ensure no pull-up resistors are active
rjmp doReturn

447
avr/bootloader/usbdrv/usbdrvasm165.inc
View File

@@ -1,447 +0,0 @@
/* Name: usbdrvasm165.inc
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2007-04-22
* Tabsize: 4
* Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* Revision: $Id: usbdrvasm165.inc 607 2008-05-13 15:57:28Z cs $
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file is the 16.5 MHz version of the USB driver. It is intended for the
ATTiny45 and similar controllers running on 16.5 MHz internal RC oscillator.
This version contains a phase locked loop in the receiver routine to cope with
slight clock rate deviations of up to +/- 1%.
See usbdrv.h for a description of the entire driver.
Since almost all of this code is timing critical, don't change unless you
really know what you are doing! Many parts require not only a maximum number
of CPU cycles, but even an exact number of cycles!
*/
;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
;max allowable interrupt latency: 59 cycles -> max 52 cycles interrupt disable
;max stack usage: [ret(2), r0, SREG, YL, YH, shift, x1, x2, x3, x4, cnt] = 12 bytes
;nominal frequency: 16.5 MHz -> 11 cycles per bit
; 16.3125 MHz < F_CPU < 16.6875 MHz (+/- 1.1%)
; Numbers in brackets are clocks counted from center of last sync bit
; when instruction starts
USB_INTR_VECTOR:
;order of registers pushed: YL, SREG [sofError], r0, YH, shift, x1, x2, x3, x4, cnt
push YL ;[-23] push only what is necessary to sync with edge ASAP
in YL, SREG ;[-21]
push YL ;[-20]
;----------------------------------------------------------------------------
; Synchronize with sync pattern:
;----------------------------------------------------------------------------
;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
;sync up with J to K edge during sync pattern -- use fastest possible loops
;first part has no timeout because it waits for IDLE or SE1 (== disconnected)
waitForJ:
sbis USBIN, USBMINUS ;[-18] wait for D- == 1
rjmp waitForJ
waitForK:
;The following code results in a sampling window of < 1/4 bit which meets the spec.
sbis USBIN, USBMINUS ;[-15]
rjmp foundK ;[-14]
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
#if USB_COUNT_SOF
lds YL, usbSofCount
inc YL
sts usbSofCount, YL
#endif /* USB_COUNT_SOF */
rjmp sofError
foundK: ;[-12]
;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
;are cycles from center of first sync (double K) bit after the instruction
push r0 ;[-12]
; [---] ;[-11]
push YH ;[-10]
; [---] ;[-9]
lds YL, usbInputBufOffset;[-8]
; [---] ;[-7]
clr YH ;[-6]
subi YL, lo8(-(usbRxBuf));[-5] [rx loop init]
sbci YH, hi8(-(usbRxBuf));[-4] [rx loop init]
mov r0, x2 ;[-3] [rx loop init]
sbis USBIN, USBMINUS ;[-2] we want two bits K (sample 2 cycles too early)
rjmp haveTwoBitsK ;[-1]
pop YH ;[0] undo the pushes from before
pop r0 ;[2]
rjmp waitForK ;[4] this was not the end of sync, retry
; The entire loop from waitForK until rjmp waitForK above must not exceed two
; bit times (= 22 cycles).
;----------------------------------------------------------------------------
; push more registers and initialize values while we sample the first bits:
;----------------------------------------------------------------------------
haveTwoBitsK: ;[1]
push shift ;[1]
push x1 ;[3]
push x2 ;[5]
push x3 ;[7]
ldi shift, 0xff ;[9] [rx loop init]
ori x3, 0xff ;[10] [rx loop init] == ser x3, clear zero flag
in x1, USBIN ;[11] <-- sample bit 0
bst x1, USBMINUS ;[12]
bld shift, 0 ;[13]
push x4 ;[14] == phase
; [---] ;[15]
push cnt ;[16]
; [---] ;[17]
ldi phase, 0 ;[18] [rx loop init]
ldi cnt, USB_BUFSIZE;[19] [rx loop init]
rjmp rxbit1 ;[20]
; [---] ;[21]
;----------------------------------------------------------------------------
; Receiver loop (numbers in brackets are cycles within byte after instr)
;----------------------------------------------------------------------------
/*
byte oriented operations done during loop:
bit 0: store data
bit 1: SE0 check
bit 2: overflow check
bit 3: catch up
bit 4: rjmp to achieve conditional jump range
bit 5: PLL
bit 6: catch up
bit 7: jump, fixup bitstuff
; 87 [+ 2] cycles
------------------------------------------------------------------
*/
continueWithBit5:
in x2, USBIN ;[055] <-- bit 5
eor r0, x2 ;[056]
or phase, r0 ;[057]
sbrc phase, USBMINUS ;[058]
lpm ;[059] optional nop3; modifies r0
in phase, USBIN ;[060] <-- phase
eor x1, x2 ;[061]
bst x1, USBMINUS ;[062]
bld shift, 5 ;[063]
andi shift, 0x3f ;[064]
in x1, USBIN ;[065] <-- bit 6
breq unstuff5 ;[066] *** unstuff escape
eor phase, x1 ;[067]
eor x2, x1 ;[068]
bst x2, USBMINUS ;[069]
bld shift, 6 ;[070]
didUnstuff6: ;[ ]
in r0, USBIN ;[071] <-- phase
cpi shift, 0x02 ;[072]
brlo unstuff6 ;[073] *** unstuff escape
didUnstuff5: ;[ ]
nop2 ;[074]
; [---] ;[075]
in x2, USBIN ;[076] <-- bit 7
eor x1, x2 ;[077]
bst x1, USBMINUS ;[078]
bld shift, 7 ;[079]
didUnstuff7: ;[ ]
eor r0, x2 ;[080]
or phase, r0 ;[081]
in r0, USBIN ;[082] <-- phase
cpi shift, 0x04 ;[083]
brsh rxLoop ;[084]
; [---] ;[085]
unstuff7: ;[ ]
andi x3, ~0x80 ;[085]
ori shift, 0x80 ;[086]
in x2, USBIN ;[087] <-- sample stuffed bit 7
nop ;[088]
rjmp didUnstuff7 ;[089]
; [---] ;[090]
;[080]
unstuff5: ;[067]
eor phase, x1 ;[068]
andi x3, ~0x20 ;[069]
ori shift, 0x20 ;[070]
in r0, USBIN ;[071] <-- phase
mov x2, x1 ;[072]
nop ;[073]
nop2 ;[074]
; [---] ;[075]
in x1, USBIN ;[076] <-- bit 6
eor r0, x1 ;[077]
or phase, r0 ;[078]
eor x2, x1 ;[079]
bst x2, USBMINUS ;[080]
bld shift, 6 ;[081] no need to check bitstuffing, we just had one
in r0, USBIN ;[082] <-- phase
rjmp didUnstuff5 ;[083]
; [---] ;[084]
;[074]
unstuff6: ;[074]
andi x3, ~0x40 ;[075]
in x1, USBIN ;[076] <-- bit 6 again
ori shift, 0x40 ;[077]
nop2 ;[078]
; [---] ;[079]
rjmp didUnstuff6 ;[080]
; [---] ;[081]
;[071]
unstuff0: ;[013]
eor r0, x2 ;[014]
or phase, r0 ;[015]
andi x2, USBMASK ;[016] check for SE0
in r0, USBIN ;[017] <-- phase
breq didUnstuff0 ;[018] direct jump to se0 would be too long
andi x3, ~0x01 ;[019]
ori shift, 0x01 ;[020]
mov x1, x2 ;[021] mov existing sample
in x2, USBIN ;[022] <-- bit 1 again
rjmp didUnstuff0 ;[023]
; [---] ;[024]
;[014]
unstuff1: ;[024]
eor r0, x1 ;[025]
or phase, r0 ;[026]
andi x3, ~0x02 ;[027]
in r0, USBIN ;[028] <-- phase
ori shift, 0x02 ;[029]
mov x2, x1 ;[030]
rjmp didUnstuff1 ;[031]
; [---] ;[032]
;[022]
unstuff2: ;[035]
eor r0, x2 ;[036]
or phase, r0 ;[037]
andi x3, ~0x04 ;[038]
in r0, USBIN ;[039] <-- phase
ori shift, 0x04 ;[040]
mov x1, x2 ;[041]
rjmp didUnstuff2 ;[042]
; [---] ;[043]
;[033]
unstuff3: ;[043]
in x2, USBIN ;[044] <-- bit 3 again
eor r0, x2 ;[045]
or phase, r0 ;[046]
andi x3, ~0x08 ;[047]
ori shift, 0x08 ;[048]
nop ;[049]
in r0, USBIN ;[050] <-- phase
rjmp didUnstuff3 ;[051]
; [---] ;[052]
;[042]
unstuff4: ;[053]
andi x3, ~0x10 ;[054]
in x1, USBIN ;[055] <-- bit 4 again
ori shift, 0x10 ;[056]
rjmp didUnstuff4 ;[057]
; [---] ;[058]
;[048]
rxLoop: ;[085]
eor x3, shift ;[086] reconstruct: x3 is 0 at bit locations we changed, 1 at others
in x1, USBIN ;[000] <-- bit 0
st y+, x3 ;[001]
; [---] ;[002]
eor r0, x1 ;[003]
or phase, r0 ;[004]
eor x2, x1 ;[005]
in r0, USBIN ;[006] <-- phase
ser x3 ;[007]
bst x2, USBMINUS ;[008]
bld shift, 0 ;[009]
andi shift, 0xf9 ;[010]
rxbit1: ;[ ]
in x2, USBIN ;[011] <-- bit 1
breq unstuff0 ;[012] *** unstuff escape
andi x2, USBMASK ;[013] SE0 check for bit 1
didUnstuff0: ;[ ] Z only set if we detected SE0 in bitstuff
breq se0 ;[014]
eor r0, x2 ;[015]
or phase, r0 ;[016]
in r0, USBIN ;[017] <-- phase
eor x1, x2 ;[018]
bst x1, USBMINUS ;[019]
bld shift, 1 ;[020]
andi shift, 0xf3 ;[021]
didUnstuff1: ;[ ]
in x1, USBIN ;[022] <-- bit 2
breq unstuff1 ;[023] *** unstuff escape
eor r0, x1 ;[024]
or phase, r0 ;[025]
subi cnt, 1 ;[026] overflow check
brcs overflow ;[027]
in r0, USBIN ;[028] <-- phase
eor x2, x1 ;[029]
bst x2, USBMINUS ;[030]
bld shift, 2 ;[031]
andi shift, 0xe7 ;[032]
didUnstuff2: ;[ ]
in x2, USBIN ;[033] <-- bit 3
breq unstuff2 ;[034] *** unstuff escape
eor r0, x2 ;[035]
or phase, r0 ;[036]
eor x1, x2 ;[037]
bst x1, USBMINUS ;[038]
in r0, USBIN ;[039] <-- phase
bld shift, 3 ;[040]
andi shift, 0xcf ;[041]
didUnstuff3: ;[ ]
breq unstuff3 ;[042] *** unstuff escape
nop ;[043]
in x1, USBIN ;[044] <-- bit 4
eor x2, x1 ;[045]
bst x2, USBMINUS ;[046]
bld shift, 4 ;[047]
didUnstuff4: ;[ ]
eor r0, x1 ;[048]
or phase, r0 ;[049]
in r0, USBIN ;[050] <-- phase
andi shift, 0x9f ;[051]
breq unstuff4 ;[052] *** unstuff escape
rjmp continueWithBit5;[053]
; [---] ;[054]
macro POP_STANDARD ; 16 cycles
pop cnt
pop x4
pop x3
pop x2
pop x1
pop shift
pop YH
pop r0
endm
macro POP_RETI ; 5 cycles
pop YL
out SREG, YL
pop YL
endm
#include "asmcommon.inc"
; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1)
; K = (D+ = 1), (D- = 0)
; Spec allows 7.5 bit times from EOP to SOP for replies
bitstuff7:
eor x1, x4 ;[4]
ldi x2, 0 ;[5]
nop2 ;[6] C is zero (brcc)
rjmp didStuff7 ;[8]
bitstuffN:
eor x1, x4 ;[5]
ldi x2, 0 ;[6]
lpm ;[7] 3 cycle NOP, modifies r0
out USBOUT, x1 ;[10] <-- out
rjmp didStuffN ;[0]
#define bitStatus x3
sendNakAndReti:
ldi cnt, USBPID_NAK ;[-19]
rjmp sendCntAndReti ;[-18]
sendAckAndReti:
ldi cnt, USBPID_ACK ;[-17]
sendCntAndReti:
mov r0, cnt ;[-16]
ldi YL, 0 ;[-15] R0 address is 0
ldi YH, 0 ;[-14]
ldi cnt, 2 ;[-13]
; rjmp usbSendAndReti fallthrough
;usbSend:
;pointer to data in 'Y'
;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
;uses: x1...x4, shift, cnt, Y
;Numbers in brackets are time since first bit of sync pattern is sent
usbSendAndReti: ; 12 cycles until SOP
in x2, USBDDR ;[-12]
ori x2, USBMASK ;[-11]
sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
in x1, USBOUT ;[-8] port mirror for tx loop
out USBDDR, x2 ;[-7] <- acquire bus
; need not init x2 (bitstuff history) because sync starts with 0
ldi x4, USBMASK ;[-6] exor mask
ldi shift, 0x80 ;[-5] sync byte is first byte sent
ldi bitStatus, 0xff ;[-4] init bit loop counter, works for up to 12 bytes
byteloop:
bitloop:
sbrs shift, 0 ;[8] [-3]
eor x1, x4 ;[9] [-2]
out USBOUT, x1 ;[10] [-1] <-- out
ror shift ;[0]
ror x2 ;[1]
didStuffN:
cpi x2, 0xfc ;[2]
brcc bitstuffN ;[3]
nop ;[4]
subi bitStatus, 37 ;[5] 256 / 7 ~=~ 37
brcc bitloop ;[6] when we leave the loop, bitStatus has almost the initial value
sbrs shift, 0 ;[7]
eor x1, x4 ;[8]
ror shift ;[9]
didStuff7:
out USBOUT, x1 ;[10] <-- out
ror x2 ;[0]
cpi x2, 0xfc ;[1]
brcc bitstuff7 ;[2]
ld shift, y+ ;[3]
dec cnt ;[5]
brne byteloop ;[6]
;make SE0:
cbr x1, USBMASK ;[7] prepare SE0 [spec says EOP may be 21 to 25 cycles]
lds x2, usbNewDeviceAddr;[8]
lsl x2 ;[10] we compare with left shifted address
out USBOUT, x1 ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
;set address only after data packet was sent, not after handshake
subi YL, 2 ;[0] Only assign address on data packets, not ACK/NAK in r0
sbci YH, 0 ;[1]
breq skipAddrAssign ;[2]
sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
skipAddrAssign:
;end of usbDeviceAddress transfer
ldi x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
USB_STORE_PENDING(x2) ;[5]
ori x1, USBIDLE ;[6]
in x2, USBDDR ;[7]
cbr x2, USBMASK ;[8] set both pins to input
mov x3, x1 ;[9]
cbr x3, USBMASK ;[10] configure no pullup on both pins
ldi x4, 4 ;[11]
se0Delay:
dec x4 ;[12] [15] [18] [21]
brne se0Delay ;[13] [16] [19] [22]
out USBOUT, x1 ;[23] <-- out J (idle) -- end of SE0 (EOP signal)
out USBDDR, x2 ;[24] <-- release bus now
out USBOUT, x3 ;[25] <-- ensure no pull-up resistors are active
rjmp doReturn

354
avr/bootloader/usbdrv/usbdrvasm20.inc
View File

@@ -1,354 +0,0 @@
/* Name: usbdrvasm20.inc
* Project: AVR USB driver
* Author: Jeroen Benschop
* Based on usbdrvasm16.inc from Christian Starkjohann
* Creation Date: 2008-03-05
* Tabsize: 4
* Copyright: (c) 2008 by Jeroen Benschop and OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
* Revision: $Id: usbdrvasm20.inc 607 2008-05-13 15:57:28Z cs $
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file is the 20 MHz version of the asssembler part of the USB driver. It
requires a 20 MHz crystal (not a ceramic resonator and not a calibrated RC
oscillator).
See usbdrv.h for a description of the entire driver.
Since almost all of this code is timing critical, don't change unless you
really know what you are doing! Many parts require not only a maximum number
of CPU cycles, but even an exact number of cycles!
*/
#define leap2 x3
#ifdef __IAR_SYSTEMS_ASM__
#define nextInst $+2
#else
#define nextInst .+0
#endif
;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
;nominal frequency: 20 MHz -> 13.333333 cycles per bit, 106.666667 cycles per byte
; Numbers in brackets are clocks counted from center of last sync bit
; when instruction starts
;register use in receive loop:
; shift assembles the byte currently being received
; x1 holds the D+ and D- line state
; x2 holds the previous line state
; x4 (leap) is used to add a leap cycle once every three bytes received
; X3 (leap2) is used to add a leap cycle once every three stuff bits received
; bitcnt is used to determine when a stuff bit is due
; cnt holds the number of bytes left in the receive buffer
USB_INTR_VECTOR:
;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
push YL ;[-28] push only what is necessary to sync with edge ASAP
in YL, SREG ;[-26]
push YL ;[-25]
push YH ;[-23]
;----------------------------------------------------------------------------
; Synchronize with sync pattern:
;----------------------------------------------------------------------------
;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
;sync up with J to K edge during sync pattern -- use fastest possible loops
;first part has no timeout because it waits for IDLE or SE1 (== disconnected)
waitForJ:
sbis USBIN, USBMINUS ;[-21] wait for D- == 1
rjmp waitForJ
waitForK:
;The following code results in a sampling window of < 1/4 bit which meets the spec.
sbis USBIN, USBMINUS ;[-19]
rjmp foundK ;[-18]
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
#if USB_COUNT_SOF
lds YL, usbSofCount
inc YL
sts usbSofCount, YL
#endif /* USB_COUNT_SOF */
rjmp sofError
foundK: ;[-16]
;{3, 5} after falling D- edge, average delay: 4 cycles
;bit0 should be at 34 for center sampling. Currently at 4 so 30 cylces till bit 0 sample
;use 1 bit time for setup purposes, then sample again. Numbers in brackets
;are cycles from center of first sync (double K) bit after the instruction
push bitcnt ;[-16]
; [---] ;[-15]
lds YL, usbInputBufOffset;[-14]
; [---] ;[-13]
clr YH ;[-12]
subi YL, lo8(-(usbRxBuf));[-11] [rx loop init]
sbci YH, hi8(-(usbRxBuf));[-10] [rx loop init]
push shift ;[-9]
; [---] ;[-8]
ldi shift,0x40 ;[-7] set msb to "1" so processing bit7 can be detected
nop2 ;[-6]
; [---] ;[-5]
ldi bitcnt, 5 ;[-4] [rx loop init]
sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early)
rjmp haveTwoBitsK ;[-2]
pop shift ;[-1] undo the push from before
pop bitcnt ;[1]
rjmp waitForK ;[3] this was not the end of sync, retry
; The entire loop from waitForK until rjmp waitForK above must not exceed two
; bit times (= 27 cycles).
;----------------------------------------------------------------------------
; push more registers and initialize values while we sample the first bits:
;----------------------------------------------------------------------------
haveTwoBitsK:
push x1 ;[0]
push x2 ;[2]
push x3 ;[4] (leap2)
ldi leap2, 0x55 ;[6] add leap cycle on 2nd,5th,8th,... stuff bit
push x4 ;[7] == leap
ldi leap, 0x55 ;[9] skip leap cycle on 2nd,5th,8th,... byte received
push cnt ;[10]
ldi cnt, USB_BUFSIZE ;[12] [rx loop init]
ldi x2, 1<<USBPLUS ;[13] current line state is K state. D+=="1", D-=="0"
bit0:
in x1, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] filter only D+ and D- bits
rjmp handleBit ;[2] make bit0 14 cycles long
;----------------------------------------------------------------------------
; Process bit7. However, bit 6 still may need unstuffing.
;----------------------------------------------------------------------------
b6checkUnstuff:
dec bitcnt ;[9]
breq unstuff6 ;[10]
bit7:
subi cnt, 1 ;[11] cannot use dec becaus it does not affect the carry flag
brcs overflow ;[12] Too many bytes received. Ignore packet
in x1, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] filter only D+ and D- bits
cpse x1, x2 ;[2] when previous line state equals current line state, handle "1"
rjmp b7handle0 ;[3] when line state differs, handle "0"
sec ;[4]
ror shift ;[5] shift "1" into the data
st y+, shift ;[6] store the data into the buffer
ldi shift, 0x40 ;[7] reset data for receiving the next byte
subi leap, 0x55 ;[9] trick to introduce a leap cycle every 3 bytes
brcc nextInst ;[10 or 11] it will fail after 85 bytes. However low speed can only receive 11
dec bitcnt ;[11 or 12]
brne bit0 ;[12 or 13]
ldi x1, 1 ;[13 or 14] unstuffing bit 7
in bitcnt, USBIN ;[0] sample stuff bit
rjmp unstuff ;[1]
b7handle0:
mov x2,x1 ;[5] Set x2 to current line state
ldi bitcnt, 6 ;[6]
lsr shift ;[7] shift "0" into the data
st y+, shift ;[8] store data into the buffer
ldi shift, 0x40 ;[10] reset data for receiving the next byte
subi leap, 0x55 ;[11] trick to introduce a leap cycle every 3 bytes
brcs bit0 ;[12] it will fail after 85 bytes. However low speed can only receive 11
rjmp bit0 ;[13]
;----------------------------------------------------------------------------
; Handle unstuff
; x1==0xFF indicate unstuffing bit6
;----------------------------------------------------------------------------
unstuff6:
ldi x1,0xFF ;[12] indicate unstuffing bit 6
in bitcnt, USBIN ;[0] sample stuff bit
nop ;[1] fix timing
unstuff: ;b0-5 b6 b7
mov x2,bitcnt ;[3] [2] [3] Set x2 to match line state
subi leap2, 0x55 ;[4] [3] [4] delay loop
brcs nextInst ;[5] [4] [5] add one cycle every three stuff bits
sbci leap2,0 ;[6] [5] [6]
ldi bitcnt,6 ;[7] [6] [7] reset bit stuff counter
andi x2, USBMASK ;[8] [7] [8] only keep D+ and D-
cpi x1,0 ;[9] [8] [9]
brmi bit7 ;[10] [9] [10] finished unstuffing bit6 When x1<0
breq bitloop ;[11] --- [11] finished unstuffing bit0-5 when x1=0
nop ;--- --- [12]
in x1, USBIN ;--- --- [0] sample line state for bit0
andi x1, USBMASK ;--- --- [1] filter only D+ and D- bits
rjmp handleBit ;--- --- [2] make bit0 14 cycles long
;----------------------------------------------------------------------------
; Receiver loop (numbers in brackets are cycles within byte after instr)
;----------------------------------------------------------------------------
bitloop:
in x1, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] filter only D+ and D- bits
breq se0 ;[2] both lines are low so handle se0
handleBit:
cpse x1, x2 ;[3] when previous line state equals current line state, handle "1"
rjmp handle0 ;[4] when line state differs, handle "0"
sec ;[5]
ror shift ;[6] shift "1" into the data
brcs b6checkUnstuff ;[7] When after shift C is set, next bit is bit7
nop2 ;[8]
dec bitcnt ;[10]
brne bitloop ;[11]
ldi x1,0 ;[12] indicate unstuff for bit other than bit6 or bit7
in bitcnt, USBIN ;[0] sample stuff bit
rjmp unstuff ;[1]
handle0:
mov x2, x1 ;[6] Set x2 to current line state
ldi bitcnt, 6 ;[7] reset unstuff counter.
lsr shift ;[8] shift "0" into the data
brcs bit7 ;[9] When after shift C is set, next bit is bit7
nop ;[10]
rjmp bitloop ;[11]
;----------------------------------------------------------------------------
; End of receive loop. Now start handling EOP
;----------------------------------------------------------------------------
macro POP_STANDARD ; 14 cycles
pop cnt
pop x4
pop x3
pop x2
pop x1
pop shift
pop bitcnt
endm
macro POP_RETI ; 7 cycles
pop YH
pop YL
out SREG, YL
pop YL
endm
#include "asmcommon.inc"
; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1)
; K = (D+ = 1), (D- = 0)
; Spec allows 7.5 bit times from EOP to SOP for replies
; 7.5 bit times is 100 cycles. This implementation arrives a bit later at se0
; then specified in the include file but there is plenty of time
bitstuffN:
eor x1, x4 ;[8]
ldi x2, 0 ;[9]
nop2 ;[10]
out USBOUT, x1 ;[12] <-- out
rjmp didStuffN ;[0]
bitstuff7:
eor x1, x4 ;[6]
ldi x2, 0 ;[7] Carry is zero due to brcc
rol shift ;[8] compensate for ror shift at branch destination
nop2 ;[9]
rjmp didStuff7 ;[11]
sendNakAndReti:
ldi x3, USBPID_NAK ;[-18]
rjmp sendX3AndReti ;[-17]
sendAckAndReti:
ldi cnt, USBPID_ACK ;[-17]
sendCntAndReti:
mov x3, cnt ;[-16]
sendX3AndReti:
ldi YL, 20 ;[-15] x3==r20 address is 20
ldi YH, 0 ;[-14]
ldi cnt, 2 ;[-13]
; rjmp usbSendAndReti fallthrough
;usbSend:
;pointer to data in 'Y'
;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
;uses: x1...x4, btcnt, shift, cnt, Y
;Numbers in brackets are time since first bit of sync pattern is sent
;We don't match the transfer rate exactly (don't insert leap cycles every third
;byte) because the spec demands only 1.5% precision anyway.
usbSendAndReti: ; 12 cycles until SOP
in x2, USBDDR ;[-12]
ori x2, USBMASK ;[-11]
sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
in x1, USBOUT ;[-8] port mirror for tx loop
out USBDDR, x2 ;[-7] <- acquire bus
; need not init x2 (bitstuff history) because sync starts with 0
ldi x4, USBMASK ;[-6] exor mask
ldi shift, 0x80 ;[-5] sync byte is first byte sent
txByteLoop:
ldi bitcnt, 0x49 ;[-4] [10] binary 01001001
txBitLoop:
sbrs shift, 0 ;[-3] [10] [11]
eor x1, x4 ;[-2] [11] [12]
out USBOUT, x1 ;[-1] [12] [13] <-- out N
ror shift ;[0] [13] [14]
ror x2 ;[1]
didStuffN:
nop2 ;[2]
nop ;[4]
cpi x2, 0xfc ;[5]
brcc bitstuffN ;[6]
lsr bitcnt ;[7]
brcc txBitLoop ;[8]
brne txBitLoop ;[9]
sbrs shift, 0 ;[10]
eor x1, x4 ;[11]
didStuff7:
out USBOUT, x1 ;[-1] [13] <-- out 7
ror shift ;[0] [14]
ror x2 ;[1]
nop ;[2]
cpi x2, 0xfc ;[3]
brcc bitstuff7 ;[4]
ld shift, y+ ;[5]
dec cnt ;[7]
brne txByteLoop ;[8]
;make SE0:
cbr x1, USBMASK ;[9] prepare SE0 [spec says EOP may be 25 to 30 cycles]
lds x2, usbNewDeviceAddr;[10]
lsl x2 ;[12] we compare with left shifted address
out USBOUT, x1 ;[13] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
subi YL, 20 + 2 ;[0] Only assign address on data packets, not ACK/NAK in x3
sbci YH, 0 ;[1]
;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
;set address only after data packet was sent, not after handshake
breq skipAddrAssign ;[2]
sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
skipAddrAssign:
;end of usbDeviceAddress transfer
ldi x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
USB_STORE_PENDING(x2) ;[5]
ori x1, USBIDLE ;[6]
in x2, USBDDR ;[7]
cbr x2, USBMASK ;[8] set both pins to input
mov x3, x1 ;[9]
cbr x3, USBMASK ;[10] configure no pullup on both pins
ldi x4, 5 ;[11]
se0Delay:
dec x4 ;[12] [15] [18] [21] [24]
brne se0Delay ;[13] [16] [19] [22] [25]
out USBOUT, x1 ;[26] <-- out J (idle) -- end of SE0 (EOP signal)
out USBDDR, x2 ;[27] <-- release bus now
out USBOUT, x3 ;[28] <-- ensure no pull-up resistors are active
rjmp doReturn

117
avr/usbload/Makefile
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@@ -1,117 +0,0 @@
# =====================================================================================
#
# ________ .__ __ ________ ____ ________
# \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
# / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
# / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
# \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
# \__> \/ \/ \/ \/ \/
# www.optixx.org
#
#
# Version: 1.0
# Created: 07/21/2009 03:32:16 PM
# Author: david@optixx.org
# Based on: custom-class, a basic USB example
# Author: Christian Starkjohann
# =====================================================================================
DEBUG = 1
TTY = /dev/tty.PL2303-00002126
DEVICE = atmega644
F_CPU = 20000000
TARGET = main
AVRDUDE = avrdude -c usbasp -p $(DEVICE)
SIZE = avr-size
BOOT_ROM01 = ../../roms/qd16boot01.smc
BOOT_ROM02 = ../../roms/qd16boot02.smc
CONVERT_RLE = ../../scripts/conv_rle.py
CONVERT_ZIP = ../../scripts/conv_zip.py
ifeq ($(DEBUG),1)
LDFLAGS =-Wl,-u,vfprintf
CFLAGS =-Iusbdrv -I. -DDEBUG_LEVEL=0
OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o \
main.o usb_bulk.o uart.o fifo.o sram.o crc.o debug.o \
dump.o timer.o watchdog.o rle.c loader.o info.o shared_memory.o \
system.o pwm.o util.o shell.o irq.o command.o testing.o inflate.o neginf/neginf.o
else
LDFLAGS =-Wl,-u
CFLAGS =-Iusbdrv -I. -DDEBUG_LEVEL=0 -DNO_DEBUG -DNO_INFO
OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o main.o usb_bulk.o \
sram.o crc.o debug.o dump.o rle.c loader.o \
system.o util.o info.o shared_memory.o command.o irq.o \
pwm.o inflate.o neginf/neginf.o
endif
COMPILE = avr-gcc -Wall -Os -DF_CPU=$(F_CPU) $(CFLAGS) -mmcu=$(DEVICE)
##############################################################################
# Fuse values for particular devices
##############################################################################
# http://www.engbedded.com/fusecalc/
FUSE_L = 0xf7
FUSE_H = 0xda
all: hex
help:
@echo "This Makefile has no default rule. Use one of the following:"
@echo "make hex ....... to build main.hex"
@echo "make program ... to flash fuses and firmware"
@echo "make fuse ...... to flash the fuses"
@echo "make flash ..... to flash the firmware (use this on metaboard)"
@echo "make clean ..... to delete objects and hex file"
hex: main.hex
@echo "$(TARGET) compiled for: $(DEVICE)"
@./checksize $(TARGET).elf
program: flash fuse
# rule for programming fuse bits:
fuse:
@[ "$(FUSE_H)" != "" -a "$(FUSE_L)" != "" ] || \
{ echo "*** Edit Makefile and choose values for FUSE_L and FUSE_H!"; exit 1; }
$(AVRDUDE) -U hfuse:w:$(FUSE_H):m -U lfuse:w:$(FUSE_L):m
flash: main.hex
$(AVRDUDE) -U flash:w:main.hex:i
loader01:
python $(CONVERT_RLE) $(BOOT_ROM01)
loader02:
python $(CONVERT_ZIP) $(BOOT_ROM02)
.c.o:
$(COMPILE) -c $< -o $@
.S.o:
$(COMPILE) -x assembler-with-cpp -c $< -o $@
.c.s:
$(COMPILE) -S $< -o $@
usbdrv:
cp -r ../../../usbdrv .
main.elf: usbdrv $(OBJECTS) # usbdrv dependency only needed because we copy it
$(COMPILE) -o main.elf $(OBJECTS) $(LDFLAGS)
main.hex: main.elf
rm -f main.hex main.eep.hex
avr-objcopy -j .text -j .data -O ihex main.elf main.hex
avr-size main.hex
disasm: main.elf
avr-objdump -d main.elf
cpp:
$(COMPILE) -E main.c
clean:
rm -f main.hex main.lst main.obj main.cof main.list main.map main.eep.hex main.elf *.o usbdrv/*.o main.s usbdrv/oddebug.s usbdrv/usbdrv.s neginf/*.o

19
avr/usbload/Makefile.test
View File

@@ -1,19 +0,0 @@
MD5=md5
all:
gcc -c loader_test.c
gcc -c inflate.c
gcc -c neginf/neginf.c
gcc -c inflate_test.c
gcc -c ringbuffer.c
gcc -o inflate_test inflate.o neginf.o inflate_test.o loader_test.o ringbuffer.o
loader:
python ../../scripts/conv_zip_test.py ../../roms/qd16boot02_half.smc
test:
./inflate_test
@$(MD5) out.smc
@$(MD5) out_ref.smc
@$(MD5) ../../roms/qd16boot02_half.smc

35
avr/usbload/checksize
View File

@@ -1,35 +0,0 @@
#!/bin/sh
# Name: checksize
# Project: PowerSwitch/AVR-USB
# Author: Christian Starkjohann
# Creation Date: 2004-12-29
# Tabsize: 4
# Copyright: (c) 2005 OBJECTIVE DEVELOPMENT Software GmbH.
# Revision: $:Id: checksize 83 2006-01-05 22:20:53Z cs $
error=0
codelimit=61440 # default value
datalimit=4064 # default value; leave 32 bytes for stack
if [ $# -gt 1 ]; then
codelimit="$2"
fi
if [ $# -gt 2 ]; then
datalimit="$3"
fi
set -- `avr-size -d "$1" | awk '/[0-9]/ {print $1 + $2, $2 + $3, $2}'`
if [ $1 -gt $codelimit ]; then
echo "*** code size $1 exceeds limit of $codelimit"
error=1
else
echo "ROM: $1 bytes (data=$3)"
fi
if [ $2 -gt $datalimit ]; then
echo "*** data size $2 exceeds limit of $datalimit"
error=1
else
echo "RAM: $2 bytes"
fi
exit $error

120
avr/usbload/command.c
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@@ -1,120 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <stdlib.h>
#include "config.h"
#include "requests.h"
#include "sram.h"
#include "info.h"
#include "irq.h"
#include "usbdrv.h"
#include "rle.h"
#include "loader.h"
#include "system.h"
#include "neginf/neginf.h"
#include "inflate.h"
extern usb_transaction_t usb_trans;
extern system_t system;
extern const char *_rom[];
extern const char _rom01[];
extern const int _rom_size[];
void usb_connect()
{
uint8_t i = 0;
info_P(PSTR("USB init\n"));
usbDeviceDisconnect(); /* enforce re-enumeration, do this while */
cli();
info_P(PSTR("USB disconnect\n"));
i = 10;
while (--i) { /* fake USB disconnect for > 250 ms */
_delay_ms(50);
}
led_on();
usbDeviceConnect();
info_P(PSTR("USB connect\n"));
}
void boot_startup_rom(uint16_t init_delay)
{
uint8_t i;
uint8_t c;
uint16_t j;
uint32_t addr = 0x000000;
PGM_VOID_P p_addr;
info_P(PSTR("Fetch loader rom\n"));
system_set_bus_avr();
snes_irq_lo();
system_snes_irq_off();
system_set_rom_lorom();
inflate_init();
for (i=0; i<ROM_BUFFER_CNT; i++){
p_addr = _rom[i];
printf("idx: %i %lx\n",i,p_addr);
for (j=0; j<_rom_size[i]; j++){
//rle_decode(_rom[i], _rom_size[i], addr);
c = pgm_read_byte((PGM_VOID_P)p_addr++);
printf("%02x ",c);
neginf_process_byte(c);
}
}
info_P(PSTR("\n"));
#if DO_CRC_CHECK_LOADER
dump_memory(0x010000 - 0x100, 0x010000);
uint16_t crc;
crc = crc_check_bulk_memory((uint32_t)0x000000,0x010000, 0x010000);
info(PSTR("crc=%x\n"),crc);
#endif
snes_irq_lo();
system_snes_irq_off();
system_set_rom_hirom();
system_set_wr_disable();
system_set_bus_snes();
system_send_snes_reset();
_delay_ms(init_delay);
}
void banner(){
}
void transaction_status(){
}

31
avr/usbload/command.h
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@@ -1,31 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __COMMAND_H__
#define __COMMAND_H__
void usb_connect();
void boot_startup_rom(uint16_t init_delay);
void banner();
void transaction_status();
#endif

296
avr/usbload/commandline/opendevice.c
View File

@@ -1,296 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
* Based on: custom-class, a basic USB example
* Author: Christian Starkjohann
* =====================================================================================
*/
#include <stdio.h>
#include "opendevice.h"
/*
* -------------------------------------------------------------------------
*/
#define MATCH_SUCCESS 1
#define MATCH_FAILED 0
#define MATCH_ABORT -1
/*
* private interface: match text and p, return MATCH_SUCCESS, MATCH_FAILED, or
* MATCH_ABORT.
*/
static int _shellStyleMatch(char *text, char *p)
{
int last,
matched,
reverse;
for (; *p; text++, p++) {
if (*text == 0 && *p != '*')
return MATCH_ABORT;
switch (*p) {
case '\\':
/*
* Literal match with following character.
*/
p++;
/*
* FALLTHROUGH
*/
default:
if (*text != *p)
return MATCH_FAILED;
continue;
case '?':
/*
* Match anything.
*/
continue;
case '*':
while (*++p == '*')
/*
* Consecutive stars act just like one.
*/
continue;
if (*p == 0)
/*
* Trailing star matches everything.
*/
return MATCH_SUCCESS;
while (*text)
if ((matched = _shellStyleMatch(text++, p)) != MATCH_FAILED)
return matched;
return MATCH_ABORT;
case '[':
reverse = p[1] == '^';
if (reverse) /* Inverted character class. */
p++;
matched = MATCH_FAILED;
if (p[1] == ']' || p[1] == '-')
if (*++p == *text)
matched = MATCH_SUCCESS;
for (last = *p; *++p && *p != ']'; last = *p)
if (*p == '-' && p[1] != ']' ? *text <= *++p
&& *text >= last : *text == *p)
matched = MATCH_SUCCESS;
if (matched == reverse)
return MATCH_FAILED;
continue;
}
}
return *text == 0;
}
/*
* public interface for shell style matching: returns 0 if fails, 1 if matches
*/
static int shellStyleMatch(char *text, char *pattern)
{
if (pattern == NULL) /* NULL pattern is synonymous to "*" */
return 1;
return _shellStyleMatch(text, pattern) == MATCH_SUCCESS;
}
/*
* -------------------------------------------------------------------------
*/
int usbGetStringAscii(usb_dev_handle * dev, int index, char *buf, int buflen)
{
char buffer[256];
int rval,
i;
if ((rval = usb_get_string_simple(dev, index, buf, buflen)) >= 0) /* use
* libusb
* version
* if
* it
* works
*/
return rval;
if ((rval =
usb_control_msg(dev, USB_ENDPOINT_IN, USB_REQ_GET_DESCRIPTOR,
(USB_DT_STRING << 8) + index, 0x0409, buffer,
sizeof(buffer), 5000)) < 0)
return rval;
if (buffer[1] != USB_DT_STRING) {
*buf = 0;
return 0;
}
if ((unsigned char) buffer[0] < rval)
rval = (unsigned char) buffer[0];
rval /= 2;
/*
* lossy conversion to ISO Latin1:
*/
for (i = 1; i < rval; i++) {
if (i > buflen) /* destination buffer overflow */
break;
buf[i - 1] = buffer[2 * i];
if (buffer[2 * i + 1] != 0) /* outside of ISO Latin1 range */
buf[i - 1] = '?';
}
buf[i - 1] = 0;
return i - 1;
}
/*
* -------------------------------------------------------------------------
*/
int usbOpenDevice(usb_dev_handle ** device, int vendorID,
char *vendorNamePattern, int productID,
char *productNamePattern, char *serialNamePattern,
FILE * printMatchingDevicesFp, FILE * warningsFp)
{
struct usb_bus *bus;
struct usb_device *dev;
usb_dev_handle *handle = NULL;
int errorCode = USBOPEN_ERR_NOTFOUND;
usb_find_busses();
usb_find_devices();
for (bus = usb_get_busses(); bus; bus = bus->next) {
for (dev = bus->devices; dev; dev = dev->next) { /* iterate over
* all devices
* on all
* busses */
if ((vendorID == 0 || dev->descriptor.idVendor == vendorID)
&& (productID == 0 || dev->descriptor.idProduct == productID)) {
char vendor[256],
product[256],
serial[256];
int len;
handle = usb_open(dev); /* we need to open the device in order
* to query strings */
if (!handle) {
errorCode = USBOPEN_ERR_ACCESS;
if (warningsFp != NULL)
fprintf(warningsFp,
"Warning: cannot open VID=0x%04x PID=0x%04x: %s\n",
dev->descriptor.idVendor,
dev->descriptor.idProduct, usb_strerror());
continue;
}
/*
* now check whether the names match:
*/
len = vendor[0] = 0;
if (dev->descriptor.iManufacturer > 0) {
len =
usbGetStringAscii(handle, dev->descriptor.iManufacturer,
vendor, sizeof(vendor));
}
if (len < 0) {
errorCode = USBOPEN_ERR_ACCESS;
if (warningsFp != NULL)
fprintf(warningsFp,
"Warning: cannot query manufacturer for VID=0x%04x PID=0x%04x: %s\n",
dev->descriptor.idVendor,
dev->descriptor.idProduct, usb_strerror());
} else {
errorCode = USBOPEN_ERR_NOTFOUND;
/*
* printf("seen device from vendor ->%s<-\n", vendor);
*/
if (shellStyleMatch(vendor, vendorNamePattern)) {
len = product[0] = 0;
if (dev->descriptor.iProduct > 0) {
len =
usbGetStringAscii(handle,
dev->descriptor.iProduct,
product, sizeof(product));
}
if (len < 0) {
errorCode = USBOPEN_ERR_ACCESS;
if (warningsFp != NULL)
fprintf(warningsFp,
"Warning: cannot query product for VID=0x%04x PID=0x%04x: %s\n",
dev->descriptor.idVendor,
dev->descriptor.idProduct,
usb_strerror());
} else {
errorCode = USBOPEN_ERR_NOTFOUND;
/*
* printf("seen product ->%s<-\n", product);
*/
if (shellStyleMatch(product, productNamePattern)) {
len = serial[0] = 0;
if (dev->descriptor.iSerialNumber > 0) {
len =
usbGetStringAscii(handle,
dev->descriptor.
iSerialNumber, serial,
sizeof(serial));
}
if (len < 0) {
errorCode = USBOPEN_ERR_ACCESS;
if (warningsFp != NULL)
fprintf(warningsFp,
"Warning: cannot query serial for VID=0x%04x PID=0x%04x: %s\n",
dev->descriptor.idVendor,
dev->descriptor.idProduct,
usb_strerror());
}
if (shellStyleMatch(serial, serialNamePattern)) {
if (printMatchingDevicesFp != NULL) {
if (serial[0] == 0) {
fprintf(printMatchingDevicesFp,
"VID=0x%04x PID=0x%04x vendor=\"%s\" product=\"%s\"\n",
dev->descriptor.idVendor,
dev->descriptor.idProduct,
vendor, product);
} else {
fprintf(printMatchingDevicesFp,
"VID=0x%04x PID=0x%04x vendor=\"%s\" product=\"%s\" serial=\"%s\"\n",
dev->descriptor.idVendor,
dev->descriptor.idProduct,
vendor, product, serial);
}
} else {
break;
}
}
}
}
}
}
usb_close(handle);
handle = NULL;
}
}
if (handle) /* we have found a deice */
break;
}
if (handle != NULL) {
errorCode = 0;
*device = handle;
}
if (printMatchingDevicesFp != NULL) /* never return an error for listing
* only */
errorCode = 0;
return errorCode;
}
/*
* -------------------------------------------------------------------------
*/

313
avr/usbload/commandline/snesuploader.c
View File

@@ -1,313 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
* Based on: custom-class, a basic USB example
* Author: Christian Starkjohann
* =====================================================================================
*/
#define BANK_SIZE_SHIFT 15
#define BANK_SIZE (1<<BANK_SIZE_SHIFT)
#define READ_BUFFER_SIZE (1<<BANK_SIZE_SHIFT)
#define SEND_BUFFER_SIZE 128
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <sys/stat.h>
#include <usb.h> /* this is libusb */
#include "opendevice.h" /* common code moved to separate module */
#include "../requests.h" /* custom request numbers */
#include "../usbconfig.h" /* device's VID/PID and names */
void dump_packet(uint32_t addr, uint32_t len, uint8_t * packet)
{
uint16_t i,
j;
uint16_t sum = 0;
uint8_t clear = 0;
for (i = 0; i < len; i += 16) {
sum = 0;
for (j = 0; j < 16; j++) {
sum += packet[i + j];
}
if (!sum) {
clear = 1;
continue;
}
if (clear) {
printf("*\n");
clear = 0;
}
printf("%08x:", addr + i);
for (j = 0; j < 16; j++) {
printf(" %02x", packet[i + j]);
}
printf(" |");
for (j = 0; j < 16; j++) {
if (packet[i + j] >= 33 && packet[i + j] <= 126)
printf("%c", packet[i + j]);
else
printf(".");
}
printf("|\n");
}
}
uint16_t crc_xmodem_update(uint16_t crc, uint8_t data)
{
int i;
crc = crc ^ ((uint16_t) data << 8);
for (i = 0; i < 8; i++) {
if (crc & 0x8000)
crc = (crc << 1) ^ 0x1021;
else
crc <<= 1;
}
return crc;
}
uint16_t do_crc(uint8_t * data, uint16_t size)
{
uint16_t crc = 0;
uint16_t i;
for (i = 0; i < size; i++) {
crc = crc_xmodem_update(crc, data[i]);
}
return crc;
}
uint16_t do_crc_update(uint16_t crc, uint8_t * data, uint16_t size)
{
uint16_t i;
for (i = 0; i < size; i++)
crc = crc_xmodem_update(crc, data[i]);
return crc;
}
static void usage(char *name)
{
fprintf(stderr, "usage:\n");
fprintf(stderr, " %s upload filename.. upload\n", name);
}
int main(int argc, char **argv)
{
usb_dev_handle *handle = NULL;
const unsigned char rawVid[2] = { USB_CFG_VENDOR_ID }, rawPid[2] = {
USB_CFG_DEVICE_ID};
char vendor[] = { USB_CFG_VENDOR_NAME, 0 }, product[] = {
USB_CFG_DEVICE_NAME, 0};
int cnt, vid, pid;
uint8_t *read_buffer;
uint8_t *crc_buffer;
uint8_t *ptr;
uint32_t addr = 0;
uint16_t addr_lo = 0;
uint16_t addr_hi = 0;
uint32_t step = 0;
uint16_t crc = 0;
uint8_t bank = 0;
uint8_t bank_cnt = 0;
uint32_t file_size = 0;
uint32_t file_offset = 0;
FILE *fp;
usb_init();
if (argc < 2) { /* we need at least one argument */
usage(argv[0]);
exit(1);
}
/*
* compute VID/PID from usbconfig.h so that there is a central source
* of information
*/
vid = rawVid[1] * 256 + rawVid[0];
pid = rawPid[1] * 256 + rawPid[0];
/*
* The following function is in opendevice.c:
*/
if (usbOpenDevice(&handle, vid, vendor, pid, product, NULL, NULL, NULL) !=
0) {
fprintf(stderr,
"Could not find USB device \"%s\" with vid=0x%x pid=0x%x\n",
product, vid, pid);
exit(1);
}
printf("Open USB device \"%s\" with vid=0x%x pid=0x%x\n", product, vid,
pid);
if (strcasecmp(argv[1], "upload") == 0) {
if (argc < 3) { /* we need at least one argument */
usage(argv[0]);
exit(1);
}
fp = fopen(argv[2], "r");
if (fp == NULL) {
fprintf(stderr, "Cannot open file %s ", argv[2]);
exit(1);
}
fseek (fp, 0, SEEK_END);
file_size = ftell (fp);
file_offset = 512;
if (strstr(argv[2],".smc") || strstr(argv[2],".swc")){
printf("Skip 512 Byte header\n");
file_size -= 512;
fseek (fp, 512, SEEK_SET);
} else {
fseek (fp, 0, SEEK_SET);
}
bank_cnt = file_size / BANK_SIZE;
printf("Transfer '%s' %i Bytes, %i Banks\n",argv[2],file_size,bank_cnt);
read_buffer = (unsigned char *) malloc(READ_BUFFER_SIZE);
crc_buffer = (unsigned char *) malloc(0x1000);
memset(crc_buffer, 0, 0x1000);
addr = 0x000000;
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_MODE_AVR, 0, 0, NULL,
0, 5000);
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_OUT,
USB_BULK_UPLOAD_INIT, BANK_SIZE_SHIFT , bank_cnt, NULL, 0, 5000);
if (cnt < 0) {
fprintf(stderr, "USB error: %s\n", usb_strerror());
usb_close(handle);
exit(-1);
}
ptr = crc_buffer;
while ((cnt = fread(read_buffer, READ_BUFFER_SIZE, 1, fp)) > 0) {
ptr = crc_buffer;
for (step = 0; step < READ_BUFFER_SIZE; step += SEND_BUFFER_SIZE) {
addr_lo = addr & 0xffff;
addr_hi = (addr >> 16) & 0x00ff;
if (addr == 0x000000){
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_BULK_UPLOAD_ADDR, addr_hi,
addr_lo, (char *) read_buffer + step,
SEND_BUFFER_SIZE, 5000);
} else {
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_BULK_UPLOAD_NEXT, addr_hi,
addr_lo, (char *) read_buffer + step,
SEND_BUFFER_SIZE, 5000);
}
if (cnt < 0) {
fprintf(stderr, "USB error: %s\n", usb_strerror());
usb_close(handle);
exit(-1);
}
memcpy(ptr, read_buffer + step, SEND_BUFFER_SIZE);
addr += SEND_BUFFER_SIZE;
ptr += SEND_BUFFER_SIZE;
if ( addr % BANK_SIZE == 0){
crc = do_crc(crc_buffer, 0x1000);
printf ("bank=0x%02x addr=0x%08x addr=0x%08x crc=0x%04x\n", bank, addr - 0x1000, addr, crc);
ptr = crc_buffer;
if ( addr % BANK_SIZE == 0) {
bank++;
}
}
}
}
bank = 0;
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_BULK_UPLOAD_END, 0, 0, NULL,
0, 5000);
fseek(fp, file_offset, SEEK_SET);
while ((cnt = fread(read_buffer, READ_BUFFER_SIZE, 1, fp)) > 0) {
printf ("bank=0x%02x crc=0x%04x\n", bank++,
do_crc(read_buffer, READ_BUFFER_SIZE));
}
fclose(fp);
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_MODE_SNES, 0, 0, NULL,
0, 5000);
if (cnt < 1) {
if (cnt < 0) {
fprintf(stderr, "USB error: %s\n", usb_strerror());
} else {
fprintf(stderr, "only %d bytes received.\n", cnt);
}
}
} else if (strcasecmp(argv[1], "crc") == 0) {
/*
* if(argc < 2){ usage(argv[0]); exit(1); }
*/
addr = 0x000000;
addr_lo = addr & 0xffff;
addr_hi = (addr >> 16) & 0xff;
printf("Request CRC for Addr: 0x%06x\n", addr);
cnt = usb_control_msg(handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE |
USB_ENDPOINT_OUT, USB_CRC_ADDR, addr_hi, addr_lo,
NULL, (1 << 15) / 4, 5000);
if (cnt < 1) {
if (cnt < 0) {
fprintf(stderr, "USB error: %s\n", usb_strerror());
} else {
fprintf(stderr, "only %d bytes received.\n", cnt);
}
}
} else {
usage(argv[0]);
exit(1);
}
usb_close(handle);
return 0;
}

809
avr/usbload/commandline/snesuploader.ll
View File

@@ -1,809 +0,0 @@
; ModuleID = '/Users/david/Devel/arch/avr/code/snesram/poc/avr_usbload/commandline/snesuploader.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9"
%struct.__sFILE = type <{ i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }>
%struct.__sFILEX = type opaque
%struct.__sbuf = type <{ i8*, i32 }>
%struct.usb_dev_handle = type opaque
@"\01LC" = internal constant [3 x i8] c"*\0A\00" ; <[3 x i8]*> [#uses=1]
@"\01LC1" = internal constant [6 x i8] c"%08x:\00" ; <[6 x i8]*> [#uses=1]
@"\01LC2" = internal constant [6 x i8] c" %02x\00" ; <[6 x i8]*> [#uses=1]
@"\01LC3" = internal constant [3 x i8] c" |\00" ; <[3 x i8]*> [#uses=1]
@"\01LC4" = internal constant [3 x i8] c"%c\00" ; <[3 x i8]*> [#uses=1]
@"\01LC5" = internal constant [2 x i8] c".\00" ; <[2 x i8]*> [#uses=1]
@"\01LC6" = internal constant [3 x i8] c"|\0A\00" ; <[3 x i8]*> [#uses=1]
@__stderrp = external global %struct.__sFILE* ; <%struct.__sFILE**> [#uses=8]
@"\01LC7" = internal constant [55 x i8] c"Could not find USB device \22%s\22 with vid=0x%x pid=0x%x\0A\00" ; <[55 x i8]*> [#uses=1]
@"\01LC8" = internal constant [45 x i8] c"Open USB device \22%s\22 with vid=0x%x pid=0x%x\0A\00" ; <[45 x i8]*> [#uses=1]
@"\01LC9" = internal constant [7 x i8] c"upload\00" ; <[7 x i8]*> [#uses=1]
@"\01LC10" = internal constant [2 x i8] c"r\00" ; <[2 x i8]*> [#uses=1]
@"\01LC11" = internal constant [21 x i8] c"Cannot open file %s \00" ; <[21 x i8]*> [#uses=1]
@"\01LC12" = internal constant [70 x i8] c"Addr: 0x%06x Bank: 0x%02x HiAddr: 0x%02x LoAddr: 0x%04x Crc: 0x%04x\0A\00" ; <[70 x i8]*> [#uses=1]
@"\01LC13" = internal constant [15 x i8] c"USB error: %s\0A\00" ; <[15 x i8]*> [#uses=1]
@"\01LC14" = internal constant [25 x i8] c"only %d bytes received.\0A\00" ; <[25 x i8]*> [#uses=1]
@"\01LC15" = internal constant [4 x i8] c"crc\00" ; <[4 x i8]*> [#uses=1]
@"\01LC16" = internal constant [30 x i8] c"Request CRC for Addr: 0x%06x\0A\00" ; <[30 x i8]*> [#uses=1]
@"\01LC17" = internal constant [8 x i8] c"usage:\0A\00" ; <[8 x i8]*> [#uses=1]
@"\01LC18" = internal constant [31 x i8] c" %s upload filename.. upload\0A\00" ; <[31 x i8]*> [#uses=1]
define void @dump_packet(i32 %addr, i32 %len, i8* %packet) nounwind {
entry:
%addr.addr = alloca i32 ; <i32*> [#uses=2]
%len.addr = alloca i32 ; <i32*> [#uses=2]
%packet.addr = alloca i8* ; <i8**> [#uses=6]
%i = alloca i16, align 2 ; <i16*> [#uses=10]
%j = alloca i16, align 2 ; <i16*> [#uses=17]
%sum = alloca i16, align 2 ; <i16*> [#uses=5]
%clear = alloca i8, align 1 ; <i8*> [#uses=4]
store i32 %addr, i32* %addr.addr
store i32 %len, i32* %len.addr
store i8* %packet, i8** %packet.addr
store i16 0, i16* %sum
store i8 0, i8* %clear
store i16 0, i16* %i
br label %for.cond
for.cond: ; preds = %for.inc98, %entry
%tmp = load i16* %i ; <i16> [#uses=1]
%conv = zext i16 %tmp to i32 ; <i32> [#uses=1]
%tmp1 = load i32* %len.addr ; <i32> [#uses=1]
%cmp = icmp ult i32 %conv, %tmp1 ; <i1> [#uses=1]
br i1 %cmp, label %for.body, label %for.end103
for.body: ; preds = %for.cond
store i16 0, i16* %sum
store i16 0, i16* %j
br label %for.cond3
for.cond3: ; preds = %for.inc, %for.body
%tmp4 = load i16* %j ; <i16> [#uses=1]
%conv5 = zext i16 %tmp4 to i32 ; <i32> [#uses=1]
%cmp6 = icmp slt i32 %conv5, 16 ; <i1> [#uses=1]
br i1 %cmp6, label %for.body8, label %for.end
for.body8: ; preds = %for.cond3
%tmp9 = load i16* %sum ; <i16> [#uses=1]
%conv10 = zext i16 %tmp9 to i32 ; <i32> [#uses=1]
%tmp11 = load i16* %i ; <i16> [#uses=1]
%conv12 = zext i16 %tmp11 to i32 ; <i32> [#uses=1]
%tmp13 = load i16* %j ; <i16> [#uses=1]
%conv14 = zext i16 %tmp13 to i32 ; <i32> [#uses=1]
%add = add i32 %conv12, %conv14 ; <i32> [#uses=1]
%tmp15 = load i8** %packet.addr ; <i8*> [#uses=1]
%arrayidx = getelementptr i8* %tmp15, i32 %add ; <i8*> [#uses=1]
%tmp16 = load i8* %arrayidx ; <i8> [#uses=1]
%conv17 = zext i8 %tmp16 to i32 ; <i32> [#uses=1]
%add18 = add i32 %conv10, %conv17 ; <i32> [#uses=1]
%conv19 = trunc i32 %add18 to i16 ; <i16> [#uses=1]
store i16 %conv19, i16* %sum
br label %for.inc
for.inc: ; preds = %for.body8
%tmp20 = load i16* %j ; <i16> [#uses=1]
%inc = add i16 %tmp20, 1 ; <i16> [#uses=1]
store i16 %inc, i16* %j
br label %for.cond3
for.end: ; preds = %for.cond3
%tmp21 = load i16* %sum ; <i16> [#uses=1]
%tobool = icmp ne i16 %tmp21, 0 ; <i1> [#uses=1]
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %for.end
store i8 1, i8* %clear
br label %for.inc98
if.end: ; preds = %for.end
%tmp22 = load i8* %clear ; <i8> [#uses=1]
%tobool23 = icmp ne i8 %tmp22, 0 ; <i1> [#uses=1]
br i1 %tobool23, label %if.then24, label %if.end25
if.then24: ; preds = %if.end
%call = call i32 (i8*, ...)* @printf(i8* getelementptr ([3 x i8]* @"\01LC", i32 0, i32 0)) ; <i32> [#uses=0]
store i8 0, i8* %clear
br label %if.end25
if.end25: ; preds = %if.then24, %if.end
%tmp26 = load i32* %addr.addr ; <i32> [#uses=1]
%tmp27 = load i16* %i ; <i16> [#uses=1]
%conv28 = zext i16 %tmp27 to i32 ; <i32> [#uses=1]
%add29 = add i32 %tmp26, %conv28 ; <i32> [#uses=1]
%call30 = call i32 (i8*, ...)* @printf(i8* getelementptr ([6 x i8]* @"\01LC1", i32 0, i32 0), i32 %add29) ; <i32> [#uses=0]
store i16 0, i16* %j
br label %for.cond31
for.cond31: ; preds = %for.inc47, %if.end25
%tmp32 = load i16* %j ; <i16> [#uses=1]
%conv33 = zext i16 %tmp32 to i32 ; <i32> [#uses=1]
%cmp34 = icmp slt i32 %conv33, 16 ; <i1> [#uses=1]
br i1 %cmp34, label %for.body36, label %for.end50
for.body36: ; preds = %for.cond31
%tmp37 = load i16* %i ; <i16> [#uses=1]
%conv38 = zext i16 %tmp37 to i32 ; <i32> [#uses=1]
%tmp39 = load i16* %j ; <i16> [#uses=1]
%conv40 = zext i16 %tmp39 to i32 ; <i32> [#uses=1]
%add41 = add i32 %conv38, %conv40 ; <i32> [#uses=1]
%tmp42 = load i8** %packet.addr ; <i8*> [#uses=1]
%arrayidx43 = getelementptr i8* %tmp42, i32 %add41 ; <i8*> [#uses=1]
%tmp44 = load i8* %arrayidx43 ; <i8> [#uses=1]
%conv45 = zext i8 %tmp44 to i32 ; <i32> [#uses=1]
%call46 = call i32 (i8*, ...)* @printf(i8* getelementptr ([6 x i8]* @"\01LC2", i32 0, i32 0), i32 %conv45) ; <i32> [#uses=0]
br label %for.inc47
for.inc47: ; preds = %for.body36
%tmp48 = load i16* %j ; <i16> [#uses=1]
%inc49 = add i16 %tmp48, 1 ; <i16> [#uses=1]
store i16 %inc49, i16* %j
br label %for.cond31
for.end50: ; preds = %for.cond31
%call51 = call i32 (i8*, ...)* @printf(i8* getelementptr ([3 x i8]* @"\01LC3", i32 0, i32 0)) ; <i32> [#uses=0]
store i16 0, i16* %j
br label %for.cond52
for.cond52: ; preds = %for.inc93, %for.end50
%tmp53 = load i16* %j ; <i16> [#uses=1]
%conv54 = zext i16 %tmp53 to i32 ; <i32> [#uses=1]
%cmp55 = icmp slt i32 %conv54, 16 ; <i1> [#uses=1]
br i1 %cmp55, label %for.body57, label %for.end96
for.body57: ; preds = %for.cond52
%tmp58 = load i16* %i ; <i16> [#uses=1]
%conv59 = zext i16 %tmp58 to i32 ; <i32> [#uses=1]
%tmp60 = load i16* %j ; <i16> [#uses=1]
%conv61 = zext i16 %tmp60 to i32 ; <i32> [#uses=1]
%add62 = add i32 %conv59, %conv61 ; <i32> [#uses=1]
%tmp63 = load i8** %packet.addr ; <i8*> [#uses=1]
%arrayidx64 = getelementptr i8* %tmp63, i32 %add62 ; <i8*> [#uses=1]
%tmp65 = load i8* %arrayidx64 ; <i8> [#uses=1]
%conv66 = zext i8 %tmp65 to i32 ; <i32> [#uses=1]
%cmp67 = icmp sge i32 %conv66, 33 ; <i1> [#uses=1]
br i1 %cmp67, label %land.lhs.true, label %if.else
land.lhs.true: ; preds = %for.body57
%tmp69 = load i16* %i ; <i16> [#uses=1]
%conv70 = zext i16 %tmp69 to i32 ; <i32> [#uses=1]
%tmp71 = load i16* %j ; <i16> [#uses=1]
%conv72 = zext i16 %tmp71 to i32 ; <i32> [#uses=1]
%add73 = add i32 %conv70, %conv72 ; <i32> [#uses=1]
%tmp74 = load i8** %packet.addr ; <i8*> [#uses=1]
%arrayidx75 = getelementptr i8* %tmp74, i32 %add73 ; <i8*> [#uses=1]
%tmp76 = load i8* %arrayidx75 ; <i8> [#uses=1]
%conv77 = zext i8 %tmp76 to i32 ; <i32> [#uses=1]
%cmp78 = icmp sle i32 %conv77, 126 ; <i1> [#uses=1]
br i1 %cmp78, label %if.then80, label %if.else
if.then80: ; preds = %land.lhs.true
%tmp81 = load i16* %i ; <i16> [#uses=1]
%conv82 = zext i16 %tmp81 to i32 ; <i32> [#uses=1]
%tmp83 = load i16* %j ; <i16> [#uses=1]
%conv84 = zext i16 %tmp83 to i32 ; <i32> [#uses=1]
%add85 = add i32 %conv82, %conv84 ; <i32> [#uses=1]
%tmp86 = load i8** %packet.addr ; <i8*> [#uses=1]
%arrayidx87 = getelementptr i8* %tmp86, i32 %add85 ; <i8*> [#uses=1]
%tmp88 = load i8* %arrayidx87 ; <i8> [#uses=1]
%conv89 = zext i8 %tmp88 to i32 ; <i32> [#uses=1]
%call90 = call i32 (i8*, ...)* @printf(i8* getelementptr ([3 x i8]* @"\01LC4", i32 0, i32 0), i32 %conv89) ; <i32> [#uses=0]
br label %if.end92
if.else: ; preds = %land.lhs.true, %for.body57
%call91 = call i32 (i8*, ...)* @printf(i8* getelementptr ([2 x i8]* @"\01LC5", i32 0, i32 0)) ; <i32> [#uses=0]
br label %if.end92
if.end92: ; preds = %if.else, %if.then80
br label %for.inc93
for.inc93: ; preds = %if.end92
%tmp94 = load i16* %j ; <i16> [#uses=1]
%inc95 = add i16 %tmp94, 1 ; <i16> [#uses=1]
store i16 %inc95, i16* %j
br label %for.cond52
for.end96: ; preds = %for.cond52
%call97 = call i32 (i8*, ...)* @printf(i8* getelementptr ([3 x i8]* @"\01LC6", i32 0, i32 0)) ; <i32> [#uses=0]
br label %for.inc98
for.inc98: ; preds = %for.end96, %if.then
%tmp99 = load i16* %i ; <i16> [#uses=1]
%conv100 = zext i16 %tmp99 to i32 ; <i32> [#uses=1]
%add101 = add i32 %conv100, 16 ; <i32> [#uses=1]
%conv102 = trunc i32 %add101 to i16 ; <i16> [#uses=1]
store i16 %conv102, i16* %i
br label %for.cond
for.end103: ; preds = %for.cond
ret void
}
declare i32 @printf(i8*, ...)
define zeroext i16 @crc_xmodem_update(i16 zeroext %crc, i8 zeroext %data) nounwind {
entry:
%retval = alloca i16 ; <i16*> [#uses=2]
%crc.addr = alloca i16 ; <i16*> [#uses=9]
%data.addr = alloca i8 ; <i8*> [#uses=2]
%i = alloca i32, align 4 ; <i32*> [#uses=4]
store i16 %crc, i16* %crc.addr
store i8 %data, i8* %data.addr
%tmp = load i16* %crc.addr ; <i16> [#uses=1]
%conv = zext i16 %tmp to i32 ; <i32> [#uses=1]
%tmp1 = load i8* %data.addr ; <i8> [#uses=1]
%conv2 = zext i8 %tmp1 to i32 ; <i32> [#uses=1]
%conv3 = trunc i32 %conv2 to i16 ; <i16> [#uses=1]
%conv4 = zext i16 %conv3 to i32 ; <i32> [#uses=1]
%shl = shl i32 %conv4, 8 ; <i32> [#uses=1]
%xor = xor i32 %conv, %shl ; <i32> [#uses=1]
%conv5 = trunc i32 %xor to i16 ; <i16> [#uses=1]
store i16 %conv5, i16* %crc.addr
store i32 0, i32* %i
br label %for.cond
for.cond: ; preds = %for.inc, %entry
%tmp6 = load i32* %i ; <i32> [#uses=1]
%cmp = icmp slt i32 %tmp6, 8 ; <i1> [#uses=1]
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
%tmp8 = load i16* %crc.addr ; <i16> [#uses=1]
%conv9 = zext i16 %tmp8 to i32 ; <i32> [#uses=1]
%and = and i32 %conv9, 32768 ; <i32> [#uses=1]
%tobool = icmp ne i32 %and, 0 ; <i1> [#uses=1]
br i1 %tobool, label %if.then, label %if.else
if.then: ; preds = %for.body
%tmp10 = load i16* %crc.addr ; <i16> [#uses=1]
%conv11 = zext i16 %tmp10 to i32 ; <i32> [#uses=1]
%shl12 = shl i32 %conv11, 1 ; <i32> [#uses=1]
%xor13 = xor i32 %shl12, 4129 ; <i32> [#uses=1]
%conv14 = trunc i32 %xor13 to i16 ; <i16> [#uses=1]
store i16 %conv14, i16* %crc.addr
br label %if.end
if.else: ; preds = %for.body
%tmp15 = load i16* %crc.addr ; <i16> [#uses=1]
%conv16 = zext i16 %tmp15 to i32 ; <i32> [#uses=1]
%shl17 = shl i32 %conv16, 1 ; <i32> [#uses=1]
%conv18 = trunc i32 %shl17 to i16 ; <i16> [#uses=1]
store i16 %conv18, i16* %crc.addr
br label %if.end
if.end: ; preds = %if.else, %if.then
br label %for.inc
for.inc: ; preds = %if.end
%tmp19 = load i32* %i ; <i32> [#uses=1]
%inc = add i32 %tmp19, 1 ; <i32> [#uses=1]
store i32 %inc, i32* %i
br label %for.cond
for.end: ; preds = %for.cond
%tmp20 = load i16* %crc.addr ; <i16> [#uses=1]
store i16 %tmp20, i16* %retval
%0 = load i16* %retval ; <i16> [#uses=1]
ret i16 %0
}
define zeroext i16 @do_crc(i8* %data, i16 zeroext %size) nounwind {
entry:
%retval = alloca i16 ; <i16*> [#uses=2]
%data.addr = alloca i8* ; <i8**> [#uses=2]
%size.addr = alloca i16 ; <i16*> [#uses=2]
%crc = alloca i16, align 2 ; <i16*> [#uses=4]
%i = alloca i16, align 2 ; <i16*> [#uses=5]
store i8* %data, i8** %data.addr
store i16 %size, i16* %size.addr
store i16 0, i16* %crc
store i16 0, i16* %i
br label %for.cond
for.cond: ; preds = %for.inc, %entry
%tmp = load i16* %i ; <i16> [#uses=1]
%conv = zext i16 %tmp to i32 ; <i32> [#uses=1]
%tmp1 = load i16* %size.addr ; <i16> [#uses=1]
%conv2 = zext i16 %tmp1 to i32 ; <i32> [#uses=1]
%cmp = icmp slt i32 %conv, %conv2 ; <i1> [#uses=1]
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
%tmp4 = load i16* %crc ; <i16> [#uses=1]
%tmp5 = load i16* %i ; <i16> [#uses=1]
%tmp6 = load i8** %data.addr ; <i8*> [#uses=1]
%idxprom = zext i16 %tmp5 to i32 ; <i32> [#uses=1]
%arrayidx = getelementptr i8* %tmp6, i32 %idxprom ; <i8*> [#uses=1]
%tmp7 = load i8* %arrayidx ; <i8> [#uses=1]
%call = call zeroext i16 @crc_xmodem_update(i16 zeroext %tmp4, i8 zeroext %tmp7) ; <i16> [#uses=1]
store i16 %call, i16* %crc
br label %for.inc
for.inc: ; preds = %for.body
%tmp8 = load i16* %i ; <i16> [#uses=1]
%inc = add i16 %tmp8, 1 ; <i16> [#uses=1]
store i16 %inc, i16* %i
br label %for.cond
for.end: ; preds = %for.cond
%tmp9 = load i16* %crc ; <i16> [#uses=1]
store i16 %tmp9, i16* %retval
%0 = load i16* %retval ; <i16> [#uses=1]
ret i16 %0
}
define zeroext i16 @do_crc_update(i16 zeroext %crc, i8* %data, i16 zeroext %size) nounwind {
entry:
%retval = alloca i16 ; <i16*> [#uses=2]
%crc.addr = alloca i16 ; <i16*> [#uses=4]
%data.addr = alloca i8* ; <i8**> [#uses=2]
%size.addr = alloca i16 ; <i16*> [#uses=2]
%i = alloca i16, align 2 ; <i16*> [#uses=5]
store i16 %crc, i16* %crc.addr
store i8* %data, i8** %data.addr
store i16 %size, i16* %size.addr
store i16 0, i16* %i
br label %for.cond
for.cond: ; preds = %for.inc, %entry
%tmp = load i16* %i ; <i16> [#uses=1]
%conv = zext i16 %tmp to i32 ; <i32> [#uses=1]
%tmp1 = load i16* %size.addr ; <i16> [#uses=1]
%conv2 = zext i16 %tmp1 to i32 ; <i32> [#uses=1]
%cmp = icmp slt i32 %conv, %conv2 ; <i1> [#uses=1]
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
%tmp4 = load i16* %crc.addr ; <i16> [#uses=1]
%tmp5 = load i16* %i ; <i16> [#uses=1]
%tmp6 = load i8** %data.addr ; <i8*> [#uses=1]
%idxprom = zext i16 %tmp5 to i32 ; <i32> [#uses=1]
%arrayidx = getelementptr i8* %tmp6, i32 %idxprom ; <i8*> [#uses=1]
%tmp7 = load i8* %arrayidx ; <i8> [#uses=1]
%call = call zeroext i16 @crc_xmodem_update(i16 zeroext %tmp4, i8 zeroext %tmp7) ; <i16> [#uses=1]
store i16 %call, i16* %crc.addr
br label %for.inc
for.inc: ; preds = %for.body
%tmp8 = load i16* %i ; <i16> [#uses=1]
%inc = add i16 %tmp8, 1 ; <i16> [#uses=1]
store i16 %inc, i16* %i
br label %for.cond
for.end: ; preds = %for.cond
%tmp9 = load i16* %crc.addr ; <i16> [#uses=1]
store i16 %tmp9, i16* %retval
%0 = load i16* %retval ; <i16> [#uses=1]
ret i16 %0
}
define i32 @main(i32 %argc, i8** %argv) nounwind {
entry:
%retval = alloca i32 ; <i32*> [#uses=2]
%argc.addr = alloca i32 ; <i32*> [#uses=3]
%argv.addr = alloca i8** ; <i8***> [#uses=8]
%handle = alloca %struct.usb_dev_handle*, align 4 ; <%struct.usb_dev_handle**> [#uses=7]
%rawVid = alloca [2 x i8], align 1 ; <[2 x i8]*> [#uses=4]
%rawPid = alloca [2 x i8], align 1 ; <[2 x i8]*> [#uses=4]
%vendor = alloca [11 x i8], align 1 ; <[11 x i8]*> [#uses=12]
%product = alloca [8 x i8], align 1 ; <[8 x i8]*> [#uses=11]
%cnt = alloca i32, align 4 ; <i32*> [#uses=9]
%vid = alloca i32, align 4 ; <i32*> [#uses=4]
%pid = alloca i32, align 4 ; <i32*> [#uses=4]
%cnt_crc = alloca i32, align 4 ; <i32*> [#uses=6]
%read_buffer = alloca i8*, align 4 ; <i8**> [#uses=4]
%crc_buffer = alloca i8*, align 4 ; <i8**> [#uses=5]
%addr = alloca i32, align 4 ; <i32*> [#uses=11]
%addr_lo = alloca i16, align 2 ; <i16*> [#uses=7]
%addr_hi = alloca i16, align 2 ; <i16*> [#uses=7]
%step = alloca i16, align 2 ; <i16*> [#uses=6]
%crc = alloca i16, align 2 ; <i16*> [#uses=3]
%bank = alloca i8, align 1 ; <i8*> [#uses=4]
%fp = alloca %struct.__sFILE*, align 4 ; <%struct.__sFILE**> [#uses=3]
store i32 %argc, i32* %argc.addr
store i8** %argv, i8*** %argv.addr
store %struct.usb_dev_handle* null, %struct.usb_dev_handle** %handle
%.array = getelementptr [2 x i8]* %rawVid, i32 0, i32 0 ; <i8*> [#uses=1]
store i8 -64, i8* %.array
%.array1 = getelementptr [2 x i8]* %rawVid, i32 0, i32 1 ; <i8*> [#uses=1]
store i8 22, i8* %.array1
%.array2 = getelementptr [2 x i8]* %rawPid, i32 0, i32 0 ; <i8*> [#uses=1]
store i8 -36, i8* %.array2
%.array3 = getelementptr [2 x i8]* %rawPid, i32 0, i32 1 ; <i8*> [#uses=1]
store i8 5, i8* %.array3
%.array4 = getelementptr [11 x i8]* %vendor, i32 0, i32 0 ; <i8*> [#uses=1]
store i8 111, i8* %.array4
%.array5 = getelementptr [11 x i8]* %vendor, i32 0, i32 1 ; <i8*> [#uses=1]
store i8 112, i8* %.array5
%.array6 = getelementptr [11 x i8]* %vendor, i32 0, i32 2 ; <i8*> [#uses=1]
store i8 116, i8* %.array6
%.array7 = getelementptr [11 x i8]* %vendor, i32 0, i32 3 ; <i8*> [#uses=1]
store i8 105, i8* %.array7
%.array8 = getelementptr [11 x i8]* %vendor, i32 0, i32 4 ; <i8*> [#uses=1]
store i8 120, i8* %.array8
%.array9 = getelementptr [11 x i8]* %vendor, i32 0, i32 5 ; <i8*> [#uses=1]
store i8 120, i8* %.array9
%.array10 = getelementptr [11 x i8]* %vendor, i32 0, i32 6 ; <i8*> [#uses=1]
store i8 46, i8* %.array10
%.array11 = getelementptr [11 x i8]* %vendor, i32 0, i32 7 ; <i8*> [#uses=1]
store i8 111, i8* %.array11
%.array12 = getelementptr [11 x i8]* %vendor, i32 0, i32 8 ; <i8*> [#uses=1]
store i8 114, i8* %.array12
%.array13 = getelementptr [11 x i8]* %vendor, i32 0, i32 9 ; <i8*> [#uses=1]
store i8 103, i8* %.array13
%.array14 = getelementptr [11 x i8]* %vendor, i32 0, i32 10 ; <i8*> [#uses=1]
store i8 0, i8* %.array14
%.array15 = getelementptr [8 x i8]* %product, i32 0, i32 0 ; <i8*> [#uses=1]
store i8 83, i8* %.array15
%.array16 = getelementptr [8 x i8]* %product, i32 0, i32 1 ; <i8*> [#uses=1]
store i8 78, i8* %.array16
%.array17 = getelementptr [8 x i8]* %product, i32 0, i32 2 ; <i8*> [#uses=1]
store i8 69, i8* %.array17
%.array18 = getelementptr [8 x i8]* %product, i32 0, i32 3 ; <i8*> [#uses=1]
store i8 83, i8* %.array18
%.array19 = getelementptr [8 x i8]* %product, i32 0, i32 4 ; <i8*> [#uses=1]
store i8 82, i8* %.array19
%.array20 = getelementptr [8 x i8]* %product, i32 0, i32 5 ; <i8*> [#uses=1]
store i8 65, i8* %.array20
%.array21 = getelementptr [8 x i8]* %product, i32 0, i32 6 ; <i8*> [#uses=1]
store i8 77, i8* %.array21
%.array22 = getelementptr [8 x i8]* %product, i32 0, i32 7 ; <i8*> [#uses=1]
store i8 0, i8* %.array22
store i32 0, i32* %cnt_crc
store i32 0, i32* %addr
store i16 0, i16* %addr_lo
store i16 0, i16* %addr_hi
store i16 0, i16* %step
store i16 0, i16* %crc
store i8 0, i8* %bank
call void @usb_init()
%tmp = load i32* %argc.addr ; <i32> [#uses=1]
%cmp = icmp slt i32 %tmp, 2 ; <i1> [#uses=1]
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%tmp23 = load i8*** %argv.addr ; <i8**> [#uses=1]
%arrayidx = getelementptr i8** %tmp23, i32 0 ; <i8**> [#uses=1]
%tmp24 = load i8** %arrayidx ; <i8*> [#uses=1]
call void @usage(i8* %tmp24)
call void @exit(i32 1) noreturn
unreachable
; No predecessors!
br label %if.end
if.end: ; preds = %0, %entry
%arraydecay = getelementptr [2 x i8]* %rawVid, i32 0, i32 0 ; <i8*> [#uses=1]
%arrayidx25 = getelementptr i8* %arraydecay, i32 1 ; <i8*> [#uses=1]
%tmp26 = load i8* %arrayidx25 ; <i8> [#uses=1]
%conv = zext i8 %tmp26 to i32 ; <i32> [#uses=1]
%mul = mul i32 %conv, 256 ; <i32> [#uses=1]
%arraydecay27 = getelementptr [2 x i8]* %rawVid, i32 0, i32 0 ; <i8*> [#uses=1]
%arrayidx28 = getelementptr i8* %arraydecay27, i32 0 ; <i8*> [#uses=1]
%tmp29 = load i8* %arrayidx28 ; <i8> [#uses=1]
%conv30 = zext i8 %tmp29 to i32 ; <i32> [#uses=1]
%add = add i32 %mul, %conv30 ; <i32> [#uses=1]
store i32 %add, i32* %vid
%arraydecay31 = getelementptr [2 x i8]* %rawPid, i32 0, i32 0 ; <i8*> [#uses=1]
%arrayidx32 = getelementptr i8* %arraydecay31, i32 1 ; <i8*> [#uses=1]
%tmp33 = load i8* %arrayidx32 ; <i8> [#uses=1]
%conv34 = zext i8 %tmp33 to i32 ; <i32> [#uses=1]
%mul35 = mul i32 %conv34, 256 ; <i32> [#uses=1]
%arraydecay36 = getelementptr [2 x i8]* %rawPid, i32 0, i32 0 ; <i8*> [#uses=1]
%arrayidx37 = getelementptr i8* %arraydecay36, i32 0 ; <i8*> [#uses=1]
%tmp38 = load i8* %arrayidx37 ; <i8> [#uses=1]
%conv39 = zext i8 %tmp38 to i32 ; <i32> [#uses=1]
%add40 = add i32 %mul35, %conv39 ; <i32> [#uses=1]
store i32 %add40, i32* %pid
%tmp41 = load i32* %vid ; <i32> [#uses=1]
%arraydecay42 = getelementptr [11 x i8]* %vendor, i32 0, i32 0 ; <i8*> [#uses=1]
%tmp43 = load i32* %pid ; <i32> [#uses=1]
%arraydecay44 = getelementptr [8 x i8]* %product, i32 0, i32 0 ; <i8*> [#uses=1]
%call = call i32 @usbOpenDevice(%struct.usb_dev_handle** %handle, i32 %tmp41, i8* %arraydecay42, i32 %tmp43, i8* %arraydecay44, i8* null, %struct.__sFILE* null, %struct.__sFILE* null) ; <i32> [#uses=1]
%cmp45 = icmp ne i32 %call, 0 ; <i1> [#uses=1]
br i1 %cmp45, label %if.then47, label %if.end53
if.then47: ; preds = %if.end
%tmp48 = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%arraydecay49 = getelementptr [8 x i8]* %product, i32 0, i32 0 ; <i8*> [#uses=1]
%tmp50 = load i32* %vid ; <i32> [#uses=1]
%tmp51 = load i32* %pid ; <i32> [#uses=1]
%call52 = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp48, i8* getelementptr ([55 x i8]* @"\01LC7", i32 0, i32 0), i8* %arraydecay49, i32 %tmp50, i32 %tmp51) ; <i32> [#uses=0]
call void @exit(i32 1) noreturn
unreachable
; No predecessors!
br label %if.end53
if.end53: ; preds = %1, %if.end
%arraydecay54 = getelementptr [8 x i8]* %product, i32 0, i32 0 ; <i8*> [#uses=1]
%tmp55 = load i32* %vid ; <i32> [#uses=1]
%tmp56 = load i32* %pid ; <i32> [#uses=1]
%call57 = call i32 (i8*, ...)* @printf(i8* getelementptr ([45 x i8]* @"\01LC8", i32 0, i32 0), i8* %arraydecay54, i32 %tmp55, i32 %tmp56) ; <i32> [#uses=0]
%tmp58 = load i8*** %argv.addr ; <i8**> [#uses=1]
%arrayidx59 = getelementptr i8** %tmp58, i32 1 ; <i8**> [#uses=1]
%tmp60 = load i8** %arrayidx59 ; <i8*> [#uses=1]
%call61 = call i32 @strcasecmp(i8* %tmp60, i8* getelementptr ([7 x i8]* @"\01LC9", i32 0, i32 0)) ; <i32> [#uses=1]
%cmp62 = icmp eq i32 %call61, 0 ; <i1> [#uses=1]
br i1 %cmp62, label %if.then64, label %if.else171
if.then64: ; preds = %if.end53
%tmp65 = load i32* %argc.addr ; <i32> [#uses=1]
%cmp66 = icmp slt i32 %tmp65, 3 ; <i1> [#uses=1]
br i1 %cmp66, label %if.then68, label %if.end72
if.then68: ; preds = %if.then64
%tmp69 = load i8*** %argv.addr ; <i8**> [#uses=1]
%arrayidx70 = getelementptr i8** %tmp69, i32 0 ; <i8**> [#uses=1]
%tmp71 = load i8** %arrayidx70 ; <i8*> [#uses=1]
call void @usage(i8* %tmp71)
call void @exit(i32 1) noreturn
unreachable
; No predecessors!
br label %if.end72
if.end72: ; preds = %2, %if.then64
%tmp73 = load i8*** %argv.addr ; <i8**> [#uses=1]
%arrayidx74 = getelementptr i8** %tmp73, i32 2 ; <i8**> [#uses=1]
%tmp75 = load i8** %arrayidx74 ; <i8*> [#uses=1]
%call76 = call %struct.__sFILE* @fopen(i8* %tmp75, i8* getelementptr ([2 x i8]* @"\01LC10", i32 0, i32 0)) ; <%struct.__sFILE*> [#uses=1]
store %struct.__sFILE* %call76, %struct.__sFILE** %fp
%tmp77 = load %struct.__sFILE** %fp ; <%struct.__sFILE*> [#uses=1]
%cmp78 = icmp eq %struct.__sFILE* %tmp77, null ; <i1> [#uses=1]
br i1 %cmp78, label %if.then80, label %if.end86
if.then80: ; preds = %if.end72
%tmp81 = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%tmp82 = load i8*** %argv.addr ; <i8**> [#uses=1]
%arrayidx83 = getelementptr i8** %tmp82, i32 2 ; <i8**> [#uses=1]
%tmp84 = load i8** %arrayidx83 ; <i8*> [#uses=1]
%call85 = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp81, i8* getelementptr ([21 x i8]* @"\01LC11", i32 0, i32 0), i8* %tmp84) ; <i32> [#uses=0]
call void @exit(i32 1) noreturn
unreachable
; No predecessors!
br label %if.end86
if.end86: ; preds = %3, %if.end72
%call87 = call i8* @malloc(i32 1024) ; <i8*> [#uses=1]
store i8* %call87, i8** %read_buffer
%call88 = call i8* @malloc(i32 32768) ; <i8*> [#uses=1]
store i8* %call88, i8** %crc_buffer
%tmp89 = load i8** %crc_buffer ; <i8*> [#uses=1]
%call90 = call i8* @memset(i8* %tmp89, i32 0, i32 32768) ; <i8*> [#uses=0]
store i32 0, i32* %addr
%tmp91 = load %struct.usb_dev_handle** %handle ; <%struct.usb_dev_handle*> [#uses=1]
%call92 = call i32 @usb_control_msg(%struct.usb_dev_handle* %tmp91, i32 64, i32 0, i32 0, i32 0, i8* null, i32 0, i32 5000) ; <i32> [#uses=0]
br label %while.cond
while.cond: ; preds = %if.end148, %if.end86
%tmp93 = load i8** %read_buffer ; <i8*> [#uses=1]
%tmp94 = load %struct.__sFILE** %fp ; <%struct.__sFILE*> [#uses=1]
%call95 = call i32 @fread(i8* %tmp93, i32 1024, i32 1, %struct.__sFILE* %tmp94) ; <i32> [#uses=2]
store i32 %call95, i32* %cnt
%cmp96 = icmp sgt i32 %call95, 0 ; <i1> [#uses=1]
br i1 %cmp96, label %while.body, label %while.end
while.body: ; preds = %while.cond
store i16 0, i16* %step
br label %for.cond
for.cond: ; preds = %for.inc, %while.body
%tmp98 = load i16* %step ; <i16> [#uses=1]
%conv99 = zext i16 %tmp98 to i32 ; <i32> [#uses=1]
%cmp100 = icmp slt i32 %conv99, 1024 ; <i1> [#uses=1]
br i1 %cmp100, label %for.body, label %for.end
for.body: ; preds = %for.cond
%tmp102 = load i32* %addr ; <i32> [#uses=1]
%and = and i32 %tmp102, 65535 ; <i32> [#uses=1]
%conv103 = trunc i32 %and to i16 ; <i16> [#uses=1]
store i16 %conv103, i16* %addr_lo
%tmp104 = load i32* %addr ; <i32> [#uses=1]
%shr = lshr i32 %tmp104, 16 ; <i32> [#uses=1]
%and105 = and i32 %shr, 255 ; <i32> [#uses=1]
%conv106 = trunc i32 %and105 to i16 ; <i16> [#uses=1]
store i16 %conv106, i16* %addr_hi
%tmp107 = load %struct.usb_dev_handle** %handle ; <%struct.usb_dev_handle*> [#uses=1]
%tmp108 = load i16* %addr_hi ; <i16> [#uses=1]
%conv109 = zext i16 %tmp108 to i32 ; <i32> [#uses=1]
%tmp110 = load i16* %addr_lo ; <i16> [#uses=1]
%conv111 = zext i16 %tmp110 to i32 ; <i32> [#uses=1]
%tmp112 = load i8** %read_buffer ; <i8*> [#uses=1]
%tmp113 = load i16* %step ; <i16> [#uses=1]
%conv114 = zext i16 %tmp113 to i32 ; <i32> [#uses=1]
%add.ptr = getelementptr i8* %tmp112, i32 %conv114 ; <i8*> [#uses=1]
%call115 = call i32 @usb_control_msg(%struct.usb_dev_handle* %tmp107, i32 64, i32 1, i32 %conv109, i32 %conv111, i8* %add.ptr, i32 128, i32 5000) ; <i32> [#uses=0]
%tmp116 = load i32* %addr ; <i32> [#uses=1]
%add117 = add i32 %tmp116, 128 ; <i32> [#uses=1]
store i32 %add117, i32* %addr
br label %for.inc
for.inc: ; preds = %for.body
%tmp118 = load i16* %step ; <i16> [#uses=1]
%conv119 = zext i16 %tmp118 to i32 ; <i32> [#uses=1]
%add120 = add i32 %conv119, 128 ; <i32> [#uses=1]
%conv121 = trunc i32 %add120 to i16 ; <i16> [#uses=1]
store i16 %conv121, i16* %step
br label %for.cond
for.end: ; preds = %for.cond
%tmp122 = load i8** %crc_buffer ; <i8*> [#uses=1]
%tmp123 = load i32* %cnt_crc ; <i32> [#uses=1]
%add.ptr124 = getelementptr i8* %tmp122, i32 %tmp123 ; <i8*> [#uses=1]
%tmp125 = load i8** %read_buffer ; <i8*> [#uses=1]
%call126 = call i8* @memcpy(i8* %add.ptr124, i8* %tmp125, i32 1024) ; <i8*> [#uses=0]
%tmp127 = load i32* %cnt_crc ; <i32> [#uses=1]
%add128 = add i32 %tmp127, 1024 ; <i32> [#uses=1]
store i32 %add128, i32* %cnt_crc
%tmp129 = load i32* %cnt_crc ; <i32> [#uses=1]
%cmp130 = icmp sge i32 %tmp129, 32768 ; <i1> [#uses=1]
br i1 %cmp130, label %if.then132, label %if.end148
if.then132: ; preds = %for.end
%tmp133 = load i8** %crc_buffer ; <i8*> [#uses=1]
%call134 = call zeroext i16 @do_crc(i8* %tmp133, i16 zeroext -32768) ; <i16> [#uses=1]
store i16 %call134, i16* %crc
%tmp135 = load i32* %addr ; <i32> [#uses=1]
%tmp136 = load i8* %bank ; <i8> [#uses=1]
%conv137 = zext i8 %tmp136 to i32 ; <i32> [#uses=1]
%tmp138 = load i16* %addr_hi ; <i16> [#uses=1]
%conv139 = zext i16 %tmp138 to i32 ; <i32> [#uses=1]
%tmp140 = load i16* %addr_lo ; <i16> [#uses=1]
%conv141 = zext i16 %tmp140 to i32 ; <i32> [#uses=1]
%tmp142 = load i16* %crc ; <i16> [#uses=1]
%conv143 = zext i16 %tmp142 to i32 ; <i32> [#uses=1]
%call144 = call i32 (i8*, ...)* @printf(i8* getelementptr ([70 x i8]* @"\01LC12", i32 0, i32 0), i32 %tmp135, i32 %conv137, i32 %conv139, i32 %conv141, i32 %conv143) ; <i32> [#uses=0]
%tmp145 = load i8** %crc_buffer ; <i8*> [#uses=1]
%call146 = call i8* @memset(i8* %tmp145, i32 0, i32 32768) ; <i8*> [#uses=0]
%tmp147 = load i8* %bank ; <i8> [#uses=1]
%inc = add i8 %tmp147, 1 ; <i8> [#uses=1]
store i8 %inc, i8* %bank
store i32 0, i32* %cnt_crc
br label %if.end148
if.end148: ; preds = %if.then132, %for.end
br label %while.cond
while.end: ; preds = %while.cond
%tmp149 = load %struct.usb_dev_handle** %handle ; <%struct.usb_dev_handle*> [#uses=1]
%tmp150 = load i16* %addr_hi ; <i16> [#uses=1]
%conv151 = zext i16 %tmp150 to i32 ; <i32> [#uses=1]
%tmp152 = load i16* %addr_lo ; <i16> [#uses=1]
%conv153 = zext i16 %tmp152 to i32 ; <i32> [#uses=1]
%call154 = call i32 @usb_control_msg(%struct.usb_dev_handle* %tmp149, i32 64, i32 4, i32 %conv151, i32 %conv153, i8* null, i32 0, i32 5000) ; <i32> [#uses=1]
store i32 %call154, i32* %cnt
%tmp155 = load i32* %cnt ; <i32> [#uses=1]
%cmp156 = icmp slt i32 %tmp155, 1 ; <i1> [#uses=1]
br i1 %cmp156, label %if.then158, label %if.end170
if.then158: ; preds = %while.end
%tmp159 = load i32* %cnt ; <i32> [#uses=1]
%cmp160 = icmp slt i32 %tmp159, 0 ; <i1> [#uses=1]
br i1 %cmp160, label %if.then162, label %if.else
if.then162: ; preds = %if.then158
%tmp163 = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%call164 = call i8* @usb_strerror() ; <i8*> [#uses=1]
%call165 = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp163, i8* getelementptr ([15 x i8]* @"\01LC13", i32 0, i32 0), i8* %call164) ; <i32> [#uses=0]
br label %if.end169
if.else: ; preds = %if.then158
%tmp166 = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%tmp167 = load i32* %cnt ; <i32> [#uses=1]
%call168 = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp166, i8* getelementptr ([25 x i8]* @"\01LC14", i32 0, i32 0), i32 %tmp167) ; <i32> [#uses=0]
br label %if.end169
if.end169: ; preds = %if.else, %if.then162
br label %if.end170
if.end170: ; preds = %if.end169, %while.end
br label %if.end216
if.else171: ; preds = %if.end53
%tmp172 = load i8*** %argv.addr ; <i8**> [#uses=1]
%arrayidx173 = getelementptr i8** %tmp172, i32 1 ; <i8**> [#uses=1]
%tmp174 = load i8** %arrayidx173 ; <i8*> [#uses=1]
%call175 = call i32 @strcasecmp(i8* %tmp174, i8* getelementptr ([4 x i8]* @"\01LC15", i32 0, i32 0)) ; <i32> [#uses=1]
%cmp176 = icmp eq i32 %call175, 0 ; <i1> [#uses=1]
br i1 %cmp176, label %if.then178, label %if.else211
if.then178: ; preds = %if.else171
store i32 0, i32* %addr
%tmp179 = load i32* %addr ; <i32> [#uses=1]
%and180 = and i32 %tmp179, 65535 ; <i32> [#uses=1]
%conv181 = trunc i32 %and180 to i16 ; <i16> [#uses=1]
store i16 %conv181, i16* %addr_lo
%tmp182 = load i32* %addr ; <i32> [#uses=1]
%shr183 = lshr i32 %tmp182, 16 ; <i32> [#uses=1]
%and184 = and i32 %shr183, 255 ; <i32> [#uses=1]
%conv185 = trunc i32 %and184 to i16 ; <i16> [#uses=1]
store i16 %conv185, i16* %addr_hi
%tmp186 = load i32* %addr ; <i32> [#uses=1]
%call187 = call i32 (i8*, ...)* @printf(i8* getelementptr ([30 x i8]* @"\01LC16", i32 0, i32 0), i32 %tmp186) ; <i32> [#uses=0]
%tmp188 = load %struct.usb_dev_handle** %handle ; <%struct.usb_dev_handle*> [#uses=1]
%tmp189 = load i16* %addr_hi ; <i16> [#uses=1]
%conv190 = zext i16 %tmp189 to i32 ; <i32> [#uses=1]
%tmp191 = load i16* %addr_lo ; <i16> [#uses=1]
%conv192 = zext i16 %tmp191 to i32 ; <i32> [#uses=1]
%call193 = call i32 @usb_control_msg(%struct.usb_dev_handle* %tmp188, i32 64, i32 5, i32 %conv190, i32 %conv192, i8* null, i32 8192, i32 5000) ; <i32> [#uses=1]
store i32 %call193, i32* %cnt
%tmp194 = load i32* %cnt ; <i32> [#uses=1]
%cmp195 = icmp slt i32 %tmp194, 1 ; <i1> [#uses=1]
br i1 %cmp195, label %if.then197, label %if.end210
if.then197: ; preds = %if.then178
%tmp198 = load i32* %cnt ; <i32> [#uses=1]
%cmp199 = icmp slt i32 %tmp198, 0 ; <i1> [#uses=1]
br i1 %cmp199, label %if.then201, label %if.else205
if.then201: ; preds = %if.then197
%tmp202 = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%call203 = call i8* @usb_strerror() ; <i8*> [#uses=1]
%call204 = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp202, i8* getelementptr ([15 x i8]* @"\01LC13", i32 0, i32 0), i8* %call203) ; <i32> [#uses=0]
br label %if.end209
if.else205: ; preds = %if.then197
%tmp206 = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%tmp207 = load i32* %cnt ; <i32> [#uses=1]
%call208 = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp206, i8* getelementptr ([25 x i8]* @"\01LC14", i32 0, i32 0), i32 %tmp207) ; <i32> [#uses=0]
br label %if.end209
if.end209: ; preds = %if.else205, %if.then201
br label %if.end210
if.end210: ; preds = %if.end209, %if.then178
br label %if.end215
if.else211: ; preds = %if.else171
%tmp212 = load i8*** %argv.addr ; <i8**> [#uses=1]
%arrayidx213 = getelementptr i8** %tmp212, i32 0 ; <i8**> [#uses=1]
%tmp214 = load i8** %arrayidx213 ; <i8*> [#uses=1]
call void @usage(i8* %tmp214)
call void @exit(i32 1) noreturn
unreachable
; No predecessors!
br label %if.end215
if.end215: ; preds = %4, %if.end210
br label %if.end216
if.end216: ; preds = %if.end215, %if.end170
%tmp217 = load %struct.usb_dev_handle** %handle ; <%struct.usb_dev_handle*> [#uses=1]
%call218 = call i32 @usb_close(%struct.usb_dev_handle* %tmp217) ; <i32> [#uses=0]
store i32 0, i32* %retval
%5 = load i32* %retval ; <i32> [#uses=1]
ret i32 %5
}
declare void @usb_init()
define internal void @usage(i8* %name) nounwind {
entry:
%name.addr = alloca i8* ; <i8**> [#uses=2]
store i8* %name, i8** %name.addr
%tmp = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%call = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp, i8* getelementptr ([8 x i8]* @"\01LC17", i32 0, i32 0)) ; <i32> [#uses=0]
%tmp1 = load %struct.__sFILE** @__stderrp ; <%struct.__sFILE*> [#uses=1]
%tmp2 = load i8** %name.addr ; <i8*> [#uses=1]
%call3 = call i32 (%struct.__sFILE*, i8*, ...)* @fprintf(%struct.__sFILE* %tmp1, i8* getelementptr ([31 x i8]* @"\01LC18", i32 0, i32 0), i8* %tmp2) ; <i32> [#uses=0]
ret void
}
declare void @exit(i32) noreturn
declare i32 @usbOpenDevice(%struct.usb_dev_handle**, i32, i8*, i32, i8*, i8*, %struct.__sFILE*, %struct.__sFILE*)
declare i32 @fprintf(%struct.__sFILE*, i8*, ...)
declare i32 @strcasecmp(i8*, i8*)
declare %struct.__sFILE* @fopen(i8*, i8*)
declare i8* @malloc(i32)
declare i8* @memset(i8*, i32, i32)
declare i32 @usb_control_msg(%struct.usb_dev_handle*, i32, i32, i32, i32, i8*, i32, i32)
declare i32 @fread(i8*, i32, i32, %struct.__sFILE*)
declare i8* @memcpy(i8*, i8*, i32)
declare i8* @usb_strerror()
declare i32 @usb_close(%struct.usb_dev_handle*)

57
avr/usbload/config.h
View File

@@ -1,57 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __CONFIH_H__
#define __CONFIH_H__
#define DEBUG 1
#define DEBUG_USB 2
#define DEBUG_USB_TRANS 4
#define DEBUG_SRAM 8
#define DEBUG_SRAM_RAW 16
#define DEBUG_SREG 32
#define DEBUG_CRC 64
#define DEBUG_SHM 128
#define REQ_STATUS_IDLE 0x01
#define REQ_STATUS_UPLOAD 0x02
#define REQ_STATUS_BULK_UPLOAD 0x03
#define REQ_STATUS_BULK_NEXT 0x04
#define REQ_STATUS_CRC 0x05
#define REQ_STATUS_SNES 0x06
#define REQ_STATUS_AVR 0x07
#define USB_MAX_TRANS 0xff
#define USB_CRC_CHECK 0x01
#define TRANSFER_BUFFER_SIZE 0x000
#define FORMAT_BUFFER_LEN 0x080
#define RECEIVE_BUF_LEN 0x030
#define HW_VERSION "2.6"
#define SW_VERSION "1.0"
#define DO_CRC_CHECK_LOADER 0
#define DO_CRC_CHECK 0
#define DO_SHM_SCRATCHPAD 0
#define DO_SHM 0
#define DO_TIMER 0
#endif

106
avr/usbload/crc.c
View File

@@ -1,106 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include "crc.h"
#include "uart.h"
#include "config.h"
#include "sram.h"
#include "debug.h"
#include "info.h"
extern FILE uart_stdout;
uint16_t crc_xmodem_update(uint16_t crc, uint8_t data)
{
int i;
crc = crc ^ ((uint16_t) data << 8);
for (i = 0; i < 8; i++) {
if (crc & 0x8000)
crc = (crc << 1) ^ 0x1021;
else
crc <<= 1;
}
return crc;
}
uint16_t do_crc(uint8_t * data, uint16_t size)
{
uint16_t crc = 0;
uint16_t i;
for (i = 0; i < size; i++) {
crc = crc_xmodem_update(crc, data[i]);
}
return crc;
}
uint16_t do_crc_update(uint16_t crc, uint8_t * data, uint16_t size)
{
uint16_t i;
for (i = 0; i < size; i++)
crc = crc_xmodem_update(crc, data[i]);
return crc;
}
uint16_t crc_check_bulk_memory(uint32_t bottom_addr, uint32_t top_addr, uint32_t bank_size)
{
uint16_t crc = 0;
uint32_t addr = 0;
uint8_t req_bank = 0;
sram_bulk_read_start(bottom_addr);
debug_P(DEBUG_CRC, PSTR("crc_check_bulk_memory: bottom_addr=0x%08lx top_addr=0x%08lx\n"),
bottom_addr,top_addr);
for (addr = bottom_addr; addr < top_addr; addr++) {
if (addr && ((addr % bank_size) == 0)) {
debug_P(DEBUG_CRC, PSTR("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n"),
req_bank,addr,crc);
req_bank++;
crc = 0;
}
crc = crc_xmodem_update(crc, sram_bulk_read());
sram_bulk_read_next();
}
if (addr % 0x8000 == 0)
debug_P(DEBUG_CRC, PSTR("crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n"),
req_bank,addr,crc);
sram_bulk_read_end();
return crc;
}
uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer)
{
uint16_t crc = 0;
uint32_t addr;
for (addr = start_addr; addr < start_addr + size; addr += TRANSFER_BUFFER_SIZE) {
sram_bulk_copy_into_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
}
return crc;
}

35
avr/usbload/crc.h
View File

@@ -1,35 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __CRC_H__
#define __CRC_H__
#include <stdlib.h>
#include <stdint.h>
uint16_t crc_xmodem_update(uint16_t crc, uint8_t data);
uint16_t do_crc(uint8_t * data,uint16_t size);
uint16_t do_crc_update(uint16_t crc,uint8_t * data,uint16_t size);
uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer);
uint16_t crc_check_bulk_memory(uint32_t bottom_addr, uint32_t bank_size,uint32_t top_addr);
#endif

54
avr/usbload/debug.c
View File

@@ -1,54 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include <avr/pgmspace.h>
#include "debug.h"
#include "uart.h"
#include "config.h"
extern FILE uart_stdout;
extern int debug_level; /* the higher, the more messages... */
#ifndef NO_INFO
uint8_t buffer_debug[FORMAT_BUFFER_LEN];
#endif
#if defined(NO_DEBUG) && defined(__GNUC__)
#else
void debug_P(int level, PGM_P format, ...) {
#ifdef NO_DEBUG
#else
va_list args;
if (!(debug_level & level))
return;
strlcpy_P((char*)buffer_debug,format,FORMAT_BUFFER_LEN);
va_start(args, format);
vprintf((char*)buffer_debug, args);
va_end(args);
#endif
}
#endif

55
avr/usbload/debug.h
View File

@@ -1,55 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __DEBUG_H__
#define __DEBUG_H__
#include <stdlib.h>
#include <stdint.h>
#include <stdarg.h>
#include <avr/pgmspace.h>
#if defined(NO_DEBUG) && defined(__GNUC__)
/* gcc's cpp has extensions; it allows for macros with a variable number of
arguments. We use this extension here to preprocess pmesg away. */
#define debug(level, format, args...) ((void)0)
#else
void debug(int level, char *format, ...);
/* print a message, if it is considered significant enough.
Adapted from [K&R2], p. 174 */
#endif
#if defined(NO_DEBUG) && defined(__GNUC__)
/* gcc's cpp has extensions; it allows for macros with a variable number of
arguments. We use this extension here to preprocess pmesg away. */
#define debug_P(level, format, args...) ((void)0)
#else
void debug_P(int level, PGM_P format, ...);
/* print a message, if it is considered significant enough.
Adapted from [K&R2], p. 174 */
#endif
#endif /* DEBUG_H */

83
avr/usbload/dump.c
View File

@@ -1,83 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include "debug.h"
#include "info.h"
#include "uart.h"
#include "sram.h"
#include "dump.h"
extern FILE uart_stdout;
void dump_packet(uint32_t addr, uint32_t len, uint8_t * packet)
{
uint16_t i,j;
uint16_t sum = 0;
uint8_t clear = 0;
for (i = 0; i < len; i += 16) {
sum = 0;
for (j = 0; j < 16; j++) {
sum += packet[i + j];
}
if (!sum) {
clear = 1;
continue;
}
if (clear) {
info_P(PSTR("*\n"));
clear = 0;
}
info_P(PSTR("%08lx:"), addr + i);
for (j = 0; j < 16; j++) {
info_P(PSTR(" %02x"), packet[i + j]);
}
info_P(PSTR(" |"));
for (j = 0; j < 16; j++) {
if (packet[i + j] >= 33 && packet[i + j] <= 126)
info_P(PSTR("%c"), packet[i + j]);
else
info_P(PSTR("."));
}
info_P(PSTR("|\n"));
}
}
void dump_memory(uint32_t bottom_addr, uint32_t top_addr)
{
uint32_t addr;
uint8_t byte;
sram_bulk_read_start(bottom_addr);
for ( addr = bottom_addr; addr < top_addr; addr++) {
if (addr%0x10 == 0)
info_P(PSTR("\n%08lx:"), addr);
byte = sram_bulk_read();
sram_bulk_read_next();
info_P(PSTR(" %02x"), byte);
}
info_P(PSTR("\n"));
sram_bulk_read_end();
}

34
avr/usbload/dump.h
View File

@@ -1,34 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __DUMP_H__
#define __DUMP_H__
#include <stdlib.h>
#include <stdint.h>
#include <stdarg.h>
void dump_memory(uint32_t bottom_addr, uint32_t top_addr);
void dump_packet(uint32_t addr,uint32_t len,uint8_t *packet);
#endif

50
avr/usbload/fifo.c
View File

@@ -1,50 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include "fifo.h"
void fifo_init(fifo_t * f, uint8_t * buffer, const uint8_t size)
{
f->count = 0;
f->pread = f->pwrite = buffer;
f->read2end = f->write2end = f->size = size;
}
uint8_t fifo_put(fifo_t * f, const uint8_t data)
{
return _inline_fifo_put(f, data);
}
uint8_t fifo_get_wait(fifo_t * f)
{
while (!f->count);
return _inline_fifo_get(f);
}
int fifo_get_nowait(fifo_t * f)
{
if (!f->count)
return -1;
return (int) _inline_fifo_get(f);
}

88
avr/usbload/fifo.h
View File

@@ -1,88 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __FIFO_H__
#define __FIFO_H__
#include <avr/io.h>
#include <avr/interrupt.h>
typedef struct {
uint8_t volatile count; // # Zeichen im Puffer
uint8_t size; // Puffer-Größe
uint8_t *pread; // Lesezeiger
uint8_t *pwrite; // Schreibzeiger
uint8_t read2end, write2end; // # Zeichen bis zum Überlauf Lese-/Schreibzeiger
} fifo_t;
extern void fifo_init(fifo_t *, uint8_t * buf, const uint8_t size);
extern uint8_t fifo_put(fifo_t *, const uint8_t data);
extern uint8_t fifo_get_wait(fifo_t *);
extern int fifo_get_nowait(fifo_t *);
static inline uint8_t _inline_fifo_put(fifo_t * f, const uint8_t data)
{
if (f->count >= f->size)
return 0;
uint8_t *pwrite = f->pwrite;
*(pwrite++) = data;
uint8_t write2end = f->write2end;
if (--write2end == 0) {
write2end = f->size;
pwrite -= write2end;
}
f->write2end = write2end;
f->pwrite = pwrite;
uint8_t sreg = SREG;
cli();
f->count++;
SREG = sreg;
return 1;
}
static inline uint8_t _inline_fifo_get(fifo_t * f)
{
uint8_t *pread = f->pread;
uint8_t data = *(pread++);
uint8_t read2end = f->read2end;
if (--read2end == 0) {
read2end = f->size;
pread -= read2end;
}
f->pread = pread;
f->read2end = read2end;
uint8_t sreg = SREG;
cli();
f->count--;
SREG = sreg;
return data;
}
#endif /* _FIFO_H_ */

85
avr/usbload/inflate.c
View File

@@ -1,85 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 09/22/2009
* Author: jannis@harderweb.de
*
* =====================================================================================
*/
#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include "neginf/neginf.h"
#include "inflate.h"
#include "assert.h"
#include "ringbuffer.h"
char inflate_done = 0;
char *mem_ref;
int addr_ref = 0;
int cnt_hit = 0;
int cnt = 0;
void inflate_init()
{
neginf_init(0);
mem_ref = (char*)malloc(2<<15);
addr_ref = 0;
rb_init();
}
void inflate_flush()
{
rb_flush();
FILE *file;
printf("write out_ref.smc\n");
file = fopen("out_ref.smc","w");
fwrite(mem_ref,2<<15,1,file);
fclose(file);
printf("cnt=%i cnt_hit=%i\n",cnt,cnt_hit);
}
void neginf_cb_completed()
{
inflate_done = 1;
}
void neginf_cb_seq_byte(nbyte byte)
{
mem_ref[addr_ref++] = byte;
rb_put(byte);
}
void neginf_cb_copy(nsize from, nsize to, nint length)
{
int i;
cnt++;
if ((to - from) < ( 1024 * 2 ) ){
cnt_hit++;
}
printf("neginf_cb_copy from=0x%06x to=0x%06x dist=%i len=%i\n",(int)from, (int)to, (int)(to - from), (int)length);
for (i=0; i<length;i++){
mem_ref[to+i] = mem_ref[from+i];
}
addr_ref = to + length;
}

28
avr/usbload/inflate.h
View File

@@ -1,28 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 09/22/2009
* Author: jannis@harderweb.de
*
* =====================================================================================
*/
#ifndef __INFLATE_H__
#define __INFLATE_H__
extern char inflate_done;
#endif

44
avr/usbload/inflate_test.c
View File

@@ -1,44 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdio.h>
#include "neginf/neginf.h"
#include "inflate.h"
#include "loader_test.h"
extern const char _rom[];
extern char inflate_done;
int main(int argc, char **argv)
{
int j;
char c;
inflate_init();
for (j=0; j< ROM_ZIP_SIZE; j++){
neginf_process_byte(_rom[j]);
}
while(!inflate_done)
neginf_process_byte(0x00);
inflate_flush();
return 0;
}

56
avr/usbload/info.c
View File

@@ -1,56 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include <avr/pgmspace.h>
#include "info.h"
#include "uart.h"
#include "config.h"
extern FILE uart_stdout;
#ifndef NO_INFO
uint8_t buffer_info[FORMAT_BUFFER_LEN];
#endif
#if defined(NO_INFO) && defined(__GNUC__)
#define info(format, args...) ((void)0)
#else
void info_P(PGM_P format, ...) {
#ifdef NO_INFO
#else
strlcpy_P((char*)buffer_info,format,FORMAT_BUFFER_LEN);
va_list args;
va_start(args, format);
vprintf((char*)buffer_info, args);
va_end(args);
#endif
}
#endif

53
avr/usbload/info.h
View File

@@ -1,53 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __INFO_H__
#define __INFO_H__
#include <stdlib.h>
#include <stdint.h>
#include <stdarg.h>
#include <avr/pgmspace.h>
#if defined(NO_INFO) && defined(__GNUC__)
/* gcc's cpp has extensions; it allows for macros with a variable number of
arguments. We use this extension here to preprocess pmesg away. */
#define info(format, args...) ((void)0)
#else
void info(char *format, ...);
/* print a message, if it is considered significant enough.
Adapted from [K&R2], p. 174 */
#endif
#if defined(NO_INFO) && defined(__GNUC__)
/* gcc's cpp has extensions; it allows for macros with a variable number of
arguments. We use this extension here to preprocess pmesg away. */
#define info_P(format, args...) ((void)0)
#else
void info_P(PGM_P format, ...);
/* print a message, if it is considered significant enough.
Adapted from [K&R2], p. 174 */
#endif
#endif

76
avr/usbload/irq.c
View File

@@ -1,76 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdint.h>
#include <stdio.h>
#include <avr/io.h>
#include <avr/interrupt.h> /* for sei() */
#include <avr/wdt.h>
#include "usbdrv.h"
#include "oddebug.h" /* This is also an example for using debug
* macros */
#include "debug.h"
#include "info.h"
#include "sram.h"
#include "system.h"
extern system_t system;
void (*jump_to_app) (void) = 0x0000;
void irq_init(){
cli();
PCMSK3 |=(1<<PCINT27);
PCICR |= (1<<PCIE3);
sei();
system.reset_irq = RESET_IRQ_ON;
}
void irq_stop(){
cli();
PCMSK3 &=~(1<<PCINT27);
sei();
system.reset_irq = RESET_IRQ_OFF;
}
void leave_application(void)
{
cli();
usbDeviceDisconnect();
system.avr_reset_count++;
wdt_enable(WDTO_15MS);
while (1);
}
ISR (SIG_PIN_CHANGE3)
{
if (snes_reset_test()){
info_P(PSTR("Catch SNES reset button\n"));
info_P(PSTR("Set watchdog...\n"));
leave_application();
}
}

28
avr/usbload/irq.h
View File

@@ -1,28 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __IRQ_H__
#define __IRQ_H__
void irq_init();
void irq_stop();
void leave_application(void);
#endif

2118
avr/usbload/loader.c
View File

File diff suppressed because it is too large Load Diff

14
avr/usbload/loader.h
View File

@@ -1,14 +0,0 @@
/*
File: qd16boot02.smc
Time: Sat, 24 Oct 2009 19:05:36
*/
#ifndef __FIFO_H__
#define __FIFO_H__
#define ROM_ZIP_SIZE 33654
#define ROM_BUFFER_CNT 2
#define ROM_BUFFER_SIZE01 32767
#define ROM_BUFFER_SIZE02 887
#endif

2229
avr/usbload/loader_test.c
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File diff suppressed because it is too large Load Diff

7
avr/usbload/loader_test.h
View File

@@ -1,7 +0,0 @@
#ifndef __FIFO_H__
#define __FIFO_H__
#define ROM_ZIP_SIZE 35543
#endif

324
avr/usbload/main.c
View File

@@ -1,324 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <stdlib.h>
#include <avr/pgmspace.h>
#include <avr/eeprom.h>
#include <string.h>
#include "usbdrv.h"
#include "oddebug.h"
#include "config.h"
#include "requests.h"
#include "uart.h"
#include "sram.h"
#include "debug.h"
#include "info.h"
#include "dump.h"
#include "crc.h"
#include "usb_bulk.h"
#include "timer.h"
#include "watchdog.h"
#include "rle.h"
#include "loader.h"
#include "command.h"
#include "shared_memory.h"
#include "irq.h"
#include "pwm.h"
#include "testing.h"
#include "shell.h"
#include "system.h"
#ifndef NO_DEBUG
extern FILE uart_stdout;
#endif
extern system_t system;
uint8_t debug_level = (DEBUG | DEBUG_CRC);
usb_transaction_t usb_trans;
usbMsgLen_t usbFunctionSetup(uchar data[8])
{
usbRequest_t *rq = (void *) data;
uint8_t ret_len = 0;
if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
usb_trans.req_bank = 0;
usb_trans.rx_remaining = 0;
debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_INIT: %i %i\n"), rq->wValue.word,
rq->wIndex.word);
usb_trans.req_bank_size = (uint32_t) (1L << rq->wValue.word);
usb_trans.req_bank_cnt = rq->wIndex.word;
usb_trans.req_addr_end = (uint32_t) usb_trans.req_bank_size * usb_trans.req_bank_cnt;
usb_trans.req_percent = 0;
usb_trans.req_percent_last = 0;
usb_trans.sync_errors = 0;
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
usb_trans.req_bank_size, usb_trans.req_bank_cnt, usb_trans.req_addr_end);
shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_START, 0);
shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, usb_trans.req_bank_cnt);
#if DO_TIMER
if (usb_trans.req_addr == 0x000000) {
#ifndef NO_DEBUG
timer_start();
#endif
}
#endif
/*
* -------------------------------------------------------------------------
*/
} else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
usb_trans.req_addr = rq->wValue.word;
usb_trans.req_addr = usb_trans.req_addr << 16;
usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
usb_trans.rx_remaining = rq->wLength.word;
if (usb_trans.req_addr && usb_trans.req_addr % usb_trans.req_bank_size == 0) {
#if DO_TIMER
#ifndef NO_DEBUG
#ifdef FLT_DEBUG
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
usb_trans.req_bank, usb_trans.req_addr, timer_stop());
#else
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n"),
usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
#endif
timer_start();
#endif
#endif
usb_trans.req_bank++;
} else {
sram_bulk_write_start(usb_trans.req_addr);
}
ret_len = USB_MAX_TRANS;
/*
* -------------------------------------------------------------------------
*/
} else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
usb_trans.req_addr = rq->wValue.word;
usb_trans.req_addr = usb_trans.req_addr << 16;
usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
usb_trans.rx_remaining = rq->wLength.word;
#if DO_SHM
usb_trans.req_percent = (uint32_t)( 100 * usb_trans.req_addr ) / usb_trans.req_addr_end;
if (usb_trans.req_percent!=usb_trans.req_percent_last){
shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, usb_trans.req_percent);
}
usb_trans.req_percent_last = usb_trans.req_percent;
shared_memory_scratchpad_region_save_helper(usb_trans.req_addr);
#endif
if (usb_trans.req_addr && (usb_trans.req_addr % usb_trans.req_bank_size) == 0) {
#if DO_TIMER
#ifndef NO_DEBUG
#ifdef FLT_DEBUG
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
usb_trans.req_bank, usb_trans.req_addr, timer_stop());
#else
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n"),
usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
#endif
timer_start();
#endif
#endif
usb_trans.req_bank++;
#if DO_SHM
shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, usb_trans.req_bank);
#endif
}
ret_len = USB_MAX_TRANS;
/*
* -------------------------------------------------------------------------
*/
} else if (rq->bRequest == USB_BULK_UPLOAD_END) {
if (usb_trans.req_state != REQ_STATUS_BULK_UPLOAD) {
debug_P(DEBUG_USB,
PSTR("USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n"));
return 0;
}
debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_END:\n"));
usb_trans.req_state = REQ_STATUS_IDLE;
sram_bulk_write_end();
#if DO_SHM
shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_END, 0);
#endif
ret_len = 0;
/*
* -------------------------------------------------------------------------
*/
} else if (rq->bRequest == USB_CRC) {
usb_trans.req_addr = rq->wValue.word;
usb_trans.req_addr = usb_trans.req_addr << 16;
usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
debug_P(DEBUG_USB, PSTR("USB_CRC: addr=0x%08lx \n"), usb_trans.req_addr);
crc_check_bulk_memory(0x000000, usb_trans.req_addr, usb_trans.req_bank_size);
ret_len = 0;
/*
* -------------------------------------------------------------------------
*/
} else if (rq->bRequest == USB_MODE_AVR) {
usb_trans.req_state = REQ_STATUS_AVR;
debug_P(DEBUG_USB, PSTR("USB_MODE_AVR:\n"));
ret_len = 0;
/*
* -------------------------------------------------------------------------
*/
} else if (rq->bRequest == USB_AVR_RESET) {
debug_P(DEBUG_USB, PSTR("USB_AVR_RESET:\n"));
soft_reset();
ret_len = 0;
/*
* -------------------------------------------------------------------------
*/
} else if (rq->bRequest == USB_SET_LAODER) {
usb_trans.loader_enabled = rq->wValue.word;
ret_len = 0;
}
usbMsgPtr = usb_trans.rx_buffer;
return ret_len;
}
/*
* -------------------------------------------------------------------------
*/
void globals_init(){
memset(&usb_trans,0,sizeof(usb_transaction_t));
usb_trans.req_addr = 0;
usb_trans.req_addr_end = 0;
usb_trans.req_state = REQ_STATUS_IDLE;
usb_trans.rx_remaining = 0;
usb_trans.tx_remaining = 0;
usb_trans.sync_errors = 0;
usb_trans.loader_enabled = 1;
}
int main(void)
{
#ifndef NO_DEBUG
uart_init();
stdout = &uart_stdout;
banner();
#endif
shared_memory_init();
system_init();
sram_init();
//pwm_init();
irq_init();
boot_startup_rom(50);
globals_init();
//pwm_stop();
usbInit();
usb_connect();
sei();
while (1) {
system_set_bus_avr();
system_set_wr_disable();
info_P(PSTR("USB poll\n"));
while (usb_trans.req_state != REQ_STATUS_SNES) {
usbPoll();
#ifdef DO_SHELL
#ifndef NO_DEBUG
shell_run();
#endif
#endif
}
#if DO_SHM
shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
#endif
#if DO_SHM_SCRATCHPAD
shared_memory_scratchpad_region_tx_restore();
shared_memory_scratchpad_region_rx_restore();
#endif
#if DO_CRC_CHECK
info_P(PSTR("-->CRC Check\n"));
crc_check_bulk_memory(0x000000, usb_trans.req_bank_size * usb_trans.req_bank_cnt, usb_trans.req_bank_size);
#endif
system_set_rom_mode(&usb_trans);
system_set_wr_disable();
system_set_bus_snes();
system_send_snes_reset();
irq_stop();
/*
info_P(PSTR("-->Switch TO SNES\n"));
set_rom_mode();
snes_wr_disable();
info_P(PSTR("Disable SNES WR\n"));
snes_bus_active();
info_P(PSTR("Activate SNES bus\n"));
irq_stop();
send_reset();
*/
info_P(PSTR("Poll USB\n"));
while ((usb_trans.req_state != REQ_STATUS_AVR)) {
usbPoll();
#ifdef DO_SHELL
#ifndef NO_DEBUG
shell_run();
#endif
#endif
}
//info_P(PSTR("-->Switch TO AVR\n"));
shared_memory_init();
if(usb_trans.loader_enabled) {
boot_startup_rom(500);
} else {
system_set_bus_avr();
system_send_snes_reset();
//avr_bus_active();
//send_reset();
}
irq_init();
}
return 0;
}

30
avr/usbload/memmory.txt
View File

@@ -1,30 +0,0 @@
Loader Version 1
DEBUG:
Bootloader: 4096
CODE: 24984
RAM: 742
LOADER: 31091
NO_DEBUG:
Bootloader: 4096
CODE: 7532
RAM: 344
LOADER: 31091
Loader Version 2
DEBUG:
Bootloader: 4096
CODE: 24984
RAM: 742
LOADER: 58046
NO_DEBUG:
Bootloader: 4096
CODE: 7532
RAM: 344
LOADER: 58046

466
avr/usbload/neginf/neginf.c
View File

@@ -1,466 +0,0 @@
/*
* neginf.c
* neginf -- embedded inflate lib
*
* inflate routines
*/
#include <assert.h>
#include <stdlib.h>
#include <stdio.h>
#include "neginf.h"
#include "neginf_priv.h"
typedef void(*mode_fun)() ;
static neginf_state state;
static const mode_fun mode_tab[mode_count] = {
&await_block,
&raw_block_begin,
&raw_block_begin2,
&raw_block,
&fixed_block_begin,
&huff_block,
&huff_len_addbits,
&huff_dist,
&huff_dist_addbits,
&dynamic_block_begin,
&dynamic_read_lc,
&dynamic_read_lit_len,
&dynamic_read_dist
};
void neginf_init(nsize start_pos)
{
state.queue_size = 0;
state.mode = mode_await_block;
state.last_block = 0;
#ifdef NEGINF_POS_TRACKING
state.output_pos = start_pos;
#endif
}
void neginf_process_byte(nbyte byte)
{
assert(state.queue_size <= 16);
state.input_queue |= (byte << state.queue_size);
state.queue_size += 8;
while(state.queue_size >= 16)
{
//printf("qsize=%i mode=%i\n",state.queue_size,state.mode);
mode_tab[state.mode]();
}
}
#ifdef NEGINF_POS_TRACKING
nsize neginf_output_position()
{
return state.output_pos;
}
#endif
nint lookahead()
{
//printf("lookahead\n");
return state.input_queue;
}
void consume(ntiny amount)
{
//printf("consume %i %i\n",state.queue_size,amount);
assert(state.queue_size > amount);
state.input_queue >>= amount;
state.queue_size -= amount;
}
void await_block()
{
//printf("wait block\n");
if(state.last_block)
{
neginf_cb_completed();
consume(16);
}
else
{
nint la = lookahead();
state.last_block = la & 1;
consume(3);
switch(la & 6)
{
case 0: // 00 uncompressed
consume((state.queue_size) & 7); // align to byte
state.mode = mode_raw_block_begin;
break;
case 2: // 01 fixed huffman
state.mode = mode_fixed_block_begin;
break;
case 4: // 10 dynamic huffman
state.mode = mode_dynamic_block_begin;
break;
default:
assert(0);
}
}
}
void raw_block_begin()
{
//printf("raw block begin\n");
state.raw_size = lookahead() & 0xFFFF; // size of raw block
consume(16);
state.mode = mode_raw_block_begin2;
}
void raw_block_begin2()
{
//printf("raw block begin2\n");
consume(16); // we ignore the inverted size
state.mode = mode_raw_block;
}
void raw_block()
{
//printf("raw block\n");
if(state.raw_size == 0)
{
state.mode = mode_await_block;
}
else
{
state.raw_size--;
neginf_cb_seq_byte(lookahead() & 0xFF);
#ifdef NEGINF_POS_TRACKING
state.output_pos++;
#endif
consume(8);
}
}
void fixed_block_begin()
{
//printf("fixed block begin\n");
nint i = 0;
for(; i < 144; i++)
state.lit_len_lengths[i] = 8;
for(; i < 256; i++)
state.lit_len_lengths[i] = 9;
for(; i < 280; i++)
state.lit_len_lengths[i] = 7;
for(; i < 288; i++)
state.lit_len_lengths[i] = 8;
ntiny j;
for(j = 0; i < 32; i++)
state.dist_lengths[i] = 5;
compute_begins();
state.mode = mode_huff_block;
}
void huff_block()
{
//printf("huff block\n");
nint code = lit_len_read();
if(code == 256)
{
state.mode = mode_await_block;
}
else if(code < 256)
{
neginf_cb_seq_byte(code);
#ifdef NEGINF_POS_TRACKING
state.output_pos++;
#endif
}
else
{
state.code = code;
state.mode = mode_huff_len_addbits;
}
}
void huff_len_addbits()
{
//printf("huff len addbits\n");
nint len;
nint code = state.code;
nint la = lookahead();
if(code < 265)
len = code - 257 + 3;
else if(code < 269)
{
len = (code - 265) * 2 + 11 + (la & 1);
consume(1);
}
else if(code < 273)
{
len = (code - 269) * 4 + 19 + (la & 3);
consume(2);
}
else if(code < 277)
{
len = (code - 273) * 8 + 35 + (la & 7);
consume(3);
}
else if(code < 281)
{
len = (code - 277) * 16 + 67 + (la & 15);
consume(4);
}
else if(code < 285)
{
len = (code - 281) * 32 + 131 + (la & 31);
consume(5);
}
else
{
len = 258;
}
state.match_len = len;
state.mode = mode_huff_dist;
}
void huff_dist()
{
//printf("huff dist\n");
state.tcode = dist_read();
state.mode = mode_huff_dist_addbits;
}
void huff_dist_addbits()
{
//printf("huff addbits\n");
nint dist;
ntiny code = state.tcode;
if(code < 4)
{
dist = code+1;
}
else if(code > 29)
{
assert(0);
}
else
{
nint la = lookahead();
ntiny len = (code - 2) / 2;
dist = ((2 + (code & 1)) << len) + 1 + (((1 << len) - 1) & la);
consume(len);
}
neginf_cb_rel_copy(dist, state.match_len);
#ifdef NEGINF_POS_TRACKING
state.output_pos += state.match_len;
#endif
state.mode = mode_huff_block;
}
void dynamic_block_begin()
{
nint j;
ntiny i;
//printf("dynamic block begin\n");
for(j = 0; j < 288; j++)
state.lit_len_lengths[j] = 0;
for(i = 0; i < 32; i++)
state.dist_lengths[i] = 0;
for(i = 0; i < 19; i++)
state.hc_lengths[i] = 0;
nint la = lookahead();
state.hlit = (la & 31) + 257;
state.hdist = ((la >> 5) & 31) + 1;
state.hclen = ((la >> 10) & 15) + 4;
state.torder = 0;
consume(5+5+4);
state.mode = mode_dynamic_read_lc;
}
void dynamic_read_lc()
{
//printf("dynamic read lc\n");
if(state.hclen == 0)
{
compute_begin(state.hc_lengths, state.hc_begins, 19);
state.mode = mode_dynamic_read_lit_len;
state.order = 0;
}
else
{
static const ntiny order[19] = {
16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15
};
ntiny i = lookahead() & 7;
state.hc_lengths[order[state.torder]] = i;
consume(3);
state.torder++;
state.hclen--;
}
}
void dynamic_read_lit_len()
{
//printf("dynamic read lit len\n");
if(state.hlit == 0)
{
state.mode = mode_dynamic_read_dist;
state.order = 0;
}
else
{
state.hlit -= lc_read(state.lit_len_lengths);
}
}
void dynamic_read_dist()
{
//printf("dynamic read dist\n");
if(state.hdist == 0)
{
compute_begins();
state.mode = mode_huff_block;
}
else
{
state.hdist -= lc_read(state.dist_lengths);
}
}
ntiny lc_read(ntiny * lenghts)
{
//printf("read lc\n");
ntiny code = huff_read(state.hc_lengths, state.hc_begins, 19);
// this reads 7 bits max so we still have 9 bits left in the buffer
if(code < 16)
{
lenghts[state.order] = code;
state.order++;
return 1;
}
else if(code == 16)
{
ntiny i;
ntiny copy = (lookahead() & 3) + 3;
consume(2);
for(i = 0; i < copy; i++)
lenghts[state.order + i] = lenghts[state.order - 1];
state.order += copy;
return copy;
}
else
{
ntiny fill;
ntiny i;
if(code == 17)
{
fill = (lookahead() & 7) + 3;
consume(3);
}
else
{
fill = (lookahead() & 127) + 11;
consume(7);
}
for(i = 0; i < fill; i++)
{
lenghts[state.order] = 0;
state.order++;
}
return fill;
}
}
void compute_begins()
{
//printf("compute begins\n");
compute_begin(state.lit_len_lengths, state.lit_len_begins, 288);
compute_begin(state.dist_lengths, state.dist_begins, 32);
}
void compute_begin(ntiny * lengths, nint * begins, nint size)
{
ntiny j;
nint i;
//printf("compute begin\n");
for(j = 0; j < 14; j++)
begins[j] = 0;
for(i = 0; i < size; i++)
{
nint len = lengths[i];
if(len != 0 && len != 15)
begins[len-1] += 1 << (15 - len);
}
nint acc = 0;
for(j = 0; j < 14; j++)
{
nint val = begins[j];
acc += val;
begins[j] = acc;
}
}
nint lit_len_read()
{
//printf("lit len read\n");
return huff_read(state.lit_len_lengths, state.lit_len_begins, 288);
}
nint dist_read()
{
//printf("dist read\n");
return huff_read(state.dist_lengths, state.dist_begins, 32);
}
nint huff_read(ntiny * lenghts, nint * begins, nint size)
{
//printf("huff read\n");
nint code = 0;
ntiny i;
for(i = 1; i < 16; i++)
{
code |= (lookahead() & 1) << (15-i);
consume(1);
if(i == 15 || code < begins[i-1])
break;
}
code -= begins[i-2];
code >>= (15-i);
nint j;
for(j = 0; j < size; j++)
{
if(lenghts[j] == i)
{
if(code == 0)
return j;
code--;
}
}
//assert(0);
return 0; // silent warning
}
#ifndef NEGINF_USE_SEQ_WRITES
void neginf_cb_seq_byte(nbyte byte)
{
neginf_cb_byte(state.output_pos, byte);
}
#endif
#ifndef NEGINF_USE_REL_COPY
void neginf_cb_rel_copy(nint distance, nint length)
{
neginf_cb_copy(state.output_pos - distance, state.output_pos, length);
}
#endif

43
avr/usbload/neginf/neginf.h
View File

@@ -1,43 +0,0 @@
/*
* neginf.h
* neginf -- embedded inflate lib
*
* public header file
*/
#ifndef NEGINF_H
#define NEGINF_H
#include "neginf_conf.h"
#if defined(NEGINF_USE_SEQ_WRITES) && defined(NEGINF_USE_REL_COPY)
#else
#ifndef NEGINF_POS_TRACKING
#define NEGINF_POS_TRACKING
#endif
#endif
void neginf_init(nsize start_pos);
void neginf_process_byte(nbyte byte);
#ifdef NEGINF_POS_TRACKING
nsize neginf_output_position();
#endif
// callbacks
#ifdef NEGINF_USE_SEQ_WRITES
void neginf_cb_seq_byte(nbyte byte);
#else
void neginf_cb_byte(nsize pos, nbyte byte);
#endif
#ifdef NEGINF_USE_REL_COPY
void neginf_cb_rel_copy(nint distance, nint length);
#else
void neginf_cb_copy(nsize from, nsize to, nint length);
#endif
void neginf_cb_completed();
#endif

48
avr/usbload/neginf/neginf_conf.h
View File

@@ -1,48 +0,0 @@
/*
* neginf_conf.h
* neginf -- embedded inflate lib
*
* configuration header file
*/
#ifndef NEGINF_CONF_H
#define NEGINF_CONF_H
#include <stddef.h>
#include <stdint.h>
#define NEGINF_USE_SEQ_WRITES
//#define NEGINF_USE_REL_COPY
//#define NEGINF_POS_TRACKING
//#define NEGINF_8BIT
#define NEGINF_PACKED_STATE
#ifdef NEGINF_8BIT
typedef char nbool;
typedef uint8_t nbyte;
typedef uint8_t ntiny;
typedef uint16_t nint;
typedef uint32_t nbuf;
typedef uint32_t nsize;
#else
typedef int nbool; // boolean
typedef uint8_t nbyte; // has to be exaclty 8 bit, unsigned
typedef unsigned int ntiny; // has to be at least 8 bit, unsigned
typedef unsigned int nint; // has to be at least 16 bit, unsigned
typedef unsigned int nbuf; // has to be at least 24 bit, unsigned
typedef size_t nsize; // has be at least 24 bit, unsigned
#endif
#endif

102
avr/usbload/neginf/neginf_priv.h
View File

@@ -1,102 +0,0 @@
/*
* neginf_priv.h
* neginf -- embedded inflate lib
*
* internal header file
*/
#ifndef NEGINF_PRIV_H
#define NEGINF_PRIV_H
typedef struct neginf_state_s neginf_state;
struct neginf_state_s {
ntiny queue_size; // 0 .. 24
ntiny mode;
nbool last_block;
#ifdef NEGINF_POS_TRACKING
nsize output_pos;
#endif
// can be left uninitialized
nbuf input_queue; // three input bytes
ntiny raw_size;
ntiny tcode;
nint code;
nint match_len;
nint order;
ntiny torder;
nint hlit;
ntiny hdist;
ntiny hclen;
ntiny lit_len_lengths[288];
nint lit_len_begins[14];
ntiny dist_lengths[32];
nint dist_begins[14];
ntiny hc_lengths[19];
nint hc_begins[14];
// what could be saved by limiting this to 7
// will be lost due to the extra code i guess
}
#ifdef NEGINF_PACKED_STATE
__attribute__((__packed__))
#endif
;
enum neginf_mode {
mode_await_block = 0,
mode_raw_block_begin,
mode_raw_block_begin2,
mode_raw_block,
mode_fixed_block_begin,
mode_huff_block,
mode_huff_len_addbits,
mode_huff_dist,
mode_huff_dist_addbits,
mode_dynamic_block_begin,
mode_dynamic_read_lc,
mode_dynamic_read_lit_len,
mode_dynamic_read_dist,
mode_count
};
static void await_block();
static void raw_block_begin();
static void raw_block_begin2();
static void raw_block();
static void fixed_block_begin();
static void huff_block();
static void huff_len_addbits();
static void huff_dist();
static void huff_dist_addbits();
static void dynamic_block_begin();
static void dynamic_read_lc();
static void dynamic_read_lit_len();
static void dynamic_read_dist();
static void compute_begins();
static void compute_begin(ntiny * lengths, nint * begins, nint size);
static nint lit_len_read();
static nint dist_read();
static nint huff_read(ntiny * lengths, nint * begins, nint size);
static ntiny lc_read(ntiny * lengths);
static nint lookahead();
static void consume(ntiny amount);
#ifndef NEGINF_USE_SEQ_WRITES
static void neginf_cb_seq_byte(nbyte byte);
#endif
#ifndef NEGINF_USE_REL_COPY
void neginf_cb_rel_copy(nint distance, nint length);
#endif
#endif

104
avr/usbload/pwm.c
View File

@@ -1,104 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdint.h>
#include <string.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include "pwm.h"
#include "debug.h"
#include "info.h"
#include "sram.h"
#define PWM_SINE_MAX 64
#define PWM_OVERFLOW_MAX 1024
#if 0
uint8_t pwm_sine_table[] = {
0x7f,0x8b,0x97,0xa4,0xaf,0xbb,0xc5,0xcf,0xd9,0xe1,0xe8,0xef,0xf4,0xf8,0xfb,0xfd,
0xfd,0xfd,0xfb,0xf8,0xf3,0xee,0xe7,0xe0,0xd7,0xce,0xc4,0xb9,0xae,0xa2,0x96,0x89,
0x7e,0x71,0x65,0x59,0x4d,0x42,0x37,0x2d,0x24,0x1c,0x15,0x0f,0x09,0x05,0x03,0x01,
0x01,0x01,0x03,0x07,0x0b,0x11,0x17,0x1f,0x28,0x31,0x3b,0x46,0x52,0x5e,0x6a,0x76
};
volatile uint8_t pwm_setting;
volatile uint16_t pwm_overflow;
volatile uint8_t pwm_idx;
volatile uint16_t pwm_overflow_max;
ISR(TIMER2_COMPA_vect) {
static uint8_t pwm_cnt=0;
OCR2A += (uint16_t)T_PWM;
if (pwm_setting> pwm_cnt)
led_pwm_on();
else
led_pwm_off();
if (pwm_cnt==(uint8_t)(PWM_STEPS-1))
pwm_cnt=0;
else
pwm_cnt++;
if (pwm_overflow_max == pwm_overflow++ ){
pwm_setting = pwm_sine_table[pwm_idx++];
pwm_overflow = 0;
if (PWM_SINE_MAX == pwm_idx)
pwm_idx = 0;
}
}
void pwm_speed(uint16_t val) {
pwm_overflow_max = val;
}
void pwm_speed_slow(uint16_t val) {
pwm_overflow_max = PWM_OVERFLOW_MAX * 2 ;
}
void pwm_speed_fast(uint16_t val) {
pwm_overflow_max = PWM_OVERFLOW_MAX / 2;
}
void pwm_speed_normal(uint16_t val) {
pwm_overflow_max = PWM_OVERFLOW_MAX;
}
void pwm_set(uint8_t val) {
pwm_setting = val;
}
void pwm_stop(void) {
while(pwm_setting!=0xfd);
TIMSK2 = 0;
}
void pwm_init(void) {
pwm_overflow_max = PWM_OVERFLOW_MAX;
pwm_setting = 0x7f;
pwm_overflow = 0;
//cli();
TCCR2B = 1;
TIMSK2 |= (1<<OCIE2A);
sei();
}
#endif

37
avr/usbload/pwm.h
View File

@@ -1,37 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __PWM_H__
#define __PWM_H__
#define F_PWM 100 // PWM-Frequenz in Hz
#define PWM_STEPS 256 // PWM-Schritte pro Zyklus(1..256)
#define T_PWM (F_CPU/(F_PWM*PWM_STEPS)) // Systemtakte pro PWM-Takt
#if (T_PWM<(93+5))
#error T_PWM zu klein, F_CPU muss vergrösst werden oder F_PWM oder PWM_STEPS verkleinert werden
#endif
void pwm_init(void);
void pwm_stop(void);
#endif

60
avr/usbload/requests.h
View File

@@ -1,60 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __REQUESTS_H__
#define __REQUESTS_H__
#define USB_UPLOAD_INIT 0
#define USB_UPLOAD_ADDR 1
#define USB_DOWNLOAD_INIT 2
#define USB_DOWNLOAD_ADDR 3
#define USB_CRC 4
#define USB_CRC_ADDR 5
#define USB_BULK_UPLOAD_INIT 6
#define USB_BULK_UPLOAD_ADDR 7
#define USB_BULK_UPLOAD_NEXT 8
#define USB_BULK_UPLOAD_END 9
#define USB_MODE_SNES 10
#define USB_MODE_AVR 11
#define USB_AVR_RESET 12
#define USB_SET_LAODER 13
typedef struct usb_transaction_t {
uint32_t req_addr;
uint32_t req_addr_end;
uint8_t req_bank;
uint32_t req_bank_size;
uint16_t req_bank_cnt;
uint8_t req_percent;
uint8_t req_percent_last;
uint8_t req_state;
uint8_t rx_remaining;
uint8_t tx_remaining ;
uint16_t sync_errors;
uint8_t tx_buffer[32];
uint8_t rx_buffer[8];
uint8_t loader_enabled;
} usb_transaction_t;
#endif /* __REQUESTS_H_INCLUDED__ */

126
avr/usbload/ringbuffer.c
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@@ -1,126 +0,0 @@
// AT90USB/ringbuffer.c
// Simple Ring-Buffer (FIFO) for Elements of type char
// S. Salewski, 19-MAR-2007
/*
t-> o
o <-w
x
x <-r
b-> x
*/
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include <assert.h>
#include "ringbuffer.h"
#define memory_size 65536
#define t &buf[ringbuffer_size - 1]
#define b &buf[0]
char buf[ringbuffer_size];
int rb_count;
char *memory;
int pos_mem;
int pos_head;
//char *t = &buf[ringbuffer_size - 1];
//char *b = &buf[0];
char *r; // position from where we can read (if rb_count > 0)
char *w; // next free position (if rb_count < ringbuffer_size))
char *o; // output pointer
void rb_init()
{
r = b;
w = b;
o = b;
rb_count = 0;
memory = (char*)malloc(memory_size);
pos_mem = 0;
pos_head = 0;
}
void rb_dump()
{
int i;
printf("b=0x%02x t=0x%02x w=0x%02x o=0x%02x\n",*b,*t,*w,*o);
for (i=0; i<ringbuffer_size; i++)
printf("%02i 0x%02x\n",i, buf[i]);
}
void rb_flush(){
FILE *file;
while(!rb_isempty()){
memory[pos_mem++] = rb_get();
}
printf("write out.smc\n");
file = fopen("out.smc","w");
fwrite(memory,memory_size,1,file);
fclose(file);
}
char rb_get(void)
{
rb_count--;
if (r > t)
r = b;
return *r++;
}
char rb_read(int pos)
{
char *p;
printf("rb_read: pos_mem=%06i pos_head=%06i pos=%06i\n",
pos_mem, pos_head,pos);
if ( pos_head - pos > ringbuffer_size){
printf("rb_read: memory[%i]=0x%02x \n",
pos,
memory[pos]);
return memory[pos];
}
if (w - index >= b)
p = w - index;
else
p = b + (b - ( w - index ));
return *p;
}
void rb_copy(int from,int to,int len){
int i;
char c;
for (i = from; i< to; i++){
c = rb_read(i);
rb_put(c);
}
}
void rb_put(char el)
{
pos_head++;
rb_count++;
if ( rb_count > ringbuffer_size){
rb_dump();
memory[pos_mem++]=*o++;
if (o > t){
o = b;
}
}
printf("rb_count=%i pos_head=0x%06x add_mem=0x%06x\n",rb_count, pos_head,pos_mem);
if (w > t){
w = b;
}
*w++ = el;
}

19
avr/usbload/ringbuffer.h
View File

@@ -1,19 +0,0 @@
#ifndef _RING_BUFFER_H_
#define _RING_BUFFER_H_
#define ringbuffer_size 8
extern int rb_count;
#define rb_free() (ringbuffer_size - rb_count)
#define rb_isfull() (rb_count == ringbuffer_size)
#define rb_isempty() (rb_count == 0)
void rb_init(void);
void rb_put(char el);
char rb_get(void);
void rb_flush(void);
#endif

106
avr/usbload/rle.c
View File

@@ -1,106 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <avr/io.h>
#include <stdlib.h>
#include <stdio.h>
#include <avr/pgmspace.h> /* required by usbdrv.h */
#include <util/delay.h> /* for _delay_ms() */
#include <avr/interrupt.h> /* for sei() */
#include "sram.h"
#include "debug.h"
#include "info.h"
#define RUNCHAR 0x90
#if 0
uint32_t rle_decode(PGM_VOID_P in_addr, int32_t in_len, uint32_t out_addr)
{
uint8_t in_byte, in_repeat, last_byte;
info_P(PSTR("RLE decode len=%li addr=0x%08lx\n"), in_len, out_addr);
last_byte = 0;
sram_bulk_write_start(out_addr);
#define INBYTE(b) \
do { \
if ( --in_len < 0 ) { \
return 1; \
} \
cli();\
b = pgm_read_byte((PGM_VOID_P)in_addr++); \
sei();\
} while(0)
#define OUTBYTE(b) \
do { \
sram_bulk_write(b);\
sram_bulk_write_next();\
out_addr++;\
} while(0)
INBYTE(in_byte);
if (in_byte == RUNCHAR) {
INBYTE(in_repeat);
if (in_repeat != 0) {
info_P(PSTR("Orphaned RLE code at start\n"));
return 1;
}
OUTBYTE(RUNCHAR);
} else {
OUTBYTE(in_byte);
}
while (in_len > 0) {
INBYTE(in_byte);
if (in_len % 1024 == 0)
info_P(PSTR("."));
if (in_byte == RUNCHAR) {
INBYTE(in_repeat);
if (in_repeat == 0) {
/*
* Just an escaped RUNCHAR value
*/
OUTBYTE(RUNCHAR);
} else {
/*
* Pick up value and output a sequence of it
*/
in_byte = last_byte; // ;out_data[-1];
while (--in_repeat > 0)
OUTBYTE(in_byte);
}
} else {
/*
* Normal byte
*/
OUTBYTE(in_byte);
}
last_byte = in_byte;
}
sram_bulk_write_end();
info_P(PSTR("\nDone addr=0x%08lx\n"), out_addr);
return out_addr;
}
#endif

28
avr/usbload/rle.h
View File

@@ -1,28 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __RLE_H__
#define __RLE_H__
#include <avr/pgmspace.h>
uint32_t rle_decode(PGM_VOID_P in_addr, uint32_t in_len, uint32_t out_addr);
#endif

345
avr/usbload/shared_memory.c
View File

@@ -1,345 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include <util/delay.h>
#include "shared_memory.h"
#include "config.h"
#include "sram.h"
#include "debug.h"
#include "dump.h"
#include "info.h"
#include "crc.h"
uint8_t irq_addr_lo;
uint8_t irq_addr_hi;
uint8_t scratchpad_state;
uint8_t scratchpad_cmd;
uint8_t scratchpad_payload;
uint8_t scratchpad_region_rx[SHARED_MEM_RX_LOC_SIZE];
uint8_t scratchpad_region_tx[SHARED_MEM_TX_LOC_SIZE];
uint8_t scratchpad_locked_rx = 1;
uint8_t scratchpad_locked_tx = 1;
void shared_memory_init(void){
scratchpad_locked_rx = 1;
scratchpad_locked_tx = 1;
}
uint8_t shared_memory_scratchpad_region_save_helper(uint32_t addr){
#if DO_SHM_SCRATCHPAD
if(addr > (SHARED_MEM_TX_LOC_STATE + (SHARED_MEM_TX_LOC_SIZE )) && scratchpad_locked_tx){
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_save_helper: open tx addr=0x%06lx\n"),addr);
shared_memory_scratchpad_region_tx_save();
return 0;
}
if(addr > (SHARED_MEM_RX_LOC_STATE + ( SHARED_MEM_RX_LOC_SIZE )) && scratchpad_locked_rx){
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_save_helper: open rx addr=0x%06lx\n"),addr);
shared_memory_scratchpad_region_rx_save();
return 0;
}
#endif
return 1;
}
void shared_memory_scratchpad_region_tx_save()
{
sram_bulk_addr_save();
#if SHARED_SCRATCHPAD_CRC
uint16_t crc;
crc = crc_check_bulk_memory((uint32_t)SHARED_MEM_TX_LOC_STATE,
(uint32_t)(SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE), 0x8000);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
#endif
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: unlock\n"));
sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_TX_LOC_STATE,scratchpad_region_tx,
(uint32_t)SHARED_MEM_TX_LOC_SIZE);
scratchpad_locked_tx = 0;
#if SHARED_SCRATCHPAD_CRC
do_crc_update(0, scratchpad_region_tx,SHARED_MEM_TX_LOC_SIZE);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_save: crc=%x\n"),crc);
#endif
#if SHARED_SCRATCHPAD_DUMP
dump_packet(SHARED_MEM_TX_LOC_STATE, SHARED_MEM_TX_LOC_SIZE, scratchpad_region_tx);
dump_memory(SHARED_MEM_TX_LOC_STATE, SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE);
#endif
sram_bulk_addr_restore();
}
void shared_memory_scratchpad_region_rx_save()
{
sram_bulk_addr_save();
#if SHARED_SCRATCHPAD_CRC
uint16_t crc;
crc = crc_check_bulk_memory((uint32_t)SHARED_MEM_RX_LOC_STATE,
(uint32_t)(SHARED_MEM_RX_LOC_STATE + SHARED_MEM_RX_LOC_SIZE), 0x8000);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_save: crc=%x\n"),crc);
#endif
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_save: unlock\n"));
sram_bulk_copy_into_buffer((uint32_t)SHARED_MEM_RX_LOC_STATE,scratchpad_region_rx,
(uint32_t)SHARED_MEM_RX_LOC_SIZE);
scratchpad_locked_rx = 0;
#if SHARED_SCRATCHPAD_CRC
do_crc_update(0, scratchpad_region_rx,SHARED_MEM_RX_LOC_SIZE);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_save: crc=%x\n"),crc);
#endif
#if SHARED_SCRATCHPAD_DUMP
dump_packet(SHARED_MEM_RX_LOC_STATE, SHARED_MEM_RX_LOC_SIZE, scratchpad_region_rx);
dump_memory(SHARED_MEM_RX_LOC_STATE, SHARED_MEM_RX_LOC_STATE + SHARED_MEM_RX_LOC_SIZE);
#endif
sram_bulk_addr_restore();
}
void shared_memory_scratchpad_region_tx_restore()
{
if (scratchpad_locked_tx)
return;
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_restore: lock\n"));
#if SHARED_SCRATCHPAD_DUMP
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_restore: memory\n"));
dump_memory(SHARED_MEM_TX_LOC_STATE, SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE);
#endif
sram_bulk_copy_from_buffer((uint32_t)SHARED_MEM_TX_LOC_STATE,scratchpad_region_tx,
(uint32_t)SHARED_MEM_TX_LOC_SIZE);
scratchpad_locked_tx = 1;
#if SHARED_SCRATCHPAD_DUMP
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_restore: buffer\n"));
dump_packet(SHARED_MEM_TX_LOC_STATE, SHARED_MEM_TX_LOC_SIZE, scratchpad_region_tx);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_restore: memory\n"));
dump_memory(SHARED_MEM_TX_LOC_STATE, SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE);
#endif
#if SHARED_SCRATCHPAD_CRC
uint16_t crc;
crc = crc_check_bulk_memory((uint32_t)SHARED_MEM_TX_LOC_STATE,
(uint32_t)(SHARED_MEM_TX_LOC_STATE + SHARED_MEM_TX_LOC_SIZE), 0x8000);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_tx_restore: crc=%x\n"),crc);
#endif
}
void shared_memory_scratchpad_region_rx_restore()
{
if (scratchpad_locked_rx)
return;
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_restore: lock\n"));
#if SHARED_SCRATCHPAD_DUMP
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_restore: memory\n"));
dump_memory(SHARED_MEM_RX_LOC_STATE - 0x10, SHARED_MEM_RX_LOC_STATE + SHARED_MEM_RX_LOC_SIZE);
#endif
sram_bulk_copy_from_buffer((uint32_t)SHARED_MEM_RX_LOC_STATE,scratchpad_region_rx,
(uint32_t)SHARED_MEM_RX_LOC_SIZE);
scratchpad_locked_rx = 1;
#if SHARED_SCRATCHPAD_DUMP
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_restore: buffer\n"));
dump_packet(SHARED_MEM_RX_LOC_STATE, SHARED_MEM_RX_LOC_SIZE, scratchpad_region_rx);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_restore: memory\n"));
dump_memory(SHARED_MEM_RX_LOC_STATE - 0x10, SHARED_MEM_RX_LOC_STATE + SHARED_MEM_RX_LOC_SIZE);
#endif
#if SHARED_SCRATCHPAD_CRC
uint16_t crc;
crc = crc_check_bulk_memory((uint32_t)SHARED_MEM_RX_LOC_STATE,
(uint32_t)(SHARED_MEM_RX_LOC_STATE + SHARED_MEM_RX_LOC_SIZE), 0x8000);
debug_P(DEBUG_SHM, PSTR("shared_memory_scratchpad_region_rx_restore: crc=%x\n"),crc);
#endif
}
void shared_memory_scratchpad_tx_save()
{
scratchpad_state = sram_read(SHARED_MEM_TX_LOC_STATE);
scratchpad_cmd = sram_read(SHARED_MEM_TX_LOC_CMD);
scratchpad_payload = sram_read(SHARED_MEM_TX_LOC_PAYLOAD);
}
void shared_memory_scratchpad_tx_restore()
{
sram_write(SHARED_MEM_TX_LOC_STATE, scratchpad_state);
sram_write(SHARED_MEM_TX_LOC_CMD, scratchpad_cmd);
sram_write(SHARED_MEM_TX_LOC_PAYLOAD, scratchpad_payload);
}
void shared_memory_irq_hook()
{
irq_addr_lo = sram_read(SHARED_IRQ_LOC_LO);
irq_addr_hi = sram_read(SHARED_IRQ_LOC_HI);
sram_write(SHARED_IRQ_HANDLER_LO, 0);
sram_write(SHARED_IRQ_HANDLER_HI, 0);
}
void shared_memory_irq_restore()
{
sram_write(SHARED_IRQ_LOC_LO, irq_addr_lo);
sram_write(SHARED_IRQ_LOC_HI, irq_addr_hi);
}
void shared_memory_write(uint8_t cmd, uint8_t value)
{
#if DO_SHM
#if DO_SHM_SCRATCHPAD
if (scratchpad_locked_tx){
debug_P(DEBUG_SHM, PSTR("shared_memory_write: locked_tx\n"));
return;
}
#endif
debug_P(DEBUG_SHM, PSTR("shared_memory_write: 0x%04x=0x%02x 0x%04x=0x%02x \n"),
SHARED_MEM_TX_LOC_CMD, cmd, SHARED_MEM_TX_LOC_PAYLOAD, value);
sram_bulk_addr_save();
#if (DO_SHM_SCRATCHPAD==0)
shared_memory_scratchpad_tx_save();
#endif
#if SHARED_MEM_SWITCH_IRQ
shared_memory_irq_hook();
#endif
sram_write(SHARED_MEM_TX_LOC_STATE, SHARED_MEM_TX_SNES_ACK);
sram_write(SHARED_MEM_TX_LOC_CMD, cmd);
sram_write(SHARED_MEM_TX_LOC_PAYLOAD, value);
snes_hirom();
snes_wr_disable();
snes_bus_active();
#if SHARED_MEM_SWITCH_IRQ
snes_irq_on();
snes_irq_lo();
_delay_us(20);
snes_irq_hi();
snes_irq_off();
#else
_delay_ms(SHARED_MEM_SWITCH_DELAY);
#endif
avr_bus_active();
snes_irq_lo();
snes_irq_off();
snes_lorom();
snes_wr_disable();
#if (DO_SHM_SCRATCHPAD==0)
shared_memory_scratchpad_tx_restore();
#endif
#if SHARED_MEM_SWITCH_IRQ
shared_memory_irq_restore();
#endif
sram_bulk_addr_restore();
#endif
}
void shared_memory_yield()
{
snes_hirom();
snes_wr_disable();
snes_bus_active();
_delay_ms(SHARED_MEM_SWITCH_DELAY);
avr_bus_active();
snes_lorom();
snes_wr_disable();
}
int shared_memory_read(uint8_t *cmd, uint8_t *len,uint8_t *buffer)
{
uint8_t state;
#if DO_SHM
#if DO_SHM_SCRATCHPAD
if (scratchpad_locked_rx){
debug_P(DEBUG_SHM, PSTR("shared_memory_write: locked_tx\n"));
return 1;
}
#endif
sram_bulk_addr_save();
state = sram_read(SHARED_MEM_RX_LOC_STATE);
if (state != SHARED_MEM_RX_AVR_ACK){
sram_bulk_addr_restore();
return 1;
}
*cmd = sram_read(SHARED_MEM_RX_LOC_CMD);
*len = sram_read(SHARED_MEM_RX_LOC_LEN);
debug_P(DEBUG_SHM, PSTR("shared_memory_read: 0x%04x=0x%02x 0x%04x=0x%02x \n"),
SHARED_MEM_RX_LOC_CMD, *cmd, SHARED_MEM_RX_LOC_LEN, *len);
sram_bulk_copy_into_buffer(SHARED_MEM_RX_LOC_PAYLOAD,buffer, *len);
sram_write(SHARED_MEM_RX_LOC_STATE, SHARED_MEM_RX_AVR_RTS);
snes_hirom();
snes_wr_disable();
snes_bus_active();
#if SHARED_MEM_SWITCH_IRQ
snes_irq_on();
snes_irq_lo();
_delay_us(20);
snes_irq_hi();
snes_irq_off();
#else
_delay_ms(SHARED_MEM_SWITCH_DELAY);
#endif
avr_bus_active();
snes_lorom();
snes_wr_disable();
sram_bulk_addr_restore();
#endif
return 0;
}

76
avr/usbload/shared_memory.h
View File

@@ -1,76 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __SHARED_MEMORY_H__
#define __SHARED_MEMORY_H__
#define SHARED_MEM_SWITCH_IRQ 0
#define SHARED_MEM_SWITCH_DELAY 20
#define SHARED_MEM_TX_SNES_ACK 0xa5
#define SHARED_MEM_TX_SNES_RTS 0x5a
#define SHARED_MEM_TX_CMD_BANK_COUNT 0x00
#define SHARED_MEM_TX_CMD_BANK_CURRENT 0x01
#define SHARED_MEM_TX_CMD_UPLOAD_START 0x03
#define SHARED_MEM_TX_CMD_UPLOAD_END 0x04
#define SHARED_MEM_TX_CMD_UPLOAD_PROGESS 0x05
#define SHARED_MEM_TX_CMD_TERMINATE 0x06
#define SHARED_MEM_TX_LOC_STATE 0x000000
#define SHARED_MEM_TX_LOC_SIZE 0x000040
#define SHARED_MEM_TX_LOC_CMD 0x000001
#define SHARED_MEM_TX_LOC_PAYLOAD 0x000002
#define SHARED_MEM_RX_AVR_ACK 0xa5
#define SHARED_MEM_RX_AVR_RTS 0x5a
#define SHARED_MEM_RX_CMD_PRINFT 0x00
#define SHARED_MEM_RX_CMD_FILESEL 0x01
#define SHARED_MEM_RX_LOC_STATE 0x001000
#define SHARED_MEM_RX_LOC_SIZE 0x000040
#define SHARED_MEM_RX_LOC_CMD 0x001001
#define SHARED_MEM_RX_LOC_LEN 0x001002
#define SHARED_MEM_RX_LOC_PAYLOAD 0x001003
#define SHARED_IRQ_LOC_LO 0x00fffe
#define SHARED_IRQ_LOC_HI 0x00ffff
/* Use COP IRQ LOC for hooked IRQ handler */
#define SHARED_IRQ_HANDLER_LO 0x0ffe4
#define SHARED_IRQ_HANDLER_HI 0x0ffe5
#define SHARED_SCRATCHPAD_DUMP 0
#define SHARED_SCRATCHPAD_CRC 0
void shared_memory_init(void);
uint8_t shared_memory_scratchpad_region_save_helper(uint32_t addr);
void shared_memory_scratchpad_region_tx_save();
void shared_memory_scratchpad_region_tx_restore();
void shared_memory_scratchpad_region_rx_save();
void shared_memory_scratchpad_region_rx_restore();
void shared_memory_write(uint8_t cmd, uint8_t value);
int shared_memory_read(uint8_t *cmd, uint8_t *len,uint8_t *buffer);
#endif

487
avr/usbload/shell.c
View File

@@ -1,487 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdint.h>
#include <string.h>
#include <avr/io.h>
#include <stdlib.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <avr/pgmspace.h>
#include <avr/eeprom.h>
#include "pwm.h"
#include "debug.h"
#include "info.h"
#include "sram.h"
#include "util.h"
#include "uart.h"
#include "dump.h"
#include "irq.h"
#include "config.h"
#include "crc.h"
#include "command.h"
#include "shared_memory.h"
#include "system.h"
extern system_t system;
uint8_t command_buf[RECEIVE_BUF_LEN];
uint8_t recv_buf[RECEIVE_BUF_LEN];
volatile uint8_t recv_counter = 0;
volatile uint8_t cr = 0;
uint8_t *token_ptr;
#ifdef DO_SHELL
uint8_t *get_token(void)
{
uint8_t *p = token_ptr;
while (*p == ' ')
p++;
if (*p == '\0')
return NULL;
token_ptr = p;
do {
token_ptr++;
if (*token_ptr == ' ' || *token_ptr == '\n' || *token_ptr == '\r') {
*token_ptr++ = '\0';
break;
}
} while (*token_ptr != ' ' && *token_ptr != '\n' && *token_ptr != '\r');
return p;
}
uint8_t get_dec(uint32_t *decval)
{
const uint8_t *t;
t = get_token();
if (t != NULL) {
int x = util_sscandec(t);
if (x < 0)
return 0;
*decval = x;
return 1;
}
return 0;
}
uint8_t parse_hex(const uint8_t *s, uint32_t *hexval)
{
uint32_t x = util_sscanhex(s);
*hexval = (uint32_t) x;
return 1;
}
uint8_t get_hex(uint32_t *hexval)
{
const uint8_t *t;
t = get_token();
if (t != NULL)
return parse_hex(t, hexval);
return 0;
}
uint8_t get_hex_arg2(uint32_t *hexval1, uint32_t *hexval2)
{
return get_hex(hexval1) && get_hex(hexval2);
}
uint8_t get_hex_arg3(uint32_t *hexval1, uint32_t *hexval2, uint32_t *hexval3)
{
return get_hex(hexval1) && get_hex(hexval2) && get_hex(hexval3);
}
static uint8_t get_int32(uint32_t *val)
{
if (!get_hex(val)){
info_P(PSTR("Invalid argument!\n"));
return 0;
} else {
return 1;
}
}
static uint8_t get_int8(uint8_t *val)
{
uint32_t ret;
if (!get_hex(&ret) ||ret > 0xff){
info_P(PSTR("Invalid argument!\n"));
return 0;
}else{
*val = (uint8_t)ret;
return 1;
}
}
static int get_bool(void)
{
const uint8_t *t;
t = get_token();
if (t != NULL) {
int result = util_sscanbool(t);
if (result >= 0)
return result;
}
info_P(PSTR("Invalid argument (should be 0 or 1)!\n"));
return -1;
}
void prompt(void){
uart_putc('\r');
uart_putc('\n');
uart_putc('>');
}
ISR(USART0_RX_vect)
{
UCSR0B &= (255 - (1<<RXCIE0));// Interrupts disable for RxD
sei();
if(recv_counter == (sizeof(recv_buf)-1)) {
cr=1;
recv_buf[recv_counter]='\0';
recv_counter=0;
prompt();
}
recv_buf[recv_counter] = UDR0;
uart_putc(recv_buf[recv_counter]);
if (recv_buf[recv_counter] == 0x0d) {
/* recv_buf[recv_counter] = 0; */
cr = 1;
recv_buf[++recv_counter]='\0';
recv_counter = 0;
prompt();
} else {
// we accept backspace or delete
if ((recv_buf[recv_counter] == 0x08 || recv_buf[recv_counter] == 0x7f) && recv_counter > 0) {
recv_counter--;
} else {
recv_counter++;
}
}
UCSR0B |= (1<<RXCIE0);
}
enum cmds {
CMD_DUMP,
CMD_DUMPVEC,
CMD_DUMPHEADER,
CMD_CRC,
CMD_EXIT,
CMD_RESET,
CMD_RESETSNIFF,
CMD_IRQ,
CMD_AVR,
CMD_SNES,
CMD_LOROM,
CMD_HIROM,
CMD_WR,
CMD_SHMWR,
CMD_SHMSAVE,
CMD_SHMRESTORE,
CMD_LOADER,
CMD_RECONNECT,
CMD_STATUS,
CMD_SYS,
CMD_HELP
};
uint8_t cmdlist[][CMD_HELP] PROGMEM = {
{"DUMP"},
{"DUMPVEC"},
{"DUMPHEADER"},
{"CRC"},
{"EXIT"},
{"RESET"},
{"RESETSNIFF"},
{"IRQ"},
{"AVR"},
{"SNES"},
{"LOROM"},
{"HIROM"},
{"WR"},
{"SHMWR"},
{"SHMSAVE"},
{"SHMRESTORE"},
{"LOADER"},
{"RECONNECT"},
{"STATUS"},
{"SYS"},
{"HELP"},
};
void shell_help(void){
uint8_t i;
info_P(PSTR("\n"));
for (i=CMD_DUMP; i<CMD_HELP; i++){
info_P((PGM_P)cmdlist[i]);
info_P(PSTR("\n"));
}
}
void shell_run(void)
{
uint8_t *t;
uint32_t arg1;
uint32_t arg2;
uint32_t arg3;
uint16_t crc;
uint16_t offset;
uint16_t i;
uint8_t c;
if (!cr)
return;
cr=0;
strcpy((char*)command_buf, (char*)recv_buf);
token_ptr = command_buf;
t = get_token();
if (t == NULL)
shell_help();
util_strupper(t);
if (strcmp_P((const char*)t,(PGM_P)cmdlist[CMD_DUMP]) == 0) {
if (get_hex_arg2(&arg1,&arg2))
dump_memory(arg1,arg2);
else
info_P(PSTR("DUMP <start addr> <end addr>\n"));
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_CRC]) == 0) {
if (get_hex_arg2(&arg1,&arg2)){
crc = crc_check_bulk_memory(arg1,arg2,0x8000);
info_P(PSTR("0x%06lx - 0x%06lx crc=0x%04x\n"),arg1,arg2,crc);
} else
info_P(PSTR("CRC <start addr> <end addr>\n"));
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_EXIT]) == 0) {
leave_application();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_RESET]) == 0) {
system_send_snes_reset();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_IRQ]) == 0) {
info_P(PSTR("Send IRQ\n"));
snes_irq_on();
snes_irq_lo();
_delay_us(20);
snes_irq_hi();
snes_irq_off();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_AVR]) == 0) {
//info_P(PSTR("Activate AVR bus\n"));
//avr_bus_active();
//snes_irq_lo();
//snes_irq_off();
system_set_bus_avr();
snes_irq_lo();
system_snes_irq_off();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_SNES]) == 0) {
//info_P(PSTR("Activate SNES bus\n"));
//snes_irq_lo();
//snes_irq_off();
//snes_wr_disable();
//snes_bus_active();
snes_irq_lo();
system_snes_irq_off();
system_set_wr_disable();
system_set_bus_snes();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_LOROM]) == 0) {
//info_P(PSTR("Set LOROM\n"));
//snes_lorom();
//snes_wr_disable();
system_set_rom_lorom();
system_set_wr_disable();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_HIROM]) == 0) {
//info_P(PSTR("Set HIROM\n"));
//snes_hirom();
//snes_wr_disable();
system_set_rom_hirom();
system_set_wr_disable();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_WR]) == 0) {
arg1 = get_bool();
if(arg1==1){
info_P(PSTR("Set WR enable"));
snes_wr_enable();
}else if (arg1==0){
info_P(PSTR("Set WR disable"));
snes_wr_disable();
}
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_RESETSNIFF]) == 0) {
arg1 = get_bool();
if(arg1==1){
info_P(PSTR("Start Reset sniffer"));
irq_init();
}else if (arg1==0){
info_P(PSTR("Stop Reset sniffer"));
irq_stop();
}
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_DUMPVEC]) == 0) {
uint16_t offset;
if (system.rom_mode==LOROM)
offset = 0x8000;
else
offset = 0x0000;
info_P(PSTR("ABORT 0x%04x 0x%04x\n"), (0xFFE8 - offset),sram_read16_be(0xFFE8 - offset));
info_P(PSTR("BRK 0x%04x 0x%04x\n"), (0xFFE6 - offset),sram_read16_be(0xFFE6 - offset));
info_P(PSTR("COP 0x%04x 0x%04x\n"), (0xFFE4 - offset),sram_read16_be(0xFFE4 - offset));
info_P(PSTR("IRQ 0x%04x 0x%04x\n"), (0xFFEE - offset),sram_read16_be(0xFFEE - offset));
info_P(PSTR("NMI 0x%04x 0x%04x\n"), (0xFFEA - offset),sram_read16_be(0xFFEA - offset));
info_P(PSTR("RES 0x%04x 0x%04x\n"), (0xFFFC - offset),sram_read16_be(0xFFFC - offset));
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_DUMPHEADER]) == 0) {
if (system.rom_mode==LOROM)
offset = 0x8000;
else
offset = 0x0000;
/*
# $ffc0..$ffd4 => Name of the ROM, typically in ASCII, using spaces to pad the name to 21 bytes.
# $ffd5 => ROM layout, typically $20 for LoROM, or $21 for HiROM. Add $10 for FastROM.
# $ffd6 => Cartridge type, typically $00 for ROM only, or $02 for ROM with save-RAM.
# $ffd7 => ROM size byte.
# $ffd8 => RAM size byte.
# $ffd9 => Country code, which selects the video in the emulator. Values $00, $01, $0d use NTSC. Values in range $02..$0c use PAL. Other values are invalid.
# $ffda => Licensee code. If this value is $33, then the ROM has an extended header with ID at $ffb2..$ffb5.
# $ffdb => Version number, typically $00.
# $ffdc..$ffdd => Checksum complement, which is the bitwise-xor of the checksum and $ffff.
# $ffde..$ffdf => SNES checksum, an unsigned 16-bit checksum of bytes.
# $ffe0..$ffe3 => Unknown.
*/
info_P(PSTR("NAME 0x%04x "), (0xffc0 - offset));
for(arg1=(0xffc0 - offset); arg1<(0xffc0 - offset + 21);arg1++){
c = sram_read(arg1);
if (c>0x1f && c<0x7f)
printf("%c",c);
}
printf("\n");
c = sram_read(0xffd5 - offset);
info_P(PSTR("LAYOUT 0x%04x "), (0xffd5 - offset));
switch(c){
case 0x20:
info_P(PSTR("LoROM, not fast\n"));
break;
case 0x21:
info_P(PSTR("HiRom, not fast\n"));
break;
case 0x30:
info_P(PSTR("LoROM, fast\n"));
break;
case 0x31:
info_P(PSTR("HiRom, fast\n"));
break;
default:
info_P(PSTR("Unkown 0x%02x\n"),c);
break;
}
c = sram_read(0xffd6 - offset);
info_P(PSTR("TYPE 0x%04x "), (0xffd6 - offset),c);
switch(c){
case 0x00:
info_P(PSTR("Rom\n"));
break;
case 0x01:
info_P(PSTR("Rom + Sram\n"));
break;
case 0x02:
info_P(PSTR("Rom + Sram + Battery\n"));
break;
case 0x13:
info_P(PSTR("SuperFX\n"));
break;
case 0x14:
info_P(PSTR("SuperFX\n"));
break;
case 0x15:
info_P(PSTR("SuperFX + Sram\n"));
break;
case 0x1a:
info_P(PSTR("SuperFX + Sram\n"));
break;
case 0x34:
info_P(PSTR("SA-1"));
break;
case 0x35:
info_P(PSTR("SA-1"));
break;
default:
info_P(PSTR("Unkown 0x%02x\n"),c);
break;
}
arg1 = ( 2 << ( sram_read(0xffd7 - offset) - 1 ));
info_P(PSTR("ROM 0x%04x %li MBit ( %li KiB)\n"), (0xffd7 - offset), (arg1 / 128), arg1);
arg1 = ( 2 << ( sram_read(0xffd8 - offset) - 1 ));
info_P(PSTR("RAM 0x%04x %li KiB\n"), (0xffd8 - offset), arg1);
info_P(PSTR("CCODE 0x%04x "), (0xffd9 - offset));
c = sram_read(0xffd9 - offset);
if (c==0x00 || c==0x01 || 0x0d )
info_P(PSTR("NTSC\n"));
else if (c>=0x02 || c<=0x0c )
info_P(PSTR("PAL\n"));
else
info_P(PSTR("Unkown 0x%02x\n"),c);
info_P(PSTR("LIC 0x%04x 0x%02x\n"), (0xffda - offset),sram_read(0xffda - offset));
info_P(PSTR("VER 0x%04x 0x%02x\n"), (0xffdb - offset),sram_read(0xffdb - offset));
info_P(PSTR("SUM1 0x%04x 0x%04x\n"), (0xffdc - offset),sram_read16_be(0xffdc - offset));
info_P(PSTR("SUM2 0x%04x 0x%04x\n"), (0xffde - offset),sram_read16_be(0xffde - offset));
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_SHMWR]) == 0) {
if (get_hex_arg2(&arg1,&arg2))
shared_memory_write((uint8_t)arg1, (uint8_t)arg1);
else
info_P(PSTR("SHMWR <command> <value>\n"));
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_SHMSAVE]) == 0) {
shared_memory_scratchpad_region_tx_save();
shared_memory_scratchpad_region_rx_save();
info_P(PSTR("Save scratchpad\n"));
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_SHMRESTORE]) == 0) {
shared_memory_scratchpad_region_tx_restore();
shared_memory_scratchpad_region_rx_restore();
info_P(PSTR("Restore scratchpad\n"));
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_LOADER]) == 0) {
boot_startup_rom(500);
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_RECONNECT]) == 0) {
usb_connect();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_STATUS]) == 0) {
transaction_status();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_SYS]) == 0) {
system_status();
}else if (strcmp_P((char*)t, (PGM_P)cmdlist[CMD_HELP]) == 0) {
shell_help();
}
prompt();
}
#endif

26
avr/usbload/shell.h
View File

@@ -1,26 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __SHELL_H__
#define __SHELL_H__
void shell_run(void);
#endif

338
avr/usbload/sram.c
View File

@@ -1,338 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include <avr/io.h>
#include <util/delay.h> /* for _delay_ms() */
#include "config.h"
#include "sram.h"
#include "uart.h"
#include "debug.h"
#include "info.h"
uint32_t addr_current = 0;
uint32_t addr_stash = 0;
void sram_init(void)
{
/*-------------------------------------------------*/
DDRA = 0x00;
PORTA = 0x00;
/*-------------------------------------------------*/
DDRC |= ( (1 << AVR_ADDR_LATCH_PIN)
| (1 << AVR_ADDR_SCK_PIN)
| (1 << AVR_ADDR_SER_PIN)
| (1 << AVR_ADDR_LOAD_PIN)
| (1 << AVR_ADDR_UP_PIN));
DDRC &= ~ ((1 << SNES_WR_PIN)
| (1 << AVR_BTLDR_EN_PIN));
PORTC &= ~((1 << AVR_ADDR_LATCH_PIN)
| (1 << AVR_ADDR_SCK_PIN)
| (1 << SNES_WR_PIN));
PORTC |= ( (1 << AVR_ADDR_UP_PIN)
| (1 << AVR_ADDR_LOAD_PIN));
//| (1 << SNES_WR_PIN));
/*-------------------------------------------------*/
DDRB |= ( (1 << AVR_RD_PIN)
| (1 << AVR_WR_PIN)
| (1 << AVR_CS_PIN)
| (1 << SNES_IRQ_PIN));
PORTB |= ( (1 << AVR_RD_PIN)
| (1 << AVR_WR_PIN)
| (1 << AVR_CS_PIN)
| (1 << SNES_IRQ_PIN));
/*-------------------------------------------------*/
DDRD |= ( (1 << AVR_SNES_SW_PIN)
| (1 << HI_LOROM_SW_PIN)
| (1 << SNES_WR_EN_PIN));
PORTD |= (1 << HI_LOROM_SW_PIN);
PORTD &= ~((1 << AVR_SNES_SW_PIN)
| (1 << SNES_WR_EN_PIN));
/*-------------------------------------------------*/
}
void sreg_set(uint32_t addr)
{
uint8_t i = 24;
debug_P(DEBUG_SREG, PSTR("sreg_set: addr=0x%08lx"),addr);
while(i--) {
if ((addr & ( 1L << i))){
debug_P(DEBUG_SREG, PSTR("1"));
AVR_ADDR_SER_PORT |= ( 1 << AVR_ADDR_SER_PIN);
} else {
AVR_ADDR_SER_PORT &= ~( 1 << AVR_ADDR_SER_PIN);
debug_P(DEBUG_SREG, PSTR("0"));
}
AVR_ADDR_SCK_PORT |= (1 << AVR_ADDR_SCK_PIN);
AVR_ADDR_SCK_PORT &= ~(1 << AVR_ADDR_SCK_PIN);
}
debug_P(DEBUG_SREG, PSTR("\n"));
AVR_ADDR_LATCH_PORT |= (1 << AVR_ADDR_LATCH_PIN);
AVR_ADDR_LATCH_PORT &= ~(1 << AVR_ADDR_LATCH_PIN);
counter_load();
}
void sram_bulk_addr_save()
{
addr_stash = addr_current;
debug_P(DEBUG_SRAM, PSTR("sram_bulk_addr_save: addr=0x%08lx\n\r"), addr_stash);
}
inline void sram_bulk_addr_restore()
{
debug_P(DEBUG_SRAM, PSTR("sram_bulk_addr_restore: addr=0x%08lx\n\r"), addr_stash);
sram_bulk_write_start(addr_stash);
}
void sram_bulk_read_start(uint32_t addr)
{
debug_P(DEBUG_SRAM, PSTR("sram_bulk_read_start: addr=0x%08lx\n\r"), addr);
addr_current = addr;
avr_data_in();
AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
AVR_WR_PORT |= (1 << AVR_WR_PIN);
AVR_RD_PORT |= (1 << AVR_RD_PIN);
sreg_set(addr);
AVR_RD_PORT &= ~(1 << AVR_RD_PIN);
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
}
inline void sram_bulk_read_next(void)
{
addr_current++;
AVR_RD_PORT |= (1 << AVR_RD_PIN);
counter_up();
AVR_RD_PORT &= ~(1 << AVR_RD_PIN);
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
}
inline uint8_t sram_bulk_read(void)
{
return AVR_DATA_PIN;
}
void sram_bulk_read_end(void)
{
debug_P(DEBUG_SRAM, PSTR("sram_bulk_read_end:\n"));
AVR_RD_PORT |= (1 << AVR_RD_PIN);
AVR_CS_PORT |= (1 << AVR_CS_PIN);
avr_data_in();
}
uint8_t sram_read(uint32_t addr)
{
uint8_t byte;
debug_P(DEBUG_SRAM_RAW, PSTR("sram_read: addr=0x%08lx\n\r"), addr);
avr_data_in();
AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
AVR_WR_PORT |= (1 << AVR_WR_PIN);
AVR_RD_PORT |= (1 << AVR_RD_PIN);
sreg_set(addr);
AVR_RD_PORT &= ~(1 << AVR_RD_PIN);
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
byte = AVR_DATA_PIN;
AVR_RD_PORT |= (1 << AVR_RD_PIN);
AVR_CS_PORT |= (1 << AVR_CS_PIN);
avr_data_in();
return byte;
}
uint16_t sram_read16_be(uint32_t addr){
uint8_t hi = sram_read(addr);
uint8_t lo = sram_read(addr+1);
return (hi << 8 | lo );
}
void sram_bulk_write_start(uint32_t addr)
{
debug_P(DEBUG_SRAM, PSTR("sram_bulk_write_start: addr=0x%08lx\n\r"), addr);
addr_current = addr;
avr_data_out();
AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
AVR_WR_PORT |= (1 << AVR_WR_PIN);
AVR_RD_PORT |= (1 << AVR_RD_PIN);
sreg_set(addr);
}
inline void sram_bulk_write_next(void)
{
AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
addr_current++;
counter_up();
}
inline void sram_bulk_write( uint8_t data)
{
AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
AVR_DATA_PORT = data;
AVR_WR_PORT |= (1 << AVR_WR_PIN);
}
void sram_bulk_write_end(void)
{
debug_P(DEBUG_SRAM, PSTR("sram_bulk_write_end:"));
AVR_WR_PORT |= (1 << AVR_WR_PIN);
AVR_CS_PORT |= (1 << AVR_CS_PIN);
avr_data_in();
}
void sram_write(uint32_t addr, uint8_t data)
{
debug_P(DEBUG_SRAM_RAW, PSTR("sram_write: addr=0x%08lx data=%x\n\r"), addr, data);
avr_data_out();
AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
AVR_WR_PORT |= (1 << AVR_WR_PIN);
AVR_RD_PORT |= (1 << AVR_RD_PIN);
sreg_set(addr);
AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
AVR_DATA_PORT = data;
AVR_WR_PORT |= (1 << AVR_WR_PIN);
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
AVR_CS_PORT |= (1 << AVR_CS_PIN);
avr_data_in();
}
void sram_bulk_copy_from_buffer(uint32_t addr, uint8_t * src, uint32_t len)
{
uint32_t i;
uint8_t *ptr = src;
debug_P(DEBUG_SRAM, PSTR("sram_bulk_copy_from_buffer: addr=0x%08lx src=0x%p len=%li\n\r"),
addr, src, len);
sram_bulk_write_start(addr);
for (i = addr; i < (addr + len); i++){
sram_bulk_write(*ptr);
//hack
if ((i+1) < (addr + len))
sram_bulk_write_next();
ptr++;
}
sram_bulk_write_end();
}
void sram_bulk_copy_into_buffer(uint32_t addr, uint8_t * dst, uint32_t len)
{
uint32_t i;
uint8_t *ptr = dst;
debug_P(DEBUG_SRAM, PSTR("sram_bulk_copy_into_buffer: addr=0x%08lx dst=0x%p len=%li\n\r"),
addr, dst, len);
sram_bulk_read_start(addr);
for (i = addr; i < (addr + len); i++) {
dst[i] = sram_bulk_read();
sram_bulk_read_next();
}
sram_bulk_read_end();
}
void sram_bulk_set(uint32_t addr, uint32_t len,uint8_t value){
uint32_t i;
debug_P(DEBUG_SRAM, PSTR("sram_bulk_set: addr=0x%08lx len=%li\n\r"), addr,len);
sram_bulk_write_start(addr);
for (i = addr; i < (addr + len); i++) {
if (0 == i % 0xfff)
debug_P(DEBUG_SRAM, PSTR("sram_bulk_set: addr=0x%08lx\n\r"), i);
sram_bulk_write(value);
sram_bulk_write_next();
}
sram_bulk_write_end();
}

226
avr/usbload/sram.h
View File

@@ -1,226 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __SRAM_H__
#define __SRAM_H__
#include <stdlib.h>
#include <stdint.h>
#include <avr/io.h>
/* ---------------------------- PORT A ---------------------------- */
#define AVR_DATA_PORT PORTA
#define AVR_DATA_DIR DDRA
#define AVR_DATA_PIN PINA
#define avr_data_in() ((AVR_DATA_DIR = 0x00),\
(AVR_DATA_PORT = 0x00))
#define avr_data_out() (AVR_DATA_DIR = 0xff)
/* ---------------------------- PORT B ---------------------------- */
#define AVR_PORT PORTB
#define AVR_DIR DDRB
#define AVR_RD_PORT PORTB
#define AVR_RD_DIR DDRB
#define AVR_RD_PIN PB2
#define avr_rd_hi() (AVR_RD_PORT |= (1 << AVR_RD_PIN))
#define avr_rd_lo() (AVR_RD_PORT &= ~(1 << AVR_RD_PIN))
#define AVR_WR_PORT PORTB
#define AVR_WR_DIR DDRB
#define AVR_WR_PIN PB1
#define avr_wr_hi() (AVR_WR_PORT |= (1 << AVR_WR_PIN))
#define avr_wr_lo() (AVR_WR_PORT &= ~(1 << AVR_WR_PIN))
#define AVR_CS_PORT PORTB
#define AVR_CS_DIR DDRB
#define AVR_CS_PIN PB0
#define avr_cs_hi() (AVR_CS_PORT |= (1 << AVR_CS_PIN))
#define avr_cs_lo() (AVR_CS_PORT &= ~(1 << AVR_CS_PIN))
#define SNES_IRQ_PORT PORTB
#define SNES_IRQ_DIR DDRB
#define SNES_IRQ_PIN PB3
#define snes_irq_on() (SNES_IRQ_DIR |= (1 << SNES_IRQ_PIN))
#define snes_irq_hi() (SNES_IRQ_PORT |= (1 << SNES_IRQ_PIN))
#define snes_irq_off() (SNES_IRQ_DIR &= ~(1 << SNES_IRQ_PIN))
#define snes_irq_lo() (SNES_IRQ_PORT &= ~(1 << SNES_IRQ_PIN))
/* ---------------------------- PORT C ---------------------------- */
#define AVR_ADDR_PORT PORTC
#define AVR_ADDR_DIR DDRC
#define AVR_ADDR_LATCH_PORT PORTC
#define AVR_ADDR_LATCH_DIR DDRC
#define AVR_ADDR_LATCH_PIN PC6
#define avr_addr_latch_hi() (AVR_ADDR_LATCH_PORT |= (1 << AVR_ADDR_LATCH_PIN))
#define avr_addr_latch_lo() (AVR_ADDR_LATCH_PORT &= ~(1 << AVR_ADDR_LATCH_PIN))
#define AVR_ADDR_SCK_PORT PORTC
#define AVR_ADDR_SCK_DIR DDRC
#define AVR_ADDR_SCK_PIN PC5
#define avr_addr_sck_hi() (AVR_ADDR_SCK_PORT |= (1 << AVR_ADDR_SCK_PIN))
#define avr_addr_sck_lo() (AVR_ADDR_SCK_PORT &= ~(1 << AVR_ADDR_SCK_PIN))
#define AVR_ADDR_SER_PORT PORTC
#define AVR_ADDR_SER_DIR DDRC
#define AVR_ADDR_SER_PIN PC4
#define avr_addr_ser_hi() (AVR_ADDR_SER_PORT |= (1 << AVR_ADDR_SER_PIN))
#define avr_addr_ser_lo() (AVR_ADDR_SER_PORT &= ~(1 << AVR_ADDR_SER_PIN))
#define AVR_ADDR_LOAD_PORT PORTC
#define AVR_ADDR_LOAD_DIR DDRC
#define AVR_ADDR_LOAD_PIN PC2
#define counter_load() ((AVR_ADDR_LOAD_PORT &= ~(1 << AVR_ADDR_LOAD_PIN)),\
(AVR_ADDR_LOAD_PORT |= (1 << AVR_ADDR_LOAD_PIN)))
#define AVR_BTLDR_EN_PORT PORTC
#define AVR_BTLDR_EN_DIR DDRC
#define AVR_BTLDR_EN_PIN PC1
#define btldr_down() ((AVR_BTLDR_EN_PORT &= ~(1 << AVR_BTLDR_EN_PIN)),\
(AVR_BTLDR_EN_PORT |= (1 << AVR_BTLDR_EN_PIN)))
#define AVR_ADDR_UP_PORT PORTC
#define AVR_ADDR_UP_DIR DDRC
#define AVR_ADDR_UP_PIN PC0
#define counter_up() ((AVR_ADDR_UP_PORT &= ~(1 << AVR_ADDR_UP_PIN)),\
(AVR_ADDR_UP_PORT |= (1 << AVR_ADDR_UP_PIN)))
#define SNES_WR_PORT PORTC
#define SNES_WR_DIR DDRC
#define SNES_WR_PIN PC3
#define LED_PORT PORTC
#define LED_DIR DDRC
#define LED_PIN PC7
#define led_on() ((LED_PORT &=~ (1 << LED_PIN)),\
(LED_DIR &=~ (1 << LED_PIN)))
#define led_off() ((LED_PORT &=~ (1 << LED_PIN)),\
(LED_DIR |= (1 << LED_PIN)))
#define led_pwm_on() (LED_DIR &=~ (1 << LED_PIN))
#define led_pwm_off() (LED_DIR |= (1 << LED_PIN))
/* ---------------------------- PORT D ---------------------------- */
#define AVR_SNES_PORT PORTD
#define AVR_SNES_DIR DDRD
#define AVR_SNES_SW_PORT PORTD
#define AVR_SNES_SW_DIR DDRD
#define AVR_SNES_SW_PIN PD5
#define avr_bus_active() ((AVR_SNES_SW_PORT &= ~(1 << AVR_SNES_SW_PIN)),\
(HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN)),\
(AVR_CS_DIR |= (1 << AVR_CS_PIN)))
#define snes_bus_active() ((AVR_SNES_SW_PORT |= (1 << AVR_SNES_SW_PIN)),\
(AVR_CS_DIR &= ~(1 << AVR_CS_PIN)),\
(AVR_CS_PORT |= (1 << AVR_CS_PIN)))
#define HI_LOROM_SW_PORT PORTD
#define HI_LOROM_SW_DIR DDRD
#define HI_LOROM_SW_PIN PD6
#define snes_hirom() (HI_LOROM_SW_PORT &= ~(1 << HI_LOROM_SW_PIN))
#define snes_lorom() (HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN))
#define SNES_WR_EN_PORT PORTD
#define SNES_WR_EN_DIR DDRD
#define SNES_WR_EN_PIN PD7
#define snes_wr_disable() (SNES_WR_EN_PORT &= ~(1 << SNES_WR_EN_PIN))
#define snes_wr_enable() (SNES_WR_EN_PORT |= (1 << SNES_WR_EN_PIN))
#define SNES_RESET_PORT PORTD
#define SNES_RESET_DIR DDRD
#define SNES_RESET_PIN PD3
#define SNES_RESET_INP PIND
#define snes_reset_on() (SNES_RESET_DIR |= (1 << SNES_RESET_PIN))
#define snes_reset_hi() (SNES_RESET_PORT |= (1 << SNES_RESET_PIN))
#define snes_reset_off() (SNES_RESET_DIR &= ~(1 << SNES_RESET_PIN))
#define snes_reset_lo() (SNES_RESET_PORT &= ~(1 << SNES_RESET_PIN))
#define snes_reset_test() ((SNES_RESET_INP & (1 << SNES_RESET_PIN)) == 0)
#define MMC_PORT PORTB
#define MMC_DIR DDRB
#define MMC_MISO_PIN PB6
#define MMC_MOSI_PIN PB5
#define MMC_SCK_PIN PB7
#define MMC_CS_PIN PB4
void sram_init(void);
void sreg_set(uint32_t addr);
uint8_t sram_read(uint32_t addr);
void sram_write(uint32_t addr, uint8_t data);
void sram_bulk_read_start(uint32_t addr);
inline void sram_bulk_read_next(void);
inline void sram_bulk_read_end(void);
uint8_t sram_bulk_read(void);
uint16_t sram_read16_be(uint32_t addr);
void sram_bulk_write_start(uint32_t addr);
inline void sram_bulk_write_next(void);
inline void sram_bulk_write_end(void);
void sram_bulk_write(uint8_t data);
void sram_bulk_copy_from_buffer(uint32_t addr, uint8_t * src, uint32_t len);
void sram_bulk_copy_into_buffer(uint32_t addr, uint8_t * dst, uint32_t len);
void sram_bulk_set(uint32_t addr, uint32_t len,uint8_t value);
inline void sram_bulk_addr_save();
inline void sram_bulk_addr_restore();
#endif

186
avr/usbload/system.c
View File

@@ -1,186 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include <avr/io.h>
#include <util/delay.h> /* for _delay_ms() */
#include <avr/interrupt.h>
#include "config.h"
#include "sram.h"
#include "system.h"
#include "uart.h"
#include "debug.h"
#include "info.h"
#include "requests.h"
#include "irq.h"
system_t system;
void system_init(void)
{
snes_reset_hi();
snes_reset_off();
system.reset_line = RESET_OFF;
snes_irq_hi();
snes_irq_off();
system.irq_line = IRQ_OFF;
snes_wr_disable();
system.wr_line = WR_DISABLE;
avr_bus_active();
system.bus_mode = MODE_AVR;
snes_lorom();
system.rom_mode = LOROM;
system.snes_reset_count = 0;
system.avr_reset_count = 0;
system.reset_irq = RESET_IRQ_OFF;
}
void system_send_snes_reset()
{
info_P(PSTR("Reset SNES\n"));
cli();
snes_reset_on();
snes_reset_lo();
_delay_ms(2);
snes_reset_hi();
snes_reset_off();
sei();
system.snes_reset_count++;
}
void system_send_snes_irq()
{
snes_irq_on();
snes_irq_lo();
_delay_us(20);
snes_irq_hi();
snes_irq_off();
}
void system_snes_irq_off()
{
snes_irq_off();
system.irq_line = IRQ_OFF;
}
void system_snes_irq_on()
{
snes_irq_on();
system.irq_line = IRQ_ON;
}
void system_set_bus_avr()
{
avr_bus_active();
info_P(PSTR("Activate AVR bus\n"));
system.bus_mode = MODE_AVR;
}
void system_set_wr_disable(){
snes_wr_disable();
system.wr_line = WR_DISABLE;
info_P(PSTR("Disable SNES WR\n"));
}
void system_set_wr_enable(){
snes_wr_enable();
system.wr_line = WR_ENABLE;
info_P(PSTR("Enable SNES WR\n"));
}
void system_set_bus_snes()
{
snes_bus_active();
system.bus_mode = MODE_SNES;
info_P(PSTR("Activate SNES bus\n"));
}
void system_set_rom_mode(usb_transaction_t *usb_trans)
{
if (usb_trans->req_bank_size == 0x8000) {
snes_lorom();
system.rom_mode = LOROM;
info_P(PSTR("Set SNES lorom \n"));
} else {
snes_hirom();
system.rom_mode = HIROM;
info_P(PSTR("Set SNES hirom \n"));
}
}
void system_set_rom_lorom()
{
snes_lorom();
system.rom_mode = LOROM;
info_P(PSTR("Set SNES lorom \n"));
}
void system_set_rom_hirom()
{
snes_hirom();
system.rom_mode = HIROM;
info_P(PSTR("Set SNES hirom \n"));
}
char* system_status_helper(uint8_t val){
if (val)
return "ON";
else
return "OFF";
}
char* system_status_bus(uint8_t val){
if (val)
return "SNES";
else
return "AVR";
}
char* system_status_rom(uint8_t val){
if (val)
return "HIROM";
else
return "LOROM";
}
void system_status(){
info_P(PSTR("\nBus Mode %s\n"),system_status_bus(system.bus_mode));
info_P(PSTR("Rom Mode %s\n"),system_status_rom(system.rom_mode));
info_P(PSTR("Reset Line %s\n"),system_status_helper(system.reset_line));
info_P(PSTR("IRQ Line %s\n"),system_status_helper(system.irq_line));
info_P(PSTR("WR Line %s\n"),system_status_helper(system.wr_line));
info_P(PSTR("Reset IRQ %s\n"),system_status_helper(system.reset_irq));
info_P(PSTR("SNES Reset 0x%02x\n"),system.snes_reset_count);
info_P(PSTR("AVR Reset 0x%02x\n"),system.avr_reset_count);
}

57
avr/usbload/system.h
View File

@@ -1,57 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __SYSTEM_H__
#define __SYSTEM_H__
#include "requests.h"
typedef struct system_t {
enum bus_mode_e { MODE_AVR, MODE_SNES } bus_mode;
enum rom_mode_e { LOROM, HIROM } rom_mode;
enum reset_line_e { RESET_OFF, RESET_ON } reset_line;
enum irq_line_e { IRQ_ON, IRQ_OFF } irq_line;
enum wr_line_e { WR_DISABLE, WR_ENABLE } wr_line;
enum reset_irq_e { RESET_IRQ_OFF, RESET_IRQ_ON } reset_irq;
uint8_t snes_reset_count;
uint8_t avr_reset_count;
} system_t;
void system_init(void);
void system_init(void);
void system_send_snes_reset(void);
void system_send_snes_irq(void);
void system_set_bus_avr(void);
void system_set_bus_snes(void);
void system_set_rom_mode(usb_transaction_t *usb_trans);
void system_set_rom_hirom(void);
void system_set_rom_lorom(void);
void system_snes_irq_off(void);
void system_set_wr_disable(void);
void system_set_wr_enable(void);
void system_status();
#endif

1184
avr/usbload/tags
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File diff suppressed because it is too large Load Diff

131
avr/usbload/testing.c
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@@ -1,131 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include <util/delay.h>
#include "shared_memory.h"
#include "config.h"
#include "sram.h"
#include "debug.h"
#include "crc.h"
#include "info.h"
#include "dump.h"
void test_read_write()
{
uint8_t i;
uint32_t addr;
avr_bus_active();
addr = 0x000000;
i = 1;
while (addr++ <= 0x0000ff) {
sram_write(addr, i++);
}
addr = 0x000000;
while (addr++ <= 0x0000ff) {
info_P(PSTR("read addr=0x%08lx %x\n"), addr, sram_read(addr));
}
}
void test_bulk_read_write()
{
uint8_t i;
uint32_t addr;
avr_bus_active();
addr = 0x000000;
i = 0;
sram_bulk_write_start(addr);
while (addr++ <= 0x8000) {
sram_bulk_write(i++);
sram_bulk_write_next();
}
sram_bulk_write_end();
addr = 0x000000;
sram_bulk_read_start(addr);
while (addr <= 0x8000) {
info_P(PSTR("addr=0x%08lx %x\n"), addr, sram_bulk_read());
sram_bulk_read_next();
addr++;
}
sram_bulk_read_end();
}
void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr)
{
uint32_t addr = 0;
uint8_t c;
sram_bulk_read_start(bottom_addr);
for (addr = bottom_addr; addr < top_addr; addr++) {
c = sram_bulk_read();
if (c != 0xff)
info_P(PSTR("addr=0x%08lx c=0x%x\n"), addr, c);
sram_bulk_read_next();
}
sram_bulk_read_end();
}
void test_memory_pattern(uint32_t bottom_addr, uint32_t top_addr, uint32_t bank_size)
{
uint32_t addr = 0;
uint8_t pattern = 0x55;
info_P(PSTR("test_memory_pattern: bottom_addr=0x%08lx top_addr=0x%08lx\n"), bottom_addr, top_addr);
sram_bulk_write_start(bottom_addr);
for (addr = bottom_addr; addr < top_addr; addr++) {
if (addr % bank_size == 0){
pattern++;
info_P(PSTR("test_memory_pattern: write addr=0x%08lx pattern=0x%08lx\n"), addr, pattern);
}
sram_bulk_write(pattern);
}
sram_bulk_write_end();
for (addr = bottom_addr; addr < top_addr; addr+=bank_size) {
info_P(PSTR("test_memory_pattern: dump bottom_addr=0x%08lx top_addr=0x%08lx\n"), addr, addr + bank_size);
dump_memory(addr, addr + bank_size );
info_P(PSTR("----------------------------------------------------------------\n"));
}
crc_check_bulk_memory((uint32_t)bottom_addr,top_addr, bank_size);
}
void test_crc()
{
info_P(PSTR("test_crc: clear\n"));
avr_bus_active();
sram_bulk_set(0x000000, 0x10000, 0xff);
info_P(PSTR("test_crc: crc\n"));
crc_check_bulk_memory(0x000000, 0x10000, 0x8000);
info_P(PSTR("test_crc: check\n"));
test_non_zero_memory(0x000000, 0x10000);
}

31
avr/usbload/testing.h
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@@ -1,31 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __TESTING_H__
#define __TESTING_H__
void test_read_write();
void test_bulk_read_write();
void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr);
void test_crc();
#endif

94
avr/usbload/timer.c
View File

@@ -1,94 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdint.h>
#include <stdio.h>
#include <avr/io.h>
#include <avr/io.h>
#include <avr/interrupt.h> /* for sei() */
#include "debug.h"
#include "info.h"
#include "sram.h"
extern uint8_t snes_reset_line;
#ifndef OCR1A
#define OCR1A OCR1 // 2313 support
#endif
#ifndef WGM12
#define WGM12 CTC1 // 2313 support
#endif
//#define XTAL 11059201L // nominal value
#define XTAL 20000000UL
#define DEBOUNCE 500L // debounce clock (256Hz = 4msec)
#define uint8_t unsigned char
#define uint unsigned int
uint16_t prescaler;
uint16_t volatile second; // count seconds
ISR (SIG_OUTPUT_COMPARE1A)
{
#if XTAL % DEBOUNCE // bei rest
OCR1A = 20000000UL / DEBOUNCE - 1; // compare DEBOUNCE - 1 times
#endif
if( --prescaler == 0 ){
prescaler = (uint16_t)DEBOUNCE;
second++; // exact one second over
#if XTAL % DEBOUNCE // handle remainder
OCR1A = XTAL / DEBOUNCE + XTAL % DEBOUNCE - 1; // compare once per second
#endif
}
}
void timer_start( void )
{
TCCR1B = (1<<WGM12) | (1<<CS10); // divide by 1
// clear on compare
OCR1A = XTAL / DEBOUNCE - 1UL; // Output Compare Register
TCNT1 = 0; // Timmer startet mit 0
second = 0;
prescaler = (uint16_t)DEBOUNCE; //software teiler
TIMSK1 = 1<<OCIE1A; // beim Vergleichswertes Compare Match
// Interrupt (SIG_OUTPUT_COMPARE1A)
sei();
}
uint16_t timer_stop_int(void)
{
uint16_t t = ((DEBOUNCE - prescaler) / DEBOUNCE ) + second;
return t;
}

29
avr/usbload/timer.h
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@@ -1,29 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __TIMER_H__
#define __TIMER_H__
int16_t timer_start( void );
double timer_stop( void );
int16_t timer_stop_int( void );
#endif

100
avr/usbload/uart.c
View File

@@ -1,100 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
#include <stdio.h>
#include "uart.h"
#include "fifo.h"
volatile struct {
uint8_t tmr_int:1;
uint8_t adc_int:1;
uint8_t rx_int:1;
} intflags;
volatile char rxbuff;
static int uart_stream(char c, FILE *stream);
FILE uart_stdout = FDEV_SETUP_STREAM(uart_stream, NULL, _FDEV_SETUP_WRITE);
void uart_init(void)
{
UCSR0A = _BV(U2X0); /* improves baud rate error @ F_CPU = 1 MHz */
UCSR0B = _BV(TXEN0) | _BV(RXEN0) | _BV(RXCIE0); /* tx/rx enable, rx complete
* intr */
UBRR0L = (F_CPU / (8 * 115200UL)) - 1;
}
/*
ISR(USART0_RX_vect)
{
uint8_t c;
c = UDR0;
if (bit_is_clear(UCSR0A, FE0)) {
rxbuff = c;
intflags.rx_int = 1;
}
}
*/
void uart_putc(uint8_t c)
{
loop_until_bit_is_set(UCSR0A, UDRE0);
UDR0 = c;
}
void uart_puts(const char *s)
{
do {
uart_putc(*s);
}
while (*s++);
}
void uart_puts_P(PGM_P s)
{
while (1) {
unsigned char c = pgm_read_byte(s);
s++;
if ('\0' == c)
break;
uart_putc(c);
}
}
static int uart_stream(char c, FILE * stream)
{
if (c == '\n')
uart_putc('\r');
loop_until_bit_is_set(UCSR0A, UDRE0);
UDR0 = c;
return 0;
}

39
avr/usbload/uart.h
View File

@@ -1,39 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __UART_H__
#define __UART_H__
#define CR "\r\n"
#include <avr/io.h>
#include <avr/pgmspace.h>
#include <stdio.h>
void uart_init(void);
void uart_putc(const uint8_t);
void uart_puts(const char *s);
void uart_puts_P(PGM_P s);
#endif

83
avr/usbload/usb_bulk.c
View File

@@ -1,83 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <avr/io.h>
#include <avr/pgmspace.h> /* required by usbdrv.h */
#include <avr/interrupt.h> /* for sei() */
#include <util/delay.h> /* for _delay_ms() */
#include <stdlib.h>
#include "usbdrv.h"
#include "oddebug.h" /* This is also an example for using debug
* macros */
#include "config.h"
#include "requests.h" /* The custom request numbers we use */
#include "uart.h"
#include "sram.h"
#include "debug.h"
#include "info.h"
#include "crc.h"
#include "usb_bulk.h"
extern usb_transaction_t usb_trans;
uint8_t usbFunctionWrite(uint8_t * data, uint8_t len)
{
uint8_t *ptr;
uint8_t i;
if (len > usb_trans.rx_remaining) {
info_P(PSTR("ERROR:usbFunctionWrite more data than expected remain: %i len: %i\n"),
usb_trans.rx_remaining, len);
len = usb_trans.rx_remaining;
}
if (usb_trans.req_state == REQ_STATUS_BULK_UPLOAD) {
usb_trans.rx_remaining -= len;
debug_P(DEBUG_USB_TRANS, PSTR("usbFunctionWrite REQ_STATUS_BULK_UPLOAD addr: 0x%08lx len: %i rx_remaining=%i\n"),
usb_trans.req_addr, len, usb_trans.rx_remaining);
ptr = data;
i = len;
while(i--){
sram_bulk_write(*ptr++);
sram_bulk_write_next();
}
}
return len;
}
uint8_t usbFunctionRead(uint8_t * data, uint8_t len)
{
uint8_t i;
if (len > usb_trans.tx_remaining)
len = usb_trans.tx_remaining;
usb_trans.tx_remaining -= len;
debug_P(DEBUG_USB_TRANS, PSTR("usbFunctionRead len=%i tx_remaining=%i \n"), len, usb_trans.tx_remaining);
for (i = 0; i < len; i++) {
*data = usb_trans.tx_buffer[len];
data++;
}
return len;
}

29
avr/usbload/usb_bulk.h
View File

@@ -1,29 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __USB_BULK_H__
#define __USB_BULK_H__
uint8_t usbFunctionWrite(uint8_t * data, uint8_t len);
uint8_t usbFunctionRead(uint8_t * data, uint8_t len);
#endif

752
avr/usbload/usbdrv/usbdrvasm128.inc
View File

@@ -1,752 +0,0 @@
/* Name: usbdrvasm128.inc
* Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
* Author: Christian Starkjohann
* Creation Date: 2008-10-11
* Tabsize: 4
* Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
* This Revision: $Id: usbdrvasm128.inc 740 2009-04-13 18:23:31Z cs $
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file is the 12.8 MHz version of the USB driver. It is intended for use
with the internal RC oscillator. Although 12.8 MHz is outside the guaranteed
calibration range of the oscillator, almost all AVRs can reach this frequency.
This version contains a phase locked loop in the receiver routine to cope with
slight clock rate deviations of up to +/- 1%.
See usbdrv.h for a description of the entire driver.
LIMITATIONS
===========
Although it may seem very handy to save the crystal and use the internal
RC oscillator of the CPU, this method (and this module) has some serious
limitations:
(1) The guaranteed calibration range of the oscillator is only 8.1 MHz.
They typical range is 14.5 MHz and most AVRs can actually reach this rate.
(2) Writing EEPROM and Flash may be unreliable (short data lifetime) since
the write procedure is timed from the RC oscillator.
(3) End Of Packet detection is between bit 0 and bit 1 where the EOP condition
may not be reliable when a hub is used. It should be in bit 1.
(4) Code size is much larger than that of the other modules.
Since almost all of this code is timing critical, don't change unless you
really know what you are doing! Many parts require not only a maximum number
of CPU cycles, but even an exact number of cycles!
Implementation notes:
======================
min frequency: 67 cycles for 8 bit -> 12.5625 MHz
max frequency: 69.286 cycles for 8 bit -> 12.99 MHz
nominal frequency: 12.77 MHz ( = sqrt(min * max))
sampling positions: (next even number in range [+/- 0.5])
cycle index range: 0 ... 66
bits:
.5, 8.875, 17.25, 25.625, 34, 42.375, 50.75, 59.125
[0/1], [9], [17], [25/+26], [34], [+42/43], [51], [59]
bit number: 0 1 2 3 4 5 6 7
spare cycles 1 2 1 2 1 1 1 0
operations to perform: duration cycle
----------------
eor fix, shift 1 -> 00
andi phase, USBMASK 1 -> 08
breq se0 1 -> 16 (moved to 11)
st y+, data 2 -> 24, 25
mov data, fix 1 -> 33
ser data 1 -> 41
subi cnt, 1 1 -> 49
brcs overflow 1 -> 50
layout of samples and operations:
[##] = sample bit
<##> = sample phase
*##* = operation
0: *00* [01] 02 03 04 <05> 06 07
1: *08* [09] 10 11 12 <13> 14 15 *16*
2: [17] 18 19 20 <21> 22 23
3: *24* *25* [26] 27 28 29 <30> 31 32
4: *33* [34] 35 36 37 <38> 39 40
5: *41* [42] 43 44 45 <46> 47 48
6: *49* *50* [51] 52 53 54 <55> 56 57 58
7: [59] 60 61 62 <63> 64 65 66
*****************************************************************************/
/* we prefer positive expressions (do if condition) instead of negative
* (skip if condition), therefore use defines for skip instructions:
*/
#define ifioclr sbis
#define ifioset sbic
#define ifrclr sbrs
#define ifrset sbrc
/* The registers "fix" and "data" swap their meaning during the loop. Use
* defines to keep their name constant.
*/
#define fix x2
#define data x1
#undef phase /* phase has a default definition to x4 */
#define phase x3
USB_INTR_VECTOR:
;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt, r0
push YL ;2 push only what is necessary to sync with edge ASAP
in YL, SREG ;1
push YL ;2
;----------------------------------------------------------------------------
; Synchronize with sync pattern:
;----------------------------------------------------------------------------
;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
;sync up with J to K edge during sync pattern -- use fastest possible loops
;The first part waits at most 1 bit long since we must be in sync pattern.
;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
;waitForJ, ensure that this prerequisite is met.
waitForJ:
inc YL
sbis USBIN, USBMINUS
brne waitForJ ; just make sure we have ANY timeout
waitForK:
;The following code results in a sampling window of 1/4 bit which meets the spec.
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS ;[0]
rjmp foundK ;[1]
#if USB_COUNT_SOF
lds YL, usbSofCount
inc YL
sts usbSofCount, YL
#endif /* USB_COUNT_SOF */
#ifdef USB_SOF_HOOK
USB_SOF_HOOK
#endif
rjmp sofError
foundK:
;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
;are cycles from center of first sync (double K) bit after the instruction
push YH ;[2]
lds YL, usbInputBufOffset;[4]
clr YH ;[6]
subi YL, lo8(-(usbRxBuf));[7]
sbci YH, hi8(-(usbRxBuf));[8]
sbis USBIN, USBMINUS ;[9] we want two bits K [we want to sample at 8 + 4 - 1.5 = 10.5]
rjmp haveTwoBitsK ;[10]
pop YH ;[11] undo the push from before
rjmp waitForK ;[13] this was not the end of sync, retry
haveTwoBitsK:
;----------------------------------------------------------------------------
; push more registers and initialize values while we sample the first bits:
;----------------------------------------------------------------------------
#define fix x2
#define data x1
push shift ;[12]
push x1 ;[14]
push x2 ;[16]
ldi shift, 0x80 ;[18] prevent bit-unstuffing but init low bits to 0
ifioset USBIN, USBMINUS ;[19] [01] <--- bit 0 [10.5 + 8 = 18.5]
ori shift, 1<<0 ;[02]
push x3 ;[03]
push cnt ;[05]
push r0 ;[07]
ifioset USBIN, USBMINUS ;[09] <--- bit 1
ori shift, 1<<1 ;[10]
ser fix ;[11]
ldi cnt, USB_BUFSIZE ;[12]
mov data, shift ;[13]
lsl shift ;[14]
nop2 ;[15]
ifioset USBIN, USBMINUS ;[17] <--- bit 2
ori data, 3<<2 ;[18] store in bit 2 AND bit 3
eor shift, data ;[19] do nrzi decoding
andi data, 1<<3 ;[20]
in phase, USBIN ;[21] <- phase
brne jumpToEntryAfterSet ;[22] if USBMINS at bit 3 was 1
nop ;[23]
rjmp entryAfterClr ;[24]
jumpToEntryAfterSet:
rjmp entryAfterSet ;[24]
;----------------------------------------------------------------------------
; Receiver loop (numbers in brackets are cycles within byte after instr)
;----------------------------------------------------------------------------
#undef fix
#define fix x1
#undef data
#define data x2
bit7IsSet:
ifrclr phase, USBMINUS ;[62] check phase only if D- changed
lpm ;[63]
in phase, USBIN ;[64] <- phase (one cycle too late)
ori shift, 1 << 7 ;[65]
nop ;[66]
;;;;rjmp bit0AfterSet ; -> [00] == [67] moved block up to save jump
bit0AfterSet:
eor fix, shift ;[00]
#undef fix
#define fix x2
#undef data
#define data x1 /* we now have result in data, fix is reset to 0xff */
ifioclr USBIN, USBMINUS ;[01] <--- sample 0
rjmp bit0IsClr ;[02]
andi shift, ~(7 << 0) ;[03]
breq unstuff0s ;[04]
in phase, USBIN ;[05] <- phase
rjmp bit1AfterSet ;[06]
unstuff0s:
in phase, USBIN ;[06] <- phase (one cycle too late)
andi fix, ~(1 << 0) ;[07]
ifioclr USBIN, USBMINUS ;[00]
ifioset USBIN, USBPLUS ;[01]
rjmp bit0IsClr ;[02] executed if first expr false or second true
jumpToSe0AndStore:
rjmp se0AndStore ;[03] executed only if both bits 0
bit0IsClr:
ifrset phase, USBMINUS ;[04] check phase only if D- changed
lpm ;[05]
in phase, USBIN ;[06] <- phase (one cycle too late)
ori shift, 1 << 0 ;[07]
bit1AfterClr:
andi phase, USBMASK ;[08]
ifioset USBIN, USBMINUS ;[09] <--- sample 1
rjmp bit1IsSet ;[10]
breq jumpToSe0AndStore ;[11]
andi shift, ~(7 << 1) ;[12]
in phase, USBIN ;[13] <- phase
breq unstuff1c ;[14]
rjmp bit2AfterClr ;[15]
unstuff1c:
andi fix, ~(1 << 1) ;[16]
nop2 ;[08]
nop2 ;[10]
bit1IsSet:
ifrclr phase, USBMINUS ;[12] check phase only if D- changed
lpm ;[13]
in phase, USBIN ;[14] <- phase (one cycle too late)
ori shift, 1 << 1 ;[15]
nop ;[16]
bit2AfterSet:
ifioclr USBIN, USBMINUS ;[17] <--- sample 2
rjmp bit2IsClr ;[18]
andi shift, ~(7 << 2) ;[19]
breq unstuff2s ;[20]
in phase, USBIN ;[21] <- phase
rjmp bit3AfterSet ;[22]
unstuff2s:
in phase, USBIN ;[22] <- phase (one cycle too late)
andi fix, ~(1 << 2) ;[23]
nop2 ;[16]
nop2 ;[18]
bit2IsClr:
ifrset phase, USBMINUS ;[20] check phase only if D- changed
lpm ;[21]
in phase, USBIN ;[22] <- phase (one cycle too late)
ori shift, 1 << 2 ;[23]
bit3AfterClr:
st y+, data ;[24]
entryAfterClr:
ifioset USBIN, USBMINUS ;[26] <--- sample 3
rjmp bit3IsSet ;[27]
andi shift, ~(7 << 3) ;[28]
breq unstuff3c ;[29]
in phase, USBIN ;[30] <- phase
rjmp bit4AfterClr ;[31]
unstuff3c:
in phase, USBIN ;[31] <- phase (one cycle too late)
andi fix, ~(1 << 3) ;[32]
nop2 ;[25]
nop2 ;[27]
bit3IsSet:
ifrclr phase, USBMINUS ;[29] check phase only if D- changed
lpm ;[30]
in phase, USBIN ;[31] <- phase (one cycle too late)
ori shift, 1 << 3 ;[32]
bit4AfterSet:
mov data, fix ;[33] undo this move by swapping defines
#undef fix
#define fix x1
#undef data
#define data x2
ifioclr USBIN, USBMINUS ;[34] <--- sample 4
rjmp bit4IsClr ;[35]
andi shift, ~(7 << 4) ;[36]
breq unstuff4s ;[37]
in phase, USBIN ;[38] <- phase
rjmp bit5AfterSet ;[39]
unstuff4s:
in phase, USBIN ;[39] <- phase (one cycle too late)
andi fix, ~(1 << 4) ;[40]
nop2 ;[33]
nop2 ;[35]
bit4IsClr:
ifrset phase, USBMINUS ;[37] check phase only if D- changed
lpm ;[38]
in phase, USBIN ;[39] <- phase (one cycle too late)
ori shift, 1 << 4 ;[40]
bit5AfterClr:
ser data ;[41]
ifioset USBIN, USBMINUS ;[42] <--- sample 5
rjmp bit5IsSet ;[43]
andi shift, ~(7 << 5) ;[44]
breq unstuff5c ;[45]
in phase, USBIN ;[46] <- phase
rjmp bit6AfterClr ;[47]
unstuff5c:
in phase, USBIN ;[47] <- phase (one cycle too late)
andi fix, ~(1 << 5) ;[48]
nop2 ;[41]
nop2 ;[43]
bit5IsSet:
ifrclr phase, USBMINUS ;[45] check phase only if D- changed
lpm ;[46]
in phase, USBIN ;[47] <- phase (one cycle too late)
ori shift, 1 << 5 ;[48]
bit6AfterSet:
subi cnt, 1 ;[49]
brcs jumpToOverflow ;[50]
ifioclr USBIN, USBMINUS ;[51] <--- sample 6
rjmp bit6IsClr ;[52]
andi shift, ~(3 << 6) ;[53]
cpi shift, 2 ;[54]
in phase, USBIN ;[55] <- phase
brlt unstuff6s ;[56]
rjmp bit7AfterSet ;[57]
jumpToOverflow:
rjmp overflow
unstuff6s:
andi fix, ~(1 << 6) ;[50]
lpm ;[51]
bit6IsClr:
ifrset phase, USBMINUS ;[54] check phase only if D- changed
lpm ;[55]
in phase, USBIN ;[56] <- phase (one cycle too late)
ori shift, 1 << 6 ;[57]
nop ;[58]
bit7AfterClr:
ifioset USBIN, USBMINUS ;[59] <--- sample 7
rjmp bit7IsSet ;[60]
andi shift, ~(1 << 7) ;[61]
cpi shift, 4 ;[62]
in phase, USBIN ;[63] <- phase
brlt unstuff7c ;[64]
rjmp bit0AfterClr ;[65] -> [00] == [67]
unstuff7c:
andi fix, ~(1 << 7) ;[58]
nop ;[59]
rjmp bit7IsSet ;[60]
se0AndStore:
st y+, x1 ;[15/17] cycles after start of byte
rjmp se0 ;[17/19]
bit7IsClr:
ifrset phase, USBMINUS ;[62] check phase only if D- changed
lpm ;[63]
in phase, USBIN ;[64] <- phase (one cycle too late)
ori shift, 1 << 7 ;[65]
nop ;[66]
;;;;rjmp bit0AfterClr ; -> [00] == [67] moved block up to save jump
bit0AfterClr:
eor fix, shift ;[00]
#undef fix
#define fix x2
#undef data
#define data x1 /* we now have result in data, fix is reset to 0xff */
ifioset USBIN, USBMINUS ;[01] <--- sample 0
rjmp bit0IsSet ;[02]
andi shift, ~(7 << 0) ;[03]
breq unstuff0c ;[04]
in phase, USBIN ;[05] <- phase
rjmp bit1AfterClr ;[06]
unstuff0c:
in phase, USBIN ;[06] <- phase (one cycle too late)
andi fix, ~(1 << 0) ;[07]
ifioclr USBIN, USBMINUS ;[00]
ifioset USBIN, USBPLUS ;[01]
rjmp bit0IsSet ;[02] executed if first expr false or second true
rjmp se0AndStore ;[03] executed only if both bits 0
bit0IsSet:
ifrclr phase, USBMINUS ;[04] check phase only if D- changed
lpm ;[05]
in phase, USBIN ;[06] <- phase (one cycle too late)
ori shift, 1 << 0 ;[07]
bit1AfterSet:
andi phase, USBMASK ;[08]
ifioclr USBIN, USBMINUS ;[09] <--- sample 1
rjmp bit1IsClr ;[10]
andi shift, ~(7 << 1) ;[11]
breq unstuff1s ;[12]
in phase, USBIN ;[13] <- phase
nop ;[14]
rjmp bit2AfterSet ;[15]
unstuff1s:
in phase, USBIN ;[14] <- phase (one cycle too late)
andi fix, ~(1 << 1) ;[15]
nop2 ;[08]
nop2 ;[10]
bit1IsClr:
ifrset phase, USBMINUS ;[12] check phase only if D- changed
lpm ;[13]
in phase, USBIN ;[14] <- phase (one cycle too late)
breq se0AndStore ;[15] if we come from unstuff1s, Z bit is never set
ori shift, 1 << 1 ;[16]
bit2AfterClr:
ifioset USBIN, USBMINUS ;[17] <--- sample 2
rjmp bit2IsSet ;[18]
andi shift, ~(7 << 2) ;[19]
breq unstuff2c ;[20]
in phase, USBIN ;[21] <- phase
rjmp bit3AfterClr ;[22]
unstuff2c:
in phase, USBIN ;[22] <- phase (one cycle too late)
andi fix, ~(1 << 2) ;[23]
nop2 ;[16]
nop2 ;[18]
bit2IsSet:
ifrclr phase, USBMINUS ;[20] check phase only if D- changed
lpm ;[21]
in phase, USBIN ;[22] <- phase (one cycle too late)
ori shift, 1 << 2 ;[23]
bit3AfterSet:
st y+, data ;[24]
entryAfterSet:
ifioclr USBIN, USBMINUS ;[26] <--- sample 3
rjmp bit3IsClr ;[27]
andi shift, ~(7 << 3) ;[28]
breq unstuff3s ;[29]
in phase, USBIN ;[30] <- phase
rjmp bit4AfterSet ;[31]
unstuff3s:
in phase, USBIN ;[31] <- phase (one cycle too late)
andi fix, ~(1 << 3) ;[32]
nop2 ;[25]
nop2 ;[27]
bit3IsClr:
ifrset phase, USBMINUS ;[29] check phase only if D- changed
lpm ;[30]
in phase, USBIN ;[31] <- phase (one cycle too late)
ori shift, 1 << 3 ;[32]
bit4AfterClr:
mov data, fix ;[33] undo this move by swapping defines
#undef fix
#define fix x1
#undef data
#define data x2
ifioset USBIN, USBMINUS ;[34] <--- sample 4
rjmp bit4IsSet ;[35]
andi shift, ~(7 << 4) ;[36]
breq unstuff4c ;[37]
in phase, USBIN ;[38] <- phase
rjmp bit5AfterClr ;[39]
unstuff4c:
in phase, USBIN ;[39] <- phase (one cycle too late)
andi fix, ~(1 << 4) ;[40]
nop2 ;[33]
nop2 ;[35]
bit4IsSet:
ifrclr phase, USBMINUS ;[37] check phase only if D- changed
lpm ;[38]
in phase, USBIN ;[39] <- phase (one cycle too late)
ori shift, 1 << 4 ;[40]
bit5AfterSet:
ser data ;[41]
ifioclr USBIN, USBMINUS ;[42] <--- sample 5
rjmp bit5IsClr ;[43]
andi shift, ~(7 << 5) ;[44]
breq unstuff5s ;[45]
in phase, USBIN ;[46] <- phase
rjmp bit6AfterSet ;[47]
unstuff5s:
in phase, USBIN ;[47] <- phase (one cycle too late)
andi fix, ~(1 << 5) ;[48]
nop2 ;[41]
nop2 ;[43]
bit5IsClr:
ifrset phase, USBMINUS ;[45] check phase only if D- changed
lpm ;[46]
in phase, USBIN ;[47] <- phase (one cycle too late)
ori shift, 1 << 5 ;[48]
bit6AfterClr:
subi cnt, 1 ;[49]
brcs overflow ;[50]
ifioset USBIN, USBMINUS ;[51] <--- sample 6
rjmp bit6IsSet ;[52]
andi shift, ~(3 << 6) ;[53]
cpi shift, 2 ;[54]
in phase, USBIN ;[55] <- phase
brlt unstuff6c ;[56]
rjmp bit7AfterClr ;[57]
unstuff6c:
andi fix, ~(1 << 6) ;[50]
lpm ;[51]
bit6IsSet:
ifrclr phase, USBMINUS ;[54] check phase only if D- changed
lpm ;[55]
in phase, USBIN ;[56] <- phase (one cycle too late)
ori shift, 1 << 6 ;[57]
bit7AfterSet:
ifioclr USBIN, USBMINUS ;[59] <--- sample 7
rjmp bit7IsClr ;[60]
andi shift, ~(1 << 7) ;[61]
cpi shift, 4 ;[62]
in phase, USBIN ;[63] <- phase
brlt unstuff7s ;[64]
rjmp bit0AfterSet ;[65] -> [00] == [67]
unstuff7s:
andi fix, ~(1 << 7) ;[58]
nop ;[59]
rjmp bit7IsClr ;[60]
macro POP_STANDARD ; 14 cycles
pop r0
pop cnt
pop x3
pop x2
pop x1
pop shift
pop YH
endm
macro POP_RETI ; 5 cycles
pop YL
out SREG, YL
pop YL
endm
#include "asmcommon.inc"
;----------------------------------------------------------------------------
; Transmitting data
;----------------------------------------------------------------------------
txByteLoop:
txBitloop:
stuffN1Delay: ; [03]
ror shift ;[-5] [11] [63]
brcc doExorN1 ;[-4] [64]
subi x3, 1 ;[-3]
brne commonN1 ;[-2]
lsl shift ;[-1] compensate ror after rjmp stuffDelay
nop ;[00] stuffing consists of just waiting 8 cycles
rjmp stuffN1Delay ;[01] after ror, C bit is reliably clear
sendNakAndReti:
ldi cnt, USBPID_NAK ;[-19]
rjmp sendCntAndReti ;[-18]
sendAckAndReti:
ldi cnt, USBPID_ACK ;[-17]
sendCntAndReti:
mov r0, cnt ;[-16]
ldi YL, 0 ;[-15] R0 address is 0
ldi YH, 0 ;[-14]
ldi cnt, 2 ;[-13]
; rjmp usbSendAndReti fallthrough
; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
;usbSend:
;pointer to data in 'Y'
;number of bytes in 'cnt' -- including sync byte
;uses: x1...x3, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x3 = bitstuff cnt]
;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction)
usbSendAndReti:
in x2, USBDDR ;[-10] 10 cycles until SOP
ori x2, USBMASK ;[-9]
sbi USBOUT, USBMINUS ;[-8] prepare idle state; D+ and D- must have been 0 (no pullups)
out USBDDR, x2 ;[-6] <--- acquire bus
in x1, USBOUT ;[-5] port mirror for tx loop
ldi shift, 0x40 ;[-4] sync byte is first byte sent (we enter loop after ror)
ldi x2, USBMASK ;[-3]
doExorN1:
eor x1, x2 ;[-2] [06] [62]
ldi x3, 6 ;[-1] [07] [63]
commonN1:
stuffN2Delay:
out USBOUT, x1 ;[00] [08] [64] <--- set bit
ror shift ;[01]
brcc doExorN2 ;[02]
subi x3, 1 ;[03]
brne commonN2 ;[04]
lsl shift ;[05] compensate ror after rjmp stuffDelay
rjmp stuffN2Delay ;[06] after ror, C bit is reliably clear
doExorN2:
eor x1, x2 ;[04] [12]
ldi x3, 6 ;[05] [13]
commonN2:
nop2 ;[06] [14]
subi cnt, 171 ;[08] [16] trick: (3 * 171) & 0xff = 1
out USBOUT, x1 ;[09] [17] <--- set bit
brcs txBitloop ;[10] [27] [44]
stuff6Delay:
ror shift ;[45] [53]
brcc doExor6 ;[46]
subi x3, 1 ;[47]
brne common6 ;[48]
lsl shift ;[49] compensate ror after rjmp stuffDelay
nop ;[50] stuffing consists of just waiting 8 cycles
rjmp stuff6Delay ;[51] after ror, C bit is reliably clear
doExor6:
eor x1, x2 ;[48] [56]
ldi x3, 6 ;[49]
common6:
stuff7Delay:
ror shift ;[50] [58]
out USBOUT, x1 ;[51] <--- set bit
brcc doExor7 ;[52]
subi x3, 1 ;[53]
brne common7 ;[54]
lsl shift ;[55] compensate ror after rjmp stuffDelay
rjmp stuff7Delay ;[56] after ror, C bit is reliably clear
doExor7:
eor x1, x2 ;[54] [62]
ldi x3, 6 ;[55]
common7:
ld shift, y+ ;[56]
nop ;[58]
tst cnt ;[59]
out USBOUT, x1 ;[60] [00]<--- set bit
brne txByteLoop ;[61] [01]
;make SE0:
cbr x1, USBMASK ;[02] prepare SE0 [spec says EOP may be 15 to 18 cycles]
lds x2, usbNewDeviceAddr;[03]
lsl x2 ;[05] we compare with left shifted address
subi YL, 2 + 0 ;[06] Only assign address on data packets, not ACK/NAK in r0
sbci YH, 0 ;[07]
out USBOUT, x1 ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
;set address only after data packet was sent, not after handshake
breq skipAddrAssign ;[01]
sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer
skipAddrAssign:
;end of usbDeviceAddress transfer
ldi x2, 1<<USB_INTR_PENDING_BIT;[03] int0 occurred during TX -- clear pending flag
USB_STORE_PENDING(x2) ;[04]
ori x1, USBIDLE ;[05]
in x2, USBDDR ;[06]
cbr x2, USBMASK ;[07] set both pins to input
mov x3, x1 ;[08]
cbr x3, USBMASK ;[09] configure no pullup on both pins
lpm ;[10]
lpm ;[13]
out USBOUT, x1 ;[16] <-- out J (idle) -- end of SE0 (EOP signal)
out USBDDR, x2 ;[17] <-- release bus now
out USBOUT, x3 ;[18] <-- ensure no pull-up resistors are active
rjmp doReturn
/*****************************************************************************
The following PHP script generates a code skeleton for the receiver routine:
<?php
function printCmdBuffer($thisBit)
{
global $cycle;
$nextBit = ($thisBit + 1) % 8;
$s = ob_get_contents();
ob_end_clean();
$s = str_replace("#", $thisBit, $s);
$s = str_replace("@", $nextBit, $s);
$lines = explode("\n", $s);
for($i = 0; $i < count($lines); $i++){
$s = $lines[$i];
if(ereg("\\[([0-9-][0-9])\\]", $s, $regs)){
$c = $cycle + (int)$regs[1];
$s = ereg_replace("\\[[0-9-][0-9]\\]", sprintf("[%02d]", $c), $s);
}
if(strlen($s) > 0)
echo "$s\n";
}
}
function printBit($isAfterSet, $bitNum)
{
ob_start();
if($isAfterSet){
?>
ifioclr USBIN, USBMINUS ;[00] <--- sample
rjmp bit#IsClr ;[01]
andi shift, ~(7 << #) ;[02]
breq unstuff#s ;[03]
in phase, USBIN ;[04] <- phase
rjmp bit@AfterSet ;[05]
unstuff#s:
in phase, USBIN ;[05] <- phase (one cycle too late)
andi fix, ~(1 << #) ;[06]
nop2 ;[-1]
nop2 ;[01]
bit#IsClr:
ifrset phase, USBMINUS ;[03] check phase only if D- changed
lpm ;[04]
in phase, USBIN ;[05] <- phase (one cycle too late)
ori shift, 1 << # ;[06]
<?php
}else{
?>
ifioset USBIN, USBMINUS ;[00] <--- sample
rjmp bit#IsSet ;[01]
andi shift, ~(7 << #) ;[02]
breq unstuff#c ;[03]
in phase, USBIN ;[04] <- phase
rjmp bit@AfterClr ;[05]
unstuff#c:
in phase, USBIN ;[05] <- phase (one cycle too late)
andi fix, ~(1 << #) ;[06]
nop2 ;[-1]
nop2 ;[01]
bit#IsSet:
ifrclr phase, USBMINUS ;[03] check phase only if D- changed
lpm ;[04]
in phase, USBIN ;[05] <- phase (one cycle too late)
ori shift, 1 << # ;[06]
<?php
}
printCmdBuffer($bitNum);
}
$bitStartCycles = array(1, 9, 17, 26, 34, 42, 51, 59);
for($i = 0; $i < 16; $i++){
$bit = $i % 8;
$emitClrCode = ($i + (int)($i / 8)) % 2;
$cycle = $bitStartCycles[$bit];
if($emitClrCode){
printf("bit%dAfterClr:\n", $bit);
}else{
printf("bit%dAfterSet:\n", $bit);
}
ob_start();
echo " ***** ;[-1]\n";
printCmdBuffer($bit);
printBit(!$emitClrCode, $bit);
if($i == 7)
echo "\n";
}
?>
*****************************************************************************/

707
avr/usbload/usbdrv/usbdrvasm18-crc.inc
View File

@@ -1,707 +0,0 @@
/* Name: usbdrvasm18.inc
* Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
* Author: Lukas Schrittwieser (based on 20 MHz usbdrvasm20.inc by Jeroen Benschop)
* Creation Date: 2009-01-20
* Tabsize: 4
* Copyright: (c) 2008 by Lukas Schrittwieser and OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
* Revision: $Id: usbdrvasm18-crc.inc 740 2009-04-13 18:23:31Z cs $
*/
/* Do not link this file! Link usbdrvasm.S instead, which includes the
* appropriate implementation!
*/
/*
General Description:
This file is the 18 MHz version of the asssembler part of the USB driver. It
requires a 18 MHz crystal (not a ceramic resonator and not a calibrated RC
oscillator).
See usbdrv.h for a description of the entire driver.
Since almost all of this code is timing critical, don't change unless you
really know what you are doing! Many parts require not only a maximum number
of CPU cycles, but even an exact number of cycles!
*/
;max stack usage: [ret(2), YL, SREG, YH, [sofError], bitcnt(x5), shift, x1, x2, x3, x4, cnt, ZL, ZH] = 14 bytes
;nominal frequency: 18 MHz -> 12 cycles per bit
; Numbers in brackets are clocks counted from center of last sync bit
; when instruction starts
;register use in receive loop to receive the data bytes:
; shift assembles the byte currently being received
; x1 holds the D+ and D- line state
; x2 holds the previous line state
; cnt holds the number of bytes left in the receive buffer
; x3 holds the higher crc byte (see algorithm below)
; x4 is used as temporary register for the crc algorithm
; x5 is used for unstuffing: when unstuffing the last received bit is inverted in shift (to prevent further
; unstuffing calls. In the same time the corresponding bit in x5 is cleared to mark the bit as beening iverted
; zl lower crc value and crc table index
; zh used for crc table accesses
;--------------------------------------------------------------------------------------------------------------
; CRC mods:
; table driven crc checker, Z points to table in prog space
; ZL is the lower crc byte, x3 is the higher crc byte
; x4 is used as temp register to store different results
; the initialization of the crc register is not 0xFFFF but 0xFE54. This is because during the receipt of the
; first data byte an virtual zero data byte is added to the crc register, this results in the correct initial
; value of 0xFFFF at beginning of the second data byte before the first data byte is added to the crc.
; The magic number 0xFE54 results form the crc table: At tabH[0x54] = 0xFF = crcH (required) and
; tabL[0x54] = 0x01 -> crcL = 0x01 xor 0xFE = 0xFF
; bitcnt is renamed to x5 and is used for unstuffing purposes, the unstuffing works like in the 12MHz version
;--------------------------------------------------------------------------------------------------------------
; CRC algorithm:
; The crc register is formed by x3 (higher byte) and ZL (lower byte). The algorithm uses a 'reversed' form
; i.e. that it takes the least significant bit first and shifts to the right. So in fact the highest order
; bit seen from the polynomial devision point of view is the lsb of ZL. (If this sounds strange to you i
; propose a research on CRC :-) )
; Each data byte received is xored to ZL, the lower crc byte. This byte now builds the crc
; table index. Next the new high byte is loaded from the table and stored in x4 until we have space in x3
; (its destination).
; Afterwards the lower table is loaded from the table and stored in ZL (the old index is overwritten as
; we don't need it anymore. In fact this is a right shift by 8 bits.) Now the old crc high value is xored
; to ZL, this is the second shift of the old crc value. Now x4 (the temp reg) is moved to x3 and the crc
; calculation is done.
; Prior to the first byte the two CRC register have to be initialized to 0xFFFF (as defined in usb spec)
; however the crc engine also runs during the receipt of the first byte, therefore x3 and zl are initialized
; to a magic number which results in a crc value of 0xFFFF after the first complete byte.
;
; This algorithm is split into the extra cycles of the different bits:
; bit7: XOR the received byte to ZL
; bit5: load the new high byte to x4
; bit6: load the lower xor byte from the table, xor zl and x3, store result in zl (=the new crc low value)
; move x4 (the new high byte) to x3, the crc value is ready
;
macro POP_STANDARD ; 18 cycles
pop ZH
pop ZL
pop cnt
pop x5
pop x3
pop x2
pop x1
pop shift
pop x4
endm
macro POP_RETI ; 7 cycles
pop YH
pop YL
out SREG, YL
pop YL
endm
macro CRC_CLEANUP_AND_CHECK
; the last byte has already been xored with the lower crc byte, we have to do the table lookup and xor
; x3 is the higher crc byte, zl the lower one
ldi ZH, hi8(usbCrcTableHigh);[+1] get the new high byte from the table
lpm x2, Z ;[+2][+3][+4]
ldi ZH, hi8(usbCrcTableLow);[+5] get the new low xor byte from the table
lpm ZL, Z ;[+6][+7][+8]
eor ZL, x3 ;[+7] xor the old high byte with the value from the table, x2:ZL now holds the crc value
cpi ZL, 0x01 ;[+8] if the crc is ok we have a fixed remainder value of 0xb001 in x2:ZL (see usb spec)
brne ignorePacket ;[+9] detected a crc fault -> paket is ignored and retransmitted by the host
cpi x2, 0xb0 ;[+10]
brne ignorePacket ;[+11] detected a crc fault -> paket is ignored and retransmitted by the host
endm
USB_INTR_VECTOR:
;order of registers pushed: YL, SREG, YH, [sofError], x4, shift, x1, x2, x3, x5, cnt, ZL, ZH
push YL ;[-28] push only what is necessary to sync with edge ASAP
in YL, SREG ;[-26]
push YL ;[-25]
push YH ;[-23]
;----------------------------------------------------------------------------
; Synchronize with sync pattern:
;----------------------------------------------------------------------------
;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
;sync up with J to K edge during sync pattern -- use fastest possible loops
;The first part waits at most 1 bit long since we must be in sync pattern.
;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
;waitForJ, ensure that this prerequisite is met.
waitForJ:
inc YL
sbis USBIN, USBMINUS
brne waitForJ ; just make sure we have ANY timeout
waitForK:
;The following code results in a sampling window of < 1/4 bit which meets the spec.
sbis USBIN, USBMINUS ;[-17]
rjmp foundK ;[-16]
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
sbis USBIN, USBMINUS
rjmp foundK
#if USB_COUNT_SOF
lds YL, usbSofCount
inc YL
sts usbSofCount, YL
#endif /* USB_COUNT_SOF */
#ifdef USB_SOF_HOOK
USB_SOF_HOOK
#endif
rjmp sofError
foundK: ;[-15]
;{3, 5} after falling D- edge, average delay: 4 cycles
;bit0 should be at 30 (2.5 bits) for center sampling. Currently at 4 so 26 cylces till bit 0 sample
;use 1 bit time for setup purposes, then sample again. Numbers in brackets
;are cycles from center of first sync (double K) bit after the instruction
push x4 ;[-14]
; [---] ;[-13]
lds YL, usbInputBufOffset;[-12] used to toggle the two usb receive buffers
; [---] ;[-11]
clr YH ;[-10]
subi YL, lo8(-(usbRxBuf));[-9] [rx loop init]
sbci YH, hi8(-(usbRxBuf));[-8] [rx loop init]
push shift ;[-7]
; [---] ;[-6]
ldi shift, 0x80 ;[-5] the last bit is the end of byte marker for the pid receiver loop
clc ;[-4] the carry has to be clear for receipt of pid bit 0
sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early)
rjmp haveTwoBitsK ;[-2]
pop shift ;[-1] undo the push from before
pop x4 ;[1]
rjmp waitForK ;[3] this was not the end of sync, retry
; The entire loop from waitForK until rjmp waitForK above must not exceed two
; bit times (= 24 cycles).
;----------------------------------------------------------------------------
; push more registers and initialize values while we sample the first bits:
;----------------------------------------------------------------------------
haveTwoBitsK:
push x1 ;[0]
push x2 ;[2]
push x3 ;[4] crc high byte
ldi x2, 1<<USBPLUS ;[6] [rx loop init] current line state is K state. D+=="1", D-=="0"
push x5 ;[7]
push cnt ;[9]
ldi cnt, USB_BUFSIZE ;[11]
;--------------------------------------------------------------------------------------------------------------
; receives the pid byte
; there is no real unstuffing algorithm implemented here as a stuffing bit is impossible in the pid byte.
; That's because the last four bits of the byte are the inverted of the first four bits. If we detect a
; unstuffing condition something went wrong and abort
; shift has to be initialized to 0x80
;--------------------------------------------------------------------------------------------------------------
; pid bit 0 - used for even more register saving (we need the z pointer)
in x1, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] filter only D+ and D- bits
eor x2, x1 ;[2] generate inverted of actual bit
sbrc x2, USBMINUS ;[3] if the bit is set we received a zero
sec ;[4]
ror shift ;[5] we perform no unstuffing check here as this is the first bit
mov x2, x1 ;[6]
push ZL ;[7]
;[8]
push ZH ;[9]
;[10]
ldi x3, 0xFE ;[11] x3 is the high order crc value
bitloopPid:
in x1, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] filter only D+ and D- bits
breq nse0 ;[2] both lines are low so handle se0
eor x2, x1 ;[3] generate inverted of actual bit
sbrc x2, USBMINUS ;[4] set the carry if we received a zero
sec ;[5]
ror shift ;[6]
ldi ZL, 0x54 ;[7] ZL is the low order crc value
ser x4 ;[8] the is no bit stuffing check here as the pid bit can't be stuffed. if so
; some error occured. In this case the paket is discarded later on anyway.
mov x2, x1 ;[9] prepare for the next cycle
brcc bitloopPid ;[10] while 0s drop out of shift we get the next bit
eor x4, shift ;[11] invert all bits in shift and store result in x4
;--------------------------------------------------------------------------------------------------------------
; receives data bytes and calculates the crc
; the last USBIN state has to be in x2
; this is only the first half, due to branch distanc limitations the second half of the loop is near the end
; of this asm file
;--------------------------------------------------------------------------------------------------------------
rxDataStart:
in x1, USBIN ;[0] sample line state (note: a se0 check is not useful due to bit dribbling)
ser x5 ;[1] prepare the unstuff marker register
eor x2, x1 ;[2] generates the inverted of the actual bit
bst x2, USBMINUS ;[3] copy the bit from x2
bld shift, 0 ;[4] and store it in shift
mov x2, shift ;[5] make a copy of shift for unstuffing check
andi x2, 0xF9 ;[6] mask the last six bits, if we got six zeros (which are six ones in fact)
breq unstuff0 ;[7] then Z is set now and we branch to the unstuffing handler
didunstuff0:
subi cnt, 1 ;[8] cannot use dec because it doesn't affect the carry flag
brcs nOverflow ;[9] Too many bytes received. Ignore packet
st Y+, x4 ;[10] store the last received byte
;[11] st needs two cycles
; bit1
in x2, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] check for se0 during bit 0
breq nse0 ;[2]
andi x2, USBMASK ;[3] check se0 during bit 1
breq nse0 ;[4]
eor x1, x2 ;[5]
bst x1, USBMINUS ;[6]
bld shift, 1 ;[7]
mov x1, shift ;[8]
andi x1, 0xF3 ;[9]
breq unstuff1 ;[10]
didunstuff1:
nop ;[11]
; bit2
in x1, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] check for se0 (as there is nothing else to do here
breq nOverflow ;[2]
eor x2, x1 ;[3] generates the inverted of the actual bit
bst x2, USBMINUS ;[4]
bld shift, 2 ;[5] store the bit
mov x2, shift ;[6]
andi x2, 0xE7 ;[7] if we have six zeros here (which means six 1 in the stream)
breq unstuff2 ;[8] the next bit is a stuffing bit
didunstuff2:
nop2 ;[9]
;[10]
nop ;[11]
; bit3
in x2, USBIN ;[0] sample line state
andi x2, USBMASK ;[1] check for se0
breq nOverflow ;[2]
eor x1, x2 ;[3]
bst x1, USBMINUS ;[4]
bld shift, 3 ;[5]
mov x1, shift ;[6]
andi x1, 0xCF ;[7]
breq unstuff3 ;[8]
didunstuff3:
nop ;[9]
rjmp rxDataBit4 ;[10]
;[11]
; the avr branch instructions allow an offset of +63 insturction only, so we need this
; 'local copy' of se0
nse0:
rjmp se0 ;[4]
;[5]
; the same same as for se0 is needed for overflow and StuffErr
nOverflow:
stuffErr:
rjmp overflow
unstuff0: ;[8] this is the branch delay of breq unstuffX
andi x1, USBMASK ;[9] do an se0 check here (if the last crc byte ends with 5 one's we might end up here
breq didunstuff0 ;[10] event tough the message is complete -> jump back and store the byte
ori shift, 0x01 ;[11] invert the last received bit to prevent furhter unstuffing
in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
andi x5, 0xFE ;[1] mark this bit as inverted (will be corrected before storing shift)
eor x1, x2 ;[2] x1 and x2 have to be different because the stuff bit is always a zero
andi x1, USBMASK ;[3] mask the interesting bits
breq stuffErr ;[4] if the stuff bit is a 1-bit something went wrong
mov x1, x2 ;[5] the next bit expects the last state to be in x1
rjmp didunstuff0 ;[6]
;[7] jump delay of rjmp didunstuffX
unstuff1: ;[11] this is the jump delay of breq unstuffX
in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
ori shift, 0x02 ;[1] invert the last received bit to prevent furhter unstuffing
andi x5, 0xFD ;[2] mark this bit as inverted (will be corrected before storing shift)
eor x2, x1 ;[3] x1 and x2 have to be different because the stuff bit is always a zero
andi x2, USBMASK ;[4] mask the interesting bits
breq stuffErr ;[5] if the stuff bit is a 1-bit something went wrong
mov x2, x1 ;[6] the next bit expects the last state to be in x2
nop2 ;[7]
;[8]
rjmp didunstuff1 ;[9]
;[10] jump delay of rjmp didunstuffX
unstuff2: ;[9] this is the jump delay of breq unstuffX
ori shift, 0x04 ;[10] invert the last received bit to prevent furhter unstuffing
andi x5, 0xFB ;[11] mark this bit as inverted (will be corrected before storing shift)
in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
andi x1, USBMASK ;[2] mask the interesting bits
breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong
mov x1, x2 ;[4] the next bit expects the last state to be in x1
nop2 ;[5]
;[6]
rjmp didunstuff2 ;[7]
;[8] jump delay of rjmp didunstuffX
unstuff3: ;[9] this is the jump delay of breq unstuffX
ori shift, 0x08 ;[10] invert the last received bit to prevent furhter unstuffing
andi x5, 0xF7 ;[11] mark this bit as inverted (will be corrected before storing shift)
in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
andi x2, USBMASK ;[2] mask the interesting bits
breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong
mov x2, x1 ;[4] the next bit expects the last state to be in x2
nop2 ;[5]
;[6]
rjmp didunstuff3 ;[7]
;[8] jump delay of rjmp didunstuffX
; the include has to be here due to branch distance restirctions
#define __USE_CRC__
#include "asmcommon.inc"
; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1)
; K = (D+ = 1), (D- = 0)
; Spec allows 7.5 bit times from EOP to SOP for replies
; 7.5 bit times is 90 cycles. ...there is plenty of time
sendNakAndReti:
ldi x3, USBPID_NAK ;[-18]
rjmp sendX3AndReti ;[-17]
sendAckAndReti:
ldi cnt, USBPID_ACK ;[-17]
sendCntAndReti:
mov x3, cnt ;[-16]
sendX3AndReti:
ldi YL, 20 ;[-15] x3==r20 address is 20
ldi YH, 0 ;[-14]
ldi cnt, 2 ;[-13]
; rjmp usbSendAndReti fallthrough
;usbSend:
;pointer to data in 'Y'
;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
;uses: x1...x4, btcnt, shift, cnt, Y
;Numbers in brackets are time since first bit of sync pattern is sent
usbSendAndReti: ; 12 cycles until SOP
in x2, USBDDR ;[-12]
ori x2, USBMASK ;[-11]
sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
in x1, USBOUT ;[-8] port mirror for tx loop
out USBDDR, x2 ;[-6] <- acquire bus
ldi x2, 0 ;[-6] init x2 (bitstuff history) because sync starts with 0
ldi x4, USBMASK ;[-5] exor mask
ldi shift, 0x80 ;[-4] sync byte is first byte sent
txByteLoop:
ldi bitcnt, 0x40 ;[-3]=[9] binary 01000000
txBitLoop: ; the loop sends the first 7 bits of the byte
sbrs shift, 0 ;[-2]=[10] if we have to send a 1 don't change the line state
eor x1, x4 ;[-1]=[11]
out USBOUT, x1 ;[0]
ror shift ;[1]
ror x2 ;[2] transfers the last sent bit to the stuffing history
didStuffN:
nop ;[3]
nop ;[4]
cpi x2, 0xfc ;[5] if we sent six consecutive ones
brcc bitstuffN ;[6]
lsr bitcnt ;[7]
brne txBitLoop ;[8] restart the loop while the 1 is still in the bitcount
; transmit bit 7
sbrs shift, 0 ;[9]
eor x1, x4 ;[10]
didStuff7:
ror shift ;[11]
out USBOUT, x1 ;[0] transfer bit 7 to the pins
ror x2 ;[1] move the bit into the stuffing history
cpi x2, 0xfc ;[2]
brcc bitstuff7 ;[3]
ld shift, y+ ;[4] get next byte to transmit
dec cnt ;[5] decrement byte counter
brne txByteLoop ;[7] if we have more bytes start next one
;[8] branch delay
;make SE0:
cbr x1, USBMASK ;[8] prepare SE0 [spec says EOP may be 25 to 30 cycles]
lds x2, usbNewDeviceAddr;[9]
lsl x2 ;[11] we compare with left shifted address
out USBOUT, x1 ;[0] <-- out SE0 -- from now 2 bits = 24 cycles until bus idle
subi YL, 20 + 2 ;[1] Only assign address on data packets, not ACK/NAK in x3
sbci YH, 0 ;[2]
;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
;set address only after data packet was sent, not after handshake
breq skipAddrAssign ;[3]
sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer
skipAddrAssign:
;end of usbDeviceAddress transfer
ldi x2, 1<<USB_INTR_PENDING_BIT;[5] int0 occurred during TX -- clear pending flag
USB_STORE_PENDING(x2) ;[6]
ori x1, USBIDLE ;[7]
in x2, USBDDR ;[8]
cbr x2, USBMASK ;[9] set both pins to input
mov x3, x1 ;[10]
cbr x3, USBMASK ;[11] configure no pullup on both pins
ldi x4, 4 ;[12]
se0Delay:
dec x4 ;[13] [16] [19] [22]
brne se0Delay ;[14] [17] [20] [23]
out USBOUT, x1 ;[24] <-- out J (idle) -- end of SE0 (EOP signal)
out USBDDR, x2 ;[25] <-- release bus now
out USBOUT, x3 ;[26] <-- ensure no pull-up resistors are active
rjmp doReturn
bitstuffN:
eor x1, x4 ;[8] generate a zero
ldi x2, 0 ;[9] reset the bit stuffing history
nop2 ;[10]
out USBOUT, x1 ;[0] <-- send the stuffing bit
rjmp didStuffN ;[1]
bitstuff7:
eor x1, x4 ;[5]
ldi x2, 0 ;[6] reset bit stuffing history
clc ;[7] fill a zero into the shift register
rol shift ;[8] compensate for ror shift at branch destination
rjmp didStuff7 ;[9]
;[10] jump delay
;--------------------------------------------------------------------------------------------------------------
; receives data bytes and calculates the crc
; second half of the data byte receiver loop
; most parts of the crc algorithm are here
;--------------------------------------------------------------------------------------------------------------
nOverflow2:
rjmp overflow
rxDataBit4:
in x1, USBIN ;[0] sample line state
andi x1, USBMASK ;[1] check for se0
breq nOverflow2 ;[2]
eor x2, x1 ;[3]
bst x2, USBMINUS ;[4]
bld shift, 4 ;[5]
mov x2, shift ;[6]
andi x2, 0x9F ;[7]
breq unstuff4 ;[8]
didunstuff4:
nop2 ;[9][10]
nop ;[11]
; bit5
in x2, USBIN ;[0] sample line state
ldi ZH, hi8(usbCrcTableHigh);[1] use the table for the higher byte
eor x1, x2 ;[2]
bst x1, USBMINUS ;[3]
bld shift, 5 ;[4]
mov x1, shift ;[5]
andi x1, 0x3F ;[6]
breq unstuff5 ;[7]
didunstuff5:
lpm x4, Z ;[8] load the higher crc xor-byte and store it for later use
;[9] lpm needs 3 cycles
;[10]
ldi ZH, hi8(usbCrcTableLow);[11] load the lower crc xor byte adress
; bit6
in x1, USBIN ;[0] sample line state
eor x2, x1 ;[1]
bst x2, USBMINUS ;[2]
bld shift, 6 ;[3]
mov x2, shift ;[4]
andi x2, 0x7E ;[5]
breq unstuff6 ;[6]
didunstuff6:
lpm ZL, Z ;[7] load the lower xor crc byte
;[8] lpm needs 3 cycles
;[9]
eor ZL, x3 ;[10] xor the old high crc byte with the low xor-byte
mov x3, x4 ;[11] move the new high order crc value from temp to its destination
; bit7
in x2, USBIN ;[0] sample line state
eor x1, x2 ;[1]
bst x1, USBMINUS ;[2]
bld shift, 7 ;[3] now shift holds the complete but inverted data byte
mov x1, shift ;[4]
andi x1, 0xFC ;[5]
breq unstuff7 ;[6]
didunstuff7:
eor x5, shift ;[7] x5 marks all bits which have not been inverted by the unstuffing subs
mov x4, x5 ;[8] keep a copy of the data byte it will be stored during next bit0
eor ZL, x4 ;[9] feed the actual byte into the crc algorithm
rjmp rxDataStart ;[10] next byte
;[11] during the reception of the next byte this one will be fed int the crc algorithm
unstuff4: ;[9] this is the jump delay of rjmp unstuffX
ori shift, 0x10 ;[10] invert the last received bit to prevent furhter unstuffing
andi x5, 0xEF ;[11] mark this bit as inverted (will be corrected before storing shift)
in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
andi x1, USBMASK ;[2] mask the interesting bits
breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
mov x1, x2 ;[4] the next bit expects the last state to be in x1
nop2 ;[5]
;[6]
rjmp didunstuff4 ;[7]
;[8] jump delay of rjmp didunstuffX
unstuff5: ;[8] this is the jump delay of rjmp unstuffX
nop ;[9]
ori shift, 0x20 ;[10] invert the last received bit to prevent furhter unstuffing
andi x5, 0xDF ;[11] mark this bit as inverted (will be corrected before storing shift)
in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
andi x2, USBMASK ;[2] mask the interesting bits
breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
mov x2, x1 ;[4] the next bit expects the last state to be in x2
nop ;[5]
rjmp didunstuff5 ;[6]
;[7] jump delay of rjmp didunstuffX
unstuff6: ;[7] this is the jump delay of rjmp unstuffX
nop2 ;[8]
;[9]
ori shift, 0x40 ;[10] invert the last received bit to prevent furhter unstuffing
andi x5, 0xBF ;[11] mark this bit as inverted (will be corrected before storing shift)
in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
andi x1, USBMASK ;[2] mask the interesting bits
breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
mov x1, x2 ;[4] the next bit expects the last state to be in x1
rjmp didunstuff6 ;[5]
;[6] jump delay of rjmp didunstuffX
unstuff7: ;[7] this is the jump delay of rjmp unstuffX
nop ;[8]
nop ;[9]
ori shift, 0x80 ;[10] invert the last received bit to prevent furhter unstuffing
andi x5, 0x7F ;[11] mark this bit as inverted (will be corrected before storing shift)
in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
andi x2, USBMASK ;[2] mask the interesting bits
breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
mov x2, x1 ;[4] the next bit expects the last state to be in x2
rjmp didunstuff7 ;[5]
;[6] jump delay of rjmp didunstuff7
; local copy of the stuffErr desitnation for the second half of the receiver loop
stuffErr2:
rjmp stuffErr
;--------------------------------------------------------------------------------------------------------------
; The crc table follows. It has to be aligned to enable a fast loading of the needed bytes.
; There are two tables of 256 entries each, the low and the high byte table.
; Table values were generated with the following C code:
/*
#include <stdio.h>
int main (int argc, char **argv)
{
int i, j;
for (i=0; i<512; i++){
unsigned short crc = i & 0xff;
for(j=0; j<8; j++) crc = (crc >> 1) ^ ((crc & 1) ? 0xa001 : 0);
if((i & 7) == 0) printf("\n.byte ");
printf("0x%02x, ", (i > 0xff ? (crc >> 8) : crc) & 0xff);
if(i == 255) printf("\n");
}
return 0;
}
// Use the following algorithm to compute CRC values:
ushort computeCrc(uchar *msg, uchar msgLen)
{
uchar i;
ushort crc = 0xffff;
for(i = 0; i < msgLen; i++)
crc = usbCrcTable16[lo8(crc) ^ msg[i]] ^ hi8(crc);
return crc;
}
*/
.balign 256
usbCrcTableLow:
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
; .balign 256
usbCrcTableHigh:
.byte 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2
.byte 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4, 0x04
.byte 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E
.byte 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8
.byte 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A
.byte 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC
.byte 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6
.byte 0xD2, 0x12, 0x13, 0xD3, 0x11, 0xD1, 0xD0, 0x10
.byte 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32
.byte 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4
.byte 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE
.byte 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38
.byte 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA
.byte 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C
.byte 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26
.byte 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0
.byte 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2, 0x62
.byte 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4
.byte 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE
.byte 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68
.byte 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA
.byte 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C
.byte 0xB4, 0x74, 0x75, 0xB5, 0x77, 0xB7, 0xB6, 0x76
.byte 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0
.byte 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92
.byte 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54
.byte 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E
.byte 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98
.byte 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A
.byte 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C
.byte 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86
.byte 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80, 0x40

140
avr/usbload/usbdrv/usbportability.h
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@@ -1,140 +0,0 @@
/* Name: usbportability.h
* Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
* Author: Christian Starkjohann
* Creation Date: 2008-06-17
* Tabsize: 4
* Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
* This Revision: $Id: usbportability.h 740 2009-04-13 18:23:31Z cs $
*/
/*
General Description:
This header is intended to contain all (or at least most of) the compiler
and library dependent stuff. The C code is written for avr-gcc and avr-libc.
The API of other development environments is converted to gcc's and avr-libc's
API by means of defines.
This header also contains all system includes since they depend on the
development environment.
Thanks to Oleg Semyonov for his help with the IAR tools port!
*/
#ifndef __usbportability_h_INCLUDED__
#define __usbportability_h_INCLUDED__
/* We check explicitly for IAR and CodeVision. Default is avr-gcc/avr-libc. */
/* ------------------------------------------------------------------------- */
#if defined __IAR_SYSTEMS_ICC__ || defined __IAR_SYSTEMS_ASM__ /* check for IAR */
/* ------------------------------------------------------------------------- */
#ifndef ENABLE_BIT_DEFINITIONS
# define ENABLE_BIT_DEFINITIONS 1 /* Enable bit definitions */
#endif
/* Include IAR headers */
#include <ioavr.h>
#ifndef __IAR_SYSTEMS_ASM__
# include <inavr.h>
#endif
#define __attribute__(arg) /* not supported on IAR */
#ifdef __IAR_SYSTEMS_ASM__
# define __ASSEMBLER__ /* IAR does not define standard macro for asm */
#endif
#ifdef __HAS_ELPM__
# define PROGMEM __farflash
#else
# define PROGMEM __flash
#endif
#define USB_READ_FLASH(addr) (*(PROGMEM char *)(addr))
/* The following definitions are not needed by the driver, but may be of some
* help if you port a gcc based project to IAR.
*/
#define cli() __disable_interrupt()
#define sei() __enable_interrupt()
#define wdt_reset() __watchdog_reset()
#define _BV(x) (1 << (x))
/* assembler compatibility macros */
#define nop2 rjmp $+2 /* jump to next instruction */
#define XL r26
#define XH r27
#define YL r28
#define YH r29
#define ZL r30
#define ZH r31
#define lo8(x) LOW(x)
#define hi8(x) (((x)>>8) & 0xff) /* not HIGH to allow XLINK to make a proper range check */
/* Depending on the device you use, you may get problems with the way usbdrv.h
* handles the differences between devices. Since IAR does not use #defines
* for MCU registers, we can't check for the existence of a particular
* register with an #ifdef. If the autodetection mechanism fails, include
* definitions for the required USB_INTR_* macros in your usbconfig.h. See
* usbconfig-prototype.h and usbdrv.h for details.
*/
/* ------------------------------------------------------------------------- */
#elif __CODEVISIONAVR__ /* check for CodeVision AVR */
/* ------------------------------------------------------------------------- */
/* This port is not working (yet) */
/* #define F_CPU _MCU_CLOCK_FREQUENCY_ seems to be defined automatically */
#include <io.h>
#include <delay.h>
#define __attribute__(arg) /* not supported on IAR */
#define PROGMEM __flash
#define USB_READ_FLASH(addr) (*(PROGMEM char *)(addr))
#ifndef __ASSEMBLER__
static inline void cli(void)
{
#asm("cli");
}
static inline void sei(void)
{
#asm("sei");
}
#endif
#define _delay_ms(t) delay_ms(t)
#define _BV(x) (1 << (x))
#define USB_CFG_USE_SWITCH_STATEMENT 1 /* macro for if() cascase fails for unknown reason */
#define macro .macro
#define endm .endmacro
#define nop2 rjmp .+0 /* jump to next instruction */
/* ------------------------------------------------------------------------- */
#else /* default development environment is avr-gcc/avr-libc */
/* ------------------------------------------------------------------------- */
#include <avr/io.h>
#ifdef __ASSEMBLER__
# define _VECTOR(N) __vector_ ## N /* io.h does not define this for asm */
#else
# include <avr/pgmspace.h>
#endif
#define USB_READ_FLASH(addr) pgm_read_byte(addr)
#define macro .macro
#define endm .endm
#define nop2 rjmp .+0 /* jump to next instruction */
#endif /* development environment */
/* for conveniecne, ensure that PRG_RDB exists */
#ifndef PRG_RDB
# define PRG_RDB(addr) USB_READ_FLASH(addr)
#endif
#endif /* __usbportability_h_INCLUDED__ */

132
avr/usbload/util.c
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@@ -1,132 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
uint8_t *util_strupper(uint8_t *s)
{
uint8_t *p;
for (p = s; *p != '\0'; p++)
if (*p >= 'a' && *p <= 'z')
*p += 'A' - 'a';
return s;
}
uint8_t *util_strlower(uint8_t *s)
{
uint8_t *p;
for (p = s; *p != '\0'; p++)
if (*p >= 'A' && *p <= 'Z')
*p += 'a' - 'A';
return s;
}
void util_chomp(uint8_t *s)
{
uint16_t len;
len = strlen((char*)s);
if (len >= 2 && s[len - 1] == '\n' && s[len - 2] == '\r')
s[len - 2] = '\0';
else if (len >= 1 && (s[len - 1] == '\n' || s[len - 1] == '\r'))
s[len - 1] = '\0';
}
void util_trim(uint8_t *s)
{
uint8_t *p = s;
uint8_t *q;
/* skip leading whitespace */
while (*p == ' ' || *p == '\t' || *p == '\r' || *p == '\n')
p++;
/* now p points at the first non-whitespace uint8_tacter */
if (*p == '\0') {
/* only whitespace */
*s = '\0';
return;
}
q = s + strlen((char*)s);
/* skip trailing whitespace */
/* we have found p < q such that *p is non-whitespace,
so this loop terminates with q >= p */
do
q--;
while (*q == ' ' || *q == '\t' || *q == '\r' || *q == '\n');
/* now q points at the last non-whitespace uint8_tacter */
/* cut off trailing whitespace */
*++q = '\0';
/* move to string */
memmove(s, p, q + 1 - p);
}
uint32_t util_sscandec(const uint8_t *s)
{
uint32_t result;
if (*s == '\0')
return -1;
result = 0;
for (;;) {
if (*s >= '0' && *s <= '9')
result = 10 * result + *s - '0';
else if (*s == '\0')
return result;
else
return -1;
s++;
}
}
uint32_t util_sscanhex(const uint8_t *s)
{
int32_t result;
if (*s == '\0')
return -1;
result = 0;
for (;;) {
if (*s >= '0' && *s <= '9')
result = 16 * result + *s - '0';
else if (*s >= 'A' && *s <= 'F')
result = 16 * result + *s - 'A' + 10;
else if (*s >= 'a' && *s <= 'f')
result = 16 * result + *s - 'a' + 10;
else if (*s == '\0')
return result;
else
return -1;
s++;
}
}
uint8_t util_sscanbool(const uint8_t *s)
{
if (*s == '0' && s[1] == '\0')
return 0;
if (*s == '1' && s[1] == '\0')
return 1;
return -1;
}

32
avr/usbload/util.h
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@@ -1,32 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __UTIL_H__
#define __UTIL_H__
uint8_t *util_strupper(uint8_t *s);
uint8_t *util_strlower(uint8_t *s);
void util_chomp(uint8_t *s);
void util_trim(uint8_t *s);
uint32_t util_sscandec(const uint8_t *s);
uint32_t util_sscanhex(const uint8_t *s);
uint8_t util_sscanbool(const uint8_t *s);
#endif

31
avr/usbload/watchdog.c
View File

@@ -1,31 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include "watchdog.h"
void wdt_init(void)
{
MCUSR = 0;
wdt_disable();
return;
}

42
avr/usbload/watchdog.h
View File

@@ -1,42 +0,0 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <avr/wdt.h>
#ifndef __WATCHDOG_H__
#define __WATCHDOG_H__
void wdt_init(void) __attribute__((naked)) __attribute__((section(".init3")));
#define soft_reset() \
do \
{ \
wdt_enable(WDTO_500MS );\
for(;;) \
{ \
} \
} while(0)
#endif

22
bugs/issue-032fab33a68ffbeb19f1e9fa4856101996759255.yaml
View File

@@ -1,22 +0,0 @@
--- !ditz.rubyforge.org,2008-03-06/issue
title: relocate code
desc: |-
move main code to upper page like 0xe4 and use 0x4f as shared mem window
or even combine this
code seems to reloacte and start, but ram doesn't seem accessable. broked
sprintfs
type: :bugfix
component: fatfs
release:
reporter: David <david@optixx.org>
status: :unstarted
disposition:
creation_time: 2009-06-10 14:22:10.400739 Z
references: []
id: 032fab33a68ffbeb19f1e9fa4856101996759255
log_events:
- - 2009-06-10 14:22:11.288638 Z
- David <david@optixx.org>
- created
- ""

18
bugs/issue-33e57a7c3ac89afc2e37880441fe0eeec05e2b3f.yaml Normal file
View File

@@ -0,0 +1,18 @@
--- !ditz.rubyforge.org,2008-03-06/issue
title: Test
desc: Test
type: :bugfix
component: snesram
release:
reporter: David <david@optixx.org>
status: :unstarted
disposition:
creation_time: 2009-04-20 18:13:29.104365 Z
references: []
id: 33e57a7c3ac89afc2e37880441fe0eeec05e2b3f
log_events:
- - 2009-04-20 18:13:33.543384 Z
- David <david@optixx.org>
- created
- nope

21
bugs/issue-6498cae9de5e51829e5dbb6b8fcaa20c7a647aa6.yaml
View File

@@ -1,21 +0,0 @@
--- !ditz.rubyforge.org,2008-03-06/issue
title: "debug ram mapping "
desc: |-
global vars seem to be borked or miss used. seems all kind of buffers are overlapping
just reordering global var order renders the code unusable.
also the strange sprintf buffer conflicts seem to related to this issue
type: :bugfix
component: fatfs
release:
reporter: David <david@optixx.org>
status: :unstarted
disposition:
creation_time: 2009-06-10 14:23:44.121219 Z
references: []
id: 6498cae9de5e51829e5dbb6b8fcaa20c7a647aa6
log_events:
- - 2009-06-10 14:23:45.632999 Z
- David <david@optixx.org>
- created
- ""

20
bugs/issue-99ae09d1da472e76501325424bc586f78980199e.yaml
View File

@@ -1,20 +0,0 @@
--- !ditz.rubyforge.org,2008-03-06/issue
title: debug sta return val
desc: |-
debug the sta value in diskio.c
never seems to take the correct value, looks like global,local scope problem
type: :bugfix
component: fatfs
release:
reporter: David <david@optixx.org>
status: :unstarted
disposition:
creation_time: 2009-06-10 14:20:20.608109 Z
references: []
id: 99ae09d1da472e76501325424bc586f78980199e
log_events:
- - 2009-06-10 14:20:24.343929 Z
- David <david@optixx.org>
- created
- ""

2
bugs/project.yaml
View File

@@ -4,7 +4,5 @@ version: "0.5"
components: components:
- !ditz.rubyforge.org,2008-03-06/component - !ditz.rubyforge.org,2008-03-06/component
name: snesram name: snesram
- !ditz.rubyforge.org,2008-03-06/component
name: fatfs
releases: [] releases: []

10
done.txt
View File

@@ -1,10 +0,0 @@
x 2009-10-13 Send PCB to seeed
x 2009-10-13 RS232 cable add programm header and sio lines
x 2009-10-13 Assemble No. 006 & No. 007
x 2009-10-13 Flash all cartridge with latest firmware and bootloader
x 2009-10-13 Bootloader lockbits
x 2009-10-13 Rework No. 002
x 2009-10-13 Package for Quickdev16
x 2009-10-13 Add struct for usb and communcations flags
x 2009-10-13 Mail snega2usb about OEM
x 2009-10-13 Email to seeed about the retour package

39
packages/efsl-0.3.6/CHANGELOG vendored
View File

@@ -1,39 +0,0 @@
CHANGEFILE
----------
This is the Changefile for the development 0.3 branch of EFSL.
Recording began with EFSL-0.3.3
0.3.5
-----
* Added warning in documentation that it is outdated
* Changed structure definitions
* Implemnted full-feature cp
* Renamed some efsl-functions (all starting with EFSL_)
* Added another example for AVR.
* Updated docs on getting started on AVR.
0.3.4
-----
* Fixed avr support
* Created new avr example + makefile
* Some more work on new fsutils
0.3.3
-----
* Renamed src/core to src/base
* Implemented new hwInterface structure
Support for multiple hwEndpoints in one project
* Modified SD_SPI to work as a general protocol
* Modified Linuxfile to the new hwInterface model
* Created a new efs_configger, now supports every
combination of partitions/disc
* Implemented full support for little and big endian
machines, as well as for little and big endian
filesystems
* Created new build system, for multiple platforms,
configurable from one file
* Changes cpo to use the new library functions
* Broke both dsp & atmega support

31
packages/efsl-0.3.6/Makefile vendored
View File

@@ -1,31 +0,0 @@
include conf/config.makefile
linux: efsl-base efsl-fs-vfat efsl-hwd-linuxfile
avr: efsl-base efsl-fs-vfat efsl-prot-sdspi efsl-hwd-atmega_sd
efsl-base:
make -C src/base/
cp src/base/efsl-base.a lib/libefsl-base.a
efsl-fs-vfat:
make -C src/fs/vfat/
cp src/fs/vfat/efsl-fs-vfat.a lib/libefsl-fs-vfat.a
efsl-prot-sdspi:
make -C src/protocols/sdcard_spi/
cp src/protocols/sdcard_spi/efsl-prot-sdspi.a lib/libefsl-prot-sdspi.a
efsl-hwd-linuxfile:
make -C src/hwdrivers/linuxfile/
cp src/hwdrivers/linuxfile/efsl-hwd-linuxfile.a lib/libefsl-hwd-linuxfile.a
efsl-hwd-atmega_sd:
make -C src/hwdrivers/atmega_spi/
cp src/hwdrivers/atmega_spi/efsl-hwd-atmega_spi.a lib/libefsl-hwd-atmega_spi.a
clean:
make -C src/base/ clean
make -C src/fs/vfat/ clean
make -C src/hwdrivers/linuxfile/ clean
make -C src/hwdrivers/atmega_spi clean
rm -rf lib/*.a

174
packages/efsl-0.3.6/conf/config-avr.h vendored
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@@ -1,174 +0,0 @@
#ifndef __EFSL_CONFIG_H__
#define __EFSL_CONFIG_H__
/* Hardware target
---------------
* Here you will define for what hardware-endpoint EFSL should be compiled.
* Look in interfaces.h to see what systems are supported, and add your own
* there if you need to write your own driver. Then, define the name you
* selected for your hardware there here. Make sure that you only select one
* device!
*/
/*#define HW_ENDPOINT_LINUX*/
#define HW_ENDPOINT_ATMEGA128_SD
/*#define HW_ENDPOINT_DSP_TI6713_SD*/
#define MULTIPLE_INTERFACE_SUPPORT
/* Architecture
------------
* In this section you should configure how large the default variable
* types in your system are. This is controlled in types.h in the general
* include directory. The selection you make here defines to what the various
* e(s|u)int(8,16,32) types will map.
* For 32 bit Linux : VARSIZE_LINUX32
* For 64 bit Linux : VARSIZE_LINUX64
* For AVR's : VARSIZE_ATMEGA
* For TMS67XX : VARSIZE_TMS67XX
*/
#define VARSIZE_ATMEGA
/* Memory configuration
--------------------
* Here you must configure wheter your processor can access memory byte
* oriented. All x86 processors can do it, AVR's can do it to. Some DSP
* or other microcontrollers can't. If you have an 8 bit system you're safe.
* If you are really unsure, leave the setting commented out, it will be slower
* but it will work for sure.
*/
#define BYTE_ALIGNMENT
/* Cache configuration
-------------------
* Here you must configure how much memory of cache you can/want to use.
* The number you put at IOMAN_NUMBUFFER is multiplied by 512. So 1 means
* 512 bytes cache, 4 means 2048 bytes cache. More is better.
* The number after IOMAN_NUMITERATIONS should be untouched.
* The last field (IOMAN_DO_MEMALLOC) is to tell ioman to allocate it's
* own memory in it's structure, or not. If you choose to do it yourself
* you will have to pass a pointer to the memory as the last argument of
* ioman_init.
*/
#define IOMAN_NUMBUFFER 1
#define IOMAN_NUMITERATIONS 3
#define IOMAN_DO_MEMALLOC
/* Cluster pre-allocation
----------------------
* When writing files, the function that performs the actual write has to
* calculate how many clusters it will need for that request. It then allocates
* that number of new clusters to the file. Since this involves some
* calculations and writing of the FAT, you might find it beneficial to limit
* the number of allocations, and allow fwrite to pre-allocate a number of
* clusters extra. This setting determines how many clusters will be extra
* allocated whenever this is required.
* Take in carefull consideration how large your clustersize is, putting 10 here
* with a clustersize of 32kb means you might waste 320 kb.
* The first option is for preallocating files, the other is used when enlarging
* a directory to accomodate more files
*/
#define CLUSTER_PREALLOC_FILE 0
#define CLUSTER_PREALLOC_DIRECTORY 0
/* Endianess configuration
-----------------------
* Here you can configure wheter your architecture is little or big endian. This
* is important since all FAT structures are stored in intel little endian
* order. So if you have a big endian system the library has to convert all
* figures to big endian in order to work.
*/
#define HOST_LITTLE_ENDIAN
/* Date and Time support
---------------------
* Here you can enable or disable date and time support. If you enable
* it you will have to create 6 functions, that are described in the
* EFSL manual. If the functions are not present when linking your
* program with the library you will get unresolved dependencies.
*/
/* #define DATE_TIME_SUPPORT */
/* Error reporting support
-----------------------
* When you receive an error in userland, it usually only gives limited
* information (most likely, fail or success). If error detection and
* reporting is important for you, you can enable more detailed error
* reporting here. This is optional, the costs are 1 byte per object,
* and a small increase in code size.
* You can enable error recording for all object, or you can select the
* object manually.
* For full error reporting use FULL_ERROR_SUPPORT
* For only the base-core of the library use BASE_ERROR_SUPPORT
* For IO/Man use ERRSUP_IOMAN
* For Disc use ERRSUP_IOMAN
* For Part use ERRSUP_PARTITION
* For Fs use ERRSUP_FILESYSTEM
* For File use ERRSUP_FILE
*/
#define FULL_ERROR_SUPPORT
/*#define BASE_ERROR_SUPPORT*/
/* List options
------------
* In this section you can configure what kind of data you will get from
* directory listing requests. Please refer to the documentation for
* more information
*/
#define LIST_MAXLENFILENAME 12
/* Debugging configuration
-----------------------
* Here you can configure the debugging behaviour. Debugging is different
* on every platform (see debug.h for more information).
* If your hardware has no means of output (printf) dont define any anything,
* and nothing will happen. For real world use debugging should be turned off.
*/
#define DEBUG
/* Debugging configuration - AVR Specific: PORT
--------------------------------------------
* Here you can select which UART you want to use for debugging.
* If you did not define DEBUG, this setting has no effect.
* Note that it is not a good idea to use a port that you use in userspace.
*/
/*#define DEBUG_PORT 0*/ /* Select UART0 */
#define DEBUG_PORT 1 /* Select UART1 */
/* Debugging configuration - AVR Specific: UBRR
--------------------------------------------
* Here you can set UBRR, this value will select the serial clock speed.
* This value depends on your baudrate and clockrate. U2X is by standard 0,
* if you would want this 1 for some reason, this can be done in debug.c.
*/
/*#define DEBUG_UBRR 51*/ /* 9600bps on 8Mhz */
#define DEBUG_UBRR 95 /* 9600bps on 14.7456Mhz */
/*#define DEBUG_UBRR 103*/ /* 9600bps on 16Mhz */
#endif

46
packages/efsl-0.3.6/conf/config-avr.makefile vendored
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@@ -1,46 +0,0 @@
################################################################################
### EFSL - Embedded Filesystems Library ###
### ----------------------------------- ###
### ###
################################################################################
# This is the configuration file for EFSL. This file will enable your to build
# the library if you have GNU make, or compatible, on your system.
# If you do not have a make utility on your system, or it cannot be used in this
# fashion (when using IDE's, like MSVC or Code composer), please refer to the
# documentation on how to build EFSL. It is possible to build EFSL with any C
# compiler although it will be a bit more work.
# C compiler
# ----------
#
# Here you select with what binary the sourcefiles must be compiled
CC=avr-gcc
# AR archiver
# -----------
#
# This variable controls what archiver is to be used. This utility is optional,
# if you don't have GNU make, you probably need to link differently as well.
AR=avr-ar
# Objcopy
# --------
#
# This variable controls what objcopy is to be used. This utility will be used
# when the program is converted to an format that your uC understands.
OBJCOPY=avr-objcopy
# C compiler options
# ------------------
#
# Here you can configure several options about the compilation.
DEBUGGING=-g3
VERIFY=-Wall
ARCHITECTURE=-mmcu=atmega128
OPTIMISE=-Os
GCFLAGS=$(DEBUGGING) $(VERIFY) $(ARCHITECTURE) $(OPTIMISE)

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