260 lines
4.5 KiB
C
260 lines
4.5 KiB
C
//#define F_CPU 8000000
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#include <avr/io.h>
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#include <util/delay.h>
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#include <stdlib.h>
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#include "uart.h"
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#include "mmc.h"
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#include "fat.h"
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//SREG defines
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#define S_MOSI PB3
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#define S_MISO PB4
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#define S_SCK PB5
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#define S_LATCH PB2
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//DEBUG defines
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#define D_LED0 PC5
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//SRAM defines
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#define R_WR PB6
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#define R_RD PB7
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#define R_DATA PORTD
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#define R_DIR DDRD
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#define READ_BUFFER_SIZE 512
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#define DEBUG_BUFFER_SIZE 256
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#define BLOCK_CNT 512
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//uint8_t debug_buffer[DEBUG_BUFFER_SIZE];
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uint8_t read_buffer[READ_BUFFER_SIZE];
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void dprintf(const uint8_t * fmt, ...) {
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//va_list args;
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//va_start(args, fmt);
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//vsnprintf(debug_buffer,DEBUG_BUFFER_SIZE-1, fmt, args);
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//va_end(args);
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//uart_puts(debug_buffer);
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uart_puts(fmt);
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}
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void dump_packet(uint32_t addr,uint32_t len,uint8_t *packet){
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uint16_t i,j;
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uint16_t sum =0;
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for (i=0;i<len;i+=16) {
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sum = 0;
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for (j=0;j<16;j++) {
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sum +=packet[i+j];
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}
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if (!sum)
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continue;
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dprintf("%08lx:", addr + i);
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for (j=0;j<16;j++) {
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dprintf(" %02x", packet[i+j]);
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}
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dprintf(" |");
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for (j=0;j<16;j++) {
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if (packet[i+j]>=33 && packet[i+j]<=126 )
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dprintf("%c", packet[i+j]);
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else
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dprintf(".");
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}
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dprintf("|\r\n");
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}
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}
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void spi_init(void)
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{
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/* Set MOSI and SCK output, all others input */
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DDRB |= ((1<<S_MOSI) | (1<<S_SCK) | (1<<S_LATCH));
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DDRB &= ~(1<<S_MISO);
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PORTB |= (1<<S_MISO);
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/* Enable SPI, Master*/
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SPCR = ((1<<SPE) | (1<<MSTR));
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}
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void spi_master_transmit(unsigned char cData)
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{
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/* Start transmission */
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SPDR = cData;
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/* Wait for transmission complete */
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while(!(SPSR & (1<<SPIF)));
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}
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uint8_t sram_read(uint32_t addr)
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{
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uint8_t byte;
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DDRD=0x00;
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PORTD=0xff;
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PORTB |= (1<<R_RD);
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PORTB |= (1<<R_WR);
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spi_master_transmit((uint8_t)(addr>>16));
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spi_master_transmit((uint8_t)(addr>>8));
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spi_master_transmit((uint8_t)(addr>>0));
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PORTB |= (1<<S_LATCH);
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PORTB &= ~(1<<S_LATCH);
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PORTB &= ~(1<<R_RD);
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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byte = PIND;
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PORTB |= (1<<R_RD);
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DDRD=0x00;
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PORTD=0x00;
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return byte;
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}
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void sram_write(uint32_t addr, uint8_t data)
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{
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DDRD=0xff;
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PORTB |= (1<<R_RD);
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PORTB |= (1<<R_WR);
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spi_master_transmit((uint8_t)(addr>>16));
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spi_master_transmit((uint8_t)(addr>>8));
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spi_master_transmit((uint8_t)(addr>>0));
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PORTB |= (1<<S_LATCH);
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PORTB &= ~(1<<S_LATCH);
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PORTB &= ~(1<<R_WR);
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PORTD=data;
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PORTB |= (1<<R_WR);
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DDRD=0x00;
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PORTD=0x00;
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}
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void sram_init(void){
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DDRD=0x00;
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PORTD=0x00;
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DDRB |= ((1<<R_WR) | (1<<R_RD));
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PORTB |= (1<<R_RD);
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PORTB |= (1<<R_WR);
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DDRC |= (1<<D_LED0);
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}
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void sram_clear(uint32_t addr, uint32_t len){
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uint32_t i;
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for (i=addr; i<(addr + len);i++ ){
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if (0==i%0xfff)
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dprintf("sram_clear %lx\n\r",i);
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sram_write(i, 0x00);
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}
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}
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void sram_copy(uint32_t addr,uint8_t *src, uint32_t len){
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uint32_t i;
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uint8_t *ptr = src;
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for (i=addr; i<(addr + len);i++ )
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sram_write(addr, *ptr++);
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}
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void sram_read_buffer(uint32_t addr,uint8_t *dst, uint32_t len){
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uint32_t i;
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uint8_t *ptr = dst;
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for (i=addr; i<(addr + len);i++ ){
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*ptr = sram_read(addr);
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ptr++;
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}
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}
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int main(void)
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{
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uint16_t fat_cluster = 0;
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uint8_t fat_attrib = 0;
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uint32_t fat_size = 0;
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uint32_t rom_addr = 0;
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uint8_t done = 0;
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uart_init();
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dprintf("uart_init\n\r");
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sram_init();
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dprintf("sram_init\n\r");
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spi_init();
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dprintf("spi_init\n\r");
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/*
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#ifdef 0
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sram_clear(0x000000, 0x400000);
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dprintf("sram_clear\n\r");
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#endif
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*/
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while ( mmc_init() !=0) {
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dprintf("no sdcard..\n\r");
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}
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dprintf("mmc_init\n\r");
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fat_init(read_buffer);
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dprintf("fat_init\n\r");
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rom_addr = 0x000000;
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while (!done){
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dprintf("Look for sprite.smc\n\r");
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if (fat_search_file((uint8_t*)"sprite.smc",
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&fat_cluster,
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&fat_size,
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&fat_attrib,
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read_buffer) == 1) {
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dprintf("Start loading sprite.smc\n\r");
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for (uint16_t block_cnt=0; block_cnt<BLOCK_CNT; block_cnt++) {
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fat_read_file (fat_cluster,read_buffer,block_cnt);
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dprintf("Read Block %i addr 0x%lx\n\r",block_cnt,rom_addr);
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sram_copy(rom_addr,read_buffer,512);
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//dump_packet(rom_addr,512,read_buffer);
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rom_addr += 512;
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}
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dprintf("Done 0x%lx\n\r",rom_addr);
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done = 1;
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}
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}
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dprintf("Dump memory\n\r");
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rom_addr = 0x000000;
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for (uint16_t block_cnt=0; block_cnt<BLOCK_CNT; block_cnt++) {
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dprintf("Read memory addr %lx\n\r",rom_addr);
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sram_read_buffer(rom_addr,read_buffer,512);
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dump_packet(rom_addr,512,read_buffer);
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rom_addr += 512;
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}
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while(1);
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return(0);
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}
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