118 lines
3.5 KiB
Plaintext
118 lines
3.5 KiB
Plaintext
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Table 4. G65SC802 and G65SC816 Instruction Set -- Alphabetical Sequence
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ADC Add Memory to Accumulator with Carry
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AND "AND" Memory with Accumulator
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ASL Shift One Bit Left, Memory or Accumulator
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BCC* Branch on Carry Clear (Pe = O)
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BCS* Branch on Carry Set (Pe = 1)
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BEQ Branch if Equal (Pz = 1)
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BIT Bit Test
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BMI Branch if Result Minus (PN = 1)
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BNE Branch if Not Equal (Pz = 0)
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BPL Branch if Result Plus (PN = 0)
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BRA Branch Always
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BRK Force Break
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BRL Branch Always Long
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BVC Branch on Overflow Clear (Pv = 0)
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BVS Branch on Overflow Set (Pv = 1)
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CLC Clear Carry Flag
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CLD Clear Decimal Mode
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CLI Clear Interrupt Disable Bit
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CLV Clear Overflow Flag
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CMP* Compare Memory and Accumulator
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COP Coprocessor
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CPX Compare Memory and Index X
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CPY Compare Memory and Index Y
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DEC* Decrement Memory or Accumulator by One
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DEX Decrement Index X by One
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DEY Decrement Index Y by One
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EOR Exclusive "OR" Memory with Accumulator
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INC* Increment Memory or Accumulator by One
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INX Increment Index X by One
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INY Increment Index Y by One
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JML** Jump Long
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JMP Jump to New Location
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JSL** Jump Subroutine Long
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JSR Jump to New Location Saving Return Address
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LDA Load Accumulator with Memory
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LDX Load Index X with Memory
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LDY Load Index Y with Memory
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LSR Shift One Bit Right (Memory or Accumulator)
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MVN Block Move Negative
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MVP Block Move Positive
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NOP No Operation
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ORA "OR" Memory with Accumulator
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PEA Push Effective Absolute Address on Stack (or Push Immediate Data on Stack)
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PEI Push Effective Indirect Address on Stack (add one cycle if DL f 0)
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PER Push Effective Program Counter Relative Address on Stack
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PHA Push Accumulator on Stack
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PHB Push Data Bank Register on Stack
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PHD Push Direct Register on Stack
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PHK Push Program Bank Register on Stack
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PHP Push Processor Status on Stack
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PHX Push Index X on Stack
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PHY Push index Y on Stack
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PLA Pull Accumulator from Stack
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PLB Pull Data Bank Register from Stack
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PLD Pull Direct Register from Stack
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PLP Pull Processor Status from Stack
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PLX Pull Index X from Stack
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PLY Pull Index Y form Stack
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REP Reset Status Bits
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ROL Rotate One Bit Left (Memory or Accumulator)
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ROR Rotate One Bit Right (Memory or Accumulator)
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RTI Return from Interrupt
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RTL Return from Subroutine Long
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RTS Return from Subroutine
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SBC Subtract Memory from Accumulator with Borrow
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SEC Set Carry Flag
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SED Set Decimal Mode
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SEI Set Interrupt Disable Status
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SEP Set Processor Status Bits
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STA Store Accumulator in Memory
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STP Stop the Clock
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STX Store Index X in Memory
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STY Store Index Y in Memory
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STZ Store Zero in Memory
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TAX Transfer Accumulator to Index X
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TAY Transfer Accumulator to Index Y
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TCD* Transfer Accumulator to Direct Register
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TCS* Transfer Accumulator to Stack Pointer Register
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TDC* Transfer Direct Register to Accumulator
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TRB Test and Reset Bit
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TSB Test and Set Bit
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TSC* Transfer Stack Pointer Register to Accumulator
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TSX Transfer Stack Pointer Register to Index X
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TXA Transfer Index X to Accumulator
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TXS Transfer Index X to Stack Polnter Register
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TXY Transfer Index X to Index Y
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TYA Transfer Index Y to Accumulator
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TYX Transfer Index Y to Index X
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WAI Wait for Interrupt
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XBA* Exchange AH and AL
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XCE Exchange Carry and Emulation Bits
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*) Common Mnemonic Aliases
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Mnemonic Alias
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BCC BLT
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BCS BGE
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CMP CPA
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DEC A DEA
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INC A INA
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TCD TAD
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TCS TAS
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TDC TDA
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TSC TSA
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XBA SWA
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**) JSL should be recognized as equivalent to JSR
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when it is specified with long absolute addresses.
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JML is equivalent to JMP with long addressing forced.
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-13-
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