223 lines
7.2 KiB
C
223 lines
7.2 KiB
C
/*
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* =====================================================================================
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*
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* ________ .__ __ ________ ____ ________
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* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
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* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
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* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
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* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
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* \__> \/ \/ \/ \/ \/
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*
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* www.optixx.org
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*
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*
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* Version: 1.0
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* Created: 07/21/2009 03:32:16 PM
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* Author: david@optixx.org
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*
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* =====================================================================================
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*/
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#ifndef __SRAM_H__
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#define __SRAM_H__
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#include <stdlib.h>
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#include <stdint.h>
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#include <avr/io.h>
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/* ---------------------------- PORT A ---------------------------- */
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#define AVR_DATA_PORT PORTA
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#define AVR_DATA_DIR DDRA
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#define AVR_DATA_PIN PINA
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#define avr_data_in() ((AVR_DATA_DIR = 0x00),\
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(AVR_DATA_PORT = 0x00))
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#define avr_data_out() (AVR_DATA_DIR = 0xff)
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/* ---------------------------- PORT B ---------------------------- */
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#define AVR_PORT PORTB
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#define AVR_DIR DDRB
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#define AVR_RD_PORT PORTB
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#define AVR_RD_DIR DDRB
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#define AVR_RD_PIN PB2
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#define avr_rd_hi() (AVR_RD_PORT |= (1 << AVR_RD_PIN))
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#define avr_rd_lo() (AVR_RD_PORT &= ~(1 << AVR_RD_PIN))
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#define AVR_WR_PORT PORTB
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#define AVR_WR_DIR DDRB
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#define AVR_WR_PIN PB1
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#define avr_wr_hi() (AVR_WR_PORT |= (1 << AVR_WR_PIN))
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#define avr_wr_lo() (AVR_WR_PORT &= ~(1 << AVR_WR_PIN))
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#define AVR_CS_PORT PORTB
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#define AVR_CS_DIR DDRB
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#define AVR_CS_PIN PB0
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#define avr_cs_hi() (AVR_CS_PORT |= (1 << AVR_CS_PIN))
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#define avr_cs_lo() (AVR_CS_PORT &= ~(1 << AVR_CS_PIN))
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#define SNES_IRQ_PORT PORTB
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#define SNES_IRQ_DIR DDRB
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#define SNES_IRQ_PIN PB3
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#define snes_irq_on() (SNES_IRQ_DIR |= (1 << SNES_IRQ_PIN))
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#define snes_irq_hi() (SNES_IRQ_PORT |= (1 << SNES_IRQ_PIN))
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#define snes_irq_off() (SNES_IRQ_DIR &= ~(1 << SNES_IRQ_PIN))
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#define snes_irq_lo() (SNES_IRQ_PORT &= ~(1 << SNES_IRQ_PIN))
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/* ---------------------------- PORT C ---------------------------- */
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#define AVR_ADDR_PORT PORTC
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#define AVR_ADDR_DIR DDRC
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#define AVR_ADDR_LATCH_PORT PORTC
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#define AVR_ADDR_LATCH_DIR DDRC
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#define AVR_ADDR_LATCH_PIN PC6
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#define avr_addr_latch_hi() (AVR_ADDR_LATCH_PORT |= (1 << AVR_ADDR_LATCH_PIN)))
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#define avr_addr_latch_lo() (AVR_ADDR_LATCH_PORT &= ~(1 << AVR_ADDR_LATCH_PIN)))
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#define AVR_ADDR_SCK_PORT PORTC
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#define AVR_ADDR_SCK_DIR DDRC
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#define AVR_ADDR_SCK_PIN PC5
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#define avr_addr_sck_hi() (AVR_ADDR_SCK_PORT |= (1 << AVR_ADDR_SCK_PIN)))
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#define avr_addr_sck_lo() (AVR_ADDR_SCK_PORT &= ~(1 << AVR_ADDR_SCK_PIN)))
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#define AVR_ADDR_SER_PORT PORTC
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#define AVR_ADDR_SER_DIR DDRC
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#define AVR_ADDR_SER_PIN PC4
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#define avr_addr_ser_hi() (AVR_ADDR_SER_PORT |= (1 << AVR_ADDR_SER_PIN)))
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#define avr_addr_ser_lo() (AVR_ADDR_SER_PORT &= ~(1 << AVR_ADDR_SER_PIN)))
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#define AVR_ADDR_LOAD_PORT PORTC
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#define AVR_ADDR_LOAD_DIR DDRC
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#define AVR_ADDR_LOAD_PIN PC2
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#define counter_load() ((AVR_ADDR_LOAD_PORT &= ~(1 << AVR_ADDR_LOAD_PIN)),\
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(AVR_ADDR_LOAD_PORT |= (1 << AVR_ADDR_LOAD_PIN)))
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#define AVR_BTLDR_EN_PORT PORTC
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#define AVR_BTLDR_EN_DIR DDRC
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#define AVR_BTLDR_EN_PIN PC1
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#define btldr_down() ((AVR_BTLDR_EN_PORT &= ~(1 << AVR_BTLDR_EN_PIN)),\
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(AVR_BTLDR_EN_PORT |= (1 << AVR_BTLDR_EN_PIN)))
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#define AVR_ADDR_UP_PORT PORTC
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#define AVR_ADDR_UP_DIR DDRC
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#define AVR_ADDR_UP_PIN PC0
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#define counter_up() ((AVR_ADDR_UP_PORT &= ~(1 << AVR_ADDR_UP_PIN)),\
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(AVR_ADDR_UP_PORT |= (1 << AVR_ADDR_UP_PIN)))
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#define SNES_WR_PORT PORTC
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#define SNES_WR_DIR DDRC
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#define SNES_WR_PIN PC3
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#define LED_PORT PORTC
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#define LED_DIR DDRC
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#define LED_PIN PC7
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#define led_on() ((LED_PORT &=~ (1 << LED_PIN)),\
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(LED_DIR &=~ (1 << LED_PIN)))
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#define led_off() ((LED_PORT &=~ (1 << LED_PIN)),\
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(LED_DIR |= (1 << LED_PIN)))
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/* ---------------------------- PORT D ---------------------------- */
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#define AVR_SNES_PORT PORTD
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#define AVR_SNES_DIR DDRD
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#define AVR_SNES_SW_PORT PORTD
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#define AVR_SNES_SW_DIR DDRD
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#define AVR_SNES_SW_PIN PD5
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#define avr_bus_active() ((AVR_SNES_SW_PORT &= ~(1 << AVR_SNES_SW_PIN)),\
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(HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN)),\
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(AVR_CS_DIR |= (1 << AVR_CS_PIN)))
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#define snes_bus_active() ((AVR_SNES_SW_PORT |= (1 << AVR_SNES_SW_PIN)),\
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(AVR_CS_DIR &= ~(1 << AVR_CS_PIN)))
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#define HI_LOROM_SW_PORT PORTD
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#define HI_LOROM_SW_DIR DDRD
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#define HI_LOROM_SW_PIN PD6
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#define snes_hirom() (HI_LOROM_SW_PORT &= ~(1 << HI_LOROM_SW_PIN))
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#define snes_lorom() (HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN))
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#define SNES_WR_EN_PORT PORTD
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#define SNES_WR_EN_DIR DDRD
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#define SNES_WR_EN_PIN PD7
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#define snes_wr_disable() (SNES_WR_EN_PORT &= ~(1 << SNES_WR_EN_PIN))
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#define snes_wr_enable() (SNES_WR_EN_PORT |= (1 << SNES_WR_EN_PIN))
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#define SNES_RESET_PORT PORTD
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#define SNES_RESET_DIR DDRD
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#define SNES_RESET_PIN PD3
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#define SNES_RESET_INP PIND
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#define snes_reset_on() (SNES_RESET_DIR |= (1 << SNES_RESET_PIN))
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#define snes_reset_hi() (SNES_RESET_PORT |= (1 << SNES_RESET_PIN))
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#define snes_reset_off() (SNES_RESET_DIR &= ~(1 << SNES_RESET_PIN))
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#define snes_reset_lo() (SNES_RESET_PORT &= ~(1 << SNES_RESET_PIN))
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#define snes_reset_test() ((SNES_RESET_INP & (1 << SNES_RESET_PIN)) == 0)
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#define MMC_PORT PORTB
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#define MMC_DIR DDRB
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#define MMC_MISO_PIN PB6
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#define MMC_MOSI_PIN PB5
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#define MMC_SCK_PIN PB7
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#define MMC_CS_PIN PB4
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void system_init(void);
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void sreg_set(uint32_t addr);
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uint8_t sram_read(uint32_t addr);
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void sram_write(uint32_t addr, uint8_t data);
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void sram_bulk_read_start(uint32_t addr);
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inline void sram_bulk_read_next(void);
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inline void sram_bulk_read_end(void);
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uint8_t sram_bulk_read(void);
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void sram_bulk_write_start(uint32_t addr);
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inline void sram_bulk_write_next(void);
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inline void sram_bulk_write_end(void);
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void sram_bulk_write(uint8_t data);
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void sram_bulk_copy_from_buffer(uint32_t addr, uint8_t * src, uint32_t len);
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void sram_bulk_copy_into_buffer(uint32_t addr, uint8_t * dst, uint32_t len);
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void sram_bulk_set(uint32_t addr, uint32_t len,uint8_t value);
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inline void sram_bulk_addr_save();
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inline void sram_bulk_addr_restore();
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#endif
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