169 lines
5.7 KiB
C
169 lines
5.7 KiB
C
/******************************************************************************
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*
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* $RCSfile: $
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* $Revision: $
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*
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* This module provides interface routines to the LPC ARM UARTs.
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* Copyright 2004, R O SoftWare
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* No guarantees, warrantees, or promises, implied or otherwise.
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* May be used for hobby or commercial purposes provided copyright
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* notice remains intact.
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*
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* reduced to see what has to be done for minimum UART-support by mthomas
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*****************************************************************************/
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// #warning "this is a reduced version of the R O Software code"
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#include "lpc214x.h"
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#include "uart.h"
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/* on LPC210x: UART0 TX-Pin=P0.2, RX-Pin=P0.1
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PINSEL0 has to be set to "UART-Function" = Function "01"
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for Pin 0.0 and 0.1 */
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#define PINSEL_BITPIN0 0
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#define PINSEL_BITPIN1 2
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#define PINSEL_BITPIN8 16
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#define PINSEL_BITPIN9 18
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#define PINSEL_FIRST_ALT_FUNC 1
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#define PINSEL_SECOND_ALT_FUNC 2
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#define PINSEL_THIRD_ALT_FUNC 3
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// Values of Bits 0-3 in PINSEL to activate UART0
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#define UART0_PINSEL ((PINSEL_FIRST_ALT_FUNC<<PINSEL_BITPIN0)|(PINSEL_FIRST_ALT_FUNC<<PINSEL_BITPIN1))
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// Mask of Bits 0-4
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#define UART0_PINMASK (0x0000000F) /* PINSEL0 Mask for UART0 */
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// Values of Bits 16-19 in PINSEL to activate UART1
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#define UART1_PINSEL ((PINSEL_FIRST_ALT_FUNC<<PINSEL_BITPIN8)|(PINSEL_FIRST_ALT_FUNC<<PINSEL_BITPIN9))
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// Mask of Bits 16-19
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#define UART1_PINMASK (0x000F0000) /* PINSEL0 Mask for UART1 */
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// U0_LCR devisor latch bit
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#define UART0_LCR_DLAB 7
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// U1_LCR devisor latch bit
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#define UART1_LCR_DLAB 7
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/* baudrate divisor - use UART_BAUD macro
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* mode - see typical modes (uart.h)
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* fmode - see typical fmodes (uart.h)
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* NOTE: uart0Init(UART_BAUD(9600), UART_8N1, UART_FIFO_8);
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*/
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void uart0Init(uint16_t baud, uint8_t mode, uint8_t fmode)
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{
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// setup Pin Function Select Register (Pin Connect Block)
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// make sure old values of Bits 0-4 are masked out and
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// set them according to UART0-Pin-Selection
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PINSEL0 = (PINSEL0 & ~UART0_PINMASK) | UART0_PINSEL;
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U0IER = 0x00; // disable all interrupts
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U0IIR = 0x00; // clear interrupt ID register
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U0LSR = 0x00; // clear line status register
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// set the baudrate - DLAB must be set to access DLL/DLM
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U0LCR = (1 << UART0_LCR_DLAB); // set divisor latches (DLAB)
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U0DLL = (uint8_t) baud; // set for baud low byte
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U0DLM = (uint8_t) (baud >> 8); // set for baud high byte
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// set the number of characters and other
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// user specified operating parameters
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// Databits, Parity, Stopbits - Settings in Line Control Register
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U0LCR = (mode & ~(1 << UART0_LCR_DLAB)); // clear DLAB "on-the-fly"
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// setup FIFO Control Register (fifo-enabled + xx trig)
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U0FCR = fmode;
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} int uart0Putch(int ch)
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{
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while (!(U0LSR & ULSR_THRE)) // wait for TX buffer to empty
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continue; // also either WDOG() or swap()
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U0THR = (uint8_t) ch; // put char to Transmit Holding Register
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return (uint8_t) ch; // return char ("stdio-compatible"?)
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}
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const char *uart0Puts(const char *string)
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{
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char ch;
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while ((ch = *string)) {
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if (uart0Putch(ch) < 0)
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break;
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string++;
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}
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return string;
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}
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int uart0TxEmpty(void)
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{
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return (U0LSR & (ULSR_THRE | ULSR_TEMT)) == (ULSR_THRE | ULSR_TEMT);
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}
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void uart0TxFlush(void)
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{
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U0FCR |= UFCR_TX_FIFO_RESET; // clear the TX fifo
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}
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/* Returns: character on success, -1 if no character is available */
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int uart0Getch(void)
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{
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if (U0LSR & ULSR_RDR) // check if character is available
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return U0RBR; // return character
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return -1;
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}
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/* baudrate divisor - use UART_BAUD macro
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* mode - see typical modes (uart.h)
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* fmode - see typical fmodes (uart.h)
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* NOTE: uart0Init(UART_BAUD(9600), UART_8N1, UART_FIFO_8);
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*/
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void uart1Init(uint16_t baud, uint8_t mode, uint8_t fmode)
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{
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// setup Pin Function Select Register (Pin Connect Block)
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// make sure old values of Bits 0-4 are masked out and
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// set them according to UART0-Pin-Selection
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PINSEL0 = (PINSEL0 & ~UART1_PINMASK) | UART1_PINSEL;
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U1IER = 0x00; // disable all interrupts
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U1IIR = 0x00; // clear interrupt ID register
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U1LSR = 0x00; // clear line status register
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// set the baudrate - DLAB must be set to access DLL/DLM
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U1LCR = (1 << UART1_LCR_DLAB); // set divisor latches (DLAB)
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U1DLL = (uint8_t) baud; // set for baud low byte
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U1DLM = (uint8_t) (baud >> 8); // set for baud high byte
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// set the number of characters and other
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// user specified operating parameters
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// Databits, Parity, Stopbits - Settings in Line Control Register
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U1LCR = (mode & ~(1 << UART1_LCR_DLAB)); // clear DLAB "on-the-fly"
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// setup FIFO Control Register (fifo-enabled + xx trig)
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U1FCR = fmode;
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} int uart1Putch(int ch)
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{
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while (!(U1LSR & ULSR_THRE)) // wait for TX buffer to empty
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continue; // also either WDOG() or swap()
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U1THR = (uint8_t) ch; // put char to Transmit Holding Register
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return (uint8_t) ch; // return char ("stdio-compatible"?)
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}
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const char *uart1Puts(const char *string)
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{
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char ch;
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while ((ch = *string)) {
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if (uart1Putch(ch) < 0)
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break;
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string++;
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}
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return string;
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}
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int uart1TxEmpty(void)
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{
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return (U1LSR & (ULSR_THRE | ULSR_TEMT)) == (ULSR_THRE | ULSR_TEMT);
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}
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void uart1TxFlush(void)
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{
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U1FCR |= UFCR_TX_FIFO_RESET; // clear the TX fifo
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}
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/* Returns: character on success, -1 if no character is available */
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int uart1Getch(void)
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{
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if (U1LSR & ULSR_RDR) // check if character is available
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return U1RBR; // return character
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return -1;
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}
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