330 lines
7.7 KiB
C
330 lines
7.7 KiB
C
/*
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* =====================================================================================
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*
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* ________ .__ __ ________ ____ ________
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* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
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* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
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* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
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* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
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* \__> \/ \/ \/ \/ \/
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*
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* www.optixx.org
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*
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*
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* Version: 1.0
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* Created: 07/21/2009 03:32:16 PM
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* Author: david@optixx.org
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*
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* =====================================================================================
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <avr/io.h>
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#include <util/delay.h> /* for _delay_ms() */
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#include "config.h"
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#include "sram.h"
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#include "uart.h"
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#include "debug.h"
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#include "info.h"
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uint32_t addr_current = 0;
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uint32_t addr_stash = 0;
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void system_init(void)
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{
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/*-------------------------------------------------*/
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DDRA = 0x00;
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PORTA = 0x00;
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/*-------------------------------------------------*/
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DDRC |= ( (1 << AVR_ADDR_LATCH_PIN)
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| (1 << AVR_ADDR_SCK_PIN)
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| (1 << AVR_ADDR_SER_PIN)
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| (1 << AVR_ADDR_LOAD_PIN)
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| (1 << AVR_ADDR_UP_PIN));
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DDRC &= ~ ((1 << SNES_WR_PIN)
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| (1 << AVR_BTLDR_EN_PIN));
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PORTC &= ~((1 << AVR_ADDR_LATCH_PIN)
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| (1 << AVR_ADDR_SCK_PIN)
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| (1 << SNES_WR_PIN));
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PORTC |= ( (1 << AVR_ADDR_UP_PIN)
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| (1 << AVR_ADDR_LOAD_PIN));
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//| (1 << SNES_WR_PIN));
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/*-------------------------------------------------*/
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DDRB |= ( (1 << AVR_RD_PIN)
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| (1 << AVR_WR_PIN)
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| (1 << AVR_CS_PIN)
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| (1 << SNES_IRQ_PIN));
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PORTB |= ( (1 << AVR_RD_PIN)
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| (1 << AVR_WR_PIN)
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| (1 << AVR_CS_PIN)
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| (1 << SNES_IRQ_PIN));
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/*-------------------------------------------------*/
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DDRD |= ( (1 << AVR_SNES_SW_PIN)
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| (1 << HI_LOROM_SW_PIN)
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| (1 << SNES_WR_EN_PIN));
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PORTD |= (1 << HI_LOROM_SW_PIN);
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PORTD &= ~((1 << AVR_SNES_SW_PIN)
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| (1 << SNES_WR_EN_PIN));
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/*-------------------------------------------------*/
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}
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void sreg_set(uint32_t addr)
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{
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uint8_t i = 24;
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debug(DEBUG_SREG,"sreg_set: addr=0x%08lx",addr);
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while(i--) {
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if ((addr & ( 1L << i))){
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debug(DEBUG_SREG,"1");
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AVR_ADDR_SER_PORT |= ( 1 << AVR_ADDR_SER_PIN);
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} else {
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AVR_ADDR_SER_PORT &= ~( 1 << AVR_ADDR_SER_PIN);
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debug(DEBUG_SREG,"0");
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}
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AVR_ADDR_SCK_PORT |= (1 << AVR_ADDR_SCK_PIN);
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AVR_ADDR_SCK_PORT &= ~(1 << AVR_ADDR_SCK_PIN);
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}
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debug(DEBUG_SREG,"\n");
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AVR_ADDR_LATCH_PORT |= (1 << AVR_ADDR_LATCH_PIN);
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AVR_ADDR_LATCH_PORT &= ~(1 << AVR_ADDR_LATCH_PIN);
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counter_load();
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}
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inline void sram_bulk_addr_save()
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{
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addr_stash = addr_current;
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}
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inline void sram_bulk_addr_restore()
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{
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sreg_set(addr_stash);
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}
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void sram_bulk_read_start(uint32_t addr)
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{
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debug(DEBUG_SRAM,"sram_bulk_read_start: addr=0x%08lx\n\r", addr);
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addr_current = addr;
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avr_data_in();
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AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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sreg_set(addr);
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AVR_RD_PORT &= ~(1 << AVR_RD_PIN);
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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}
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inline void sram_bulk_read_next(void)
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{
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addr_current++;
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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counter_up();
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AVR_RD_PORT &= ~(1 << AVR_RD_PIN);
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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}
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inline uint8_t sram_bulk_read(void)
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{
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return AVR_DATA_PIN;
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}
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void sram_bulk_read_end(void)
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{
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debug(DEBUG_SRAM,"sram_bulk_read_end:\n");
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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AVR_CS_PORT |= (1 << AVR_CS_PIN);
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avr_data_in();
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}
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uint8_t sram_read(uint32_t addr)
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{
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uint8_t byte;
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debug(DEBUG_SRAM_RAW,"sram_read: addr=0x%08lx\n\r", addr);
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avr_data_in();
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AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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sreg_set(addr);
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AVR_RD_PORT &= ~(1 << AVR_RD_PIN);
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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byte = AVR_DATA_PIN;
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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AVR_CS_PORT |= (1 << AVR_CS_PIN);
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avr_data_in();
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return byte;
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}
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void sram_bulk_write_start(uint32_t addr)
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{
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debug(DEBUG_SRAM,"sram_bulk_write_start: addr=0x%08lx\n\r", addr);
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avr_data_out();
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AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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sreg_set(addr);
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AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
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}
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inline void sram_bulk_write_next(void)
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{
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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counter_up();
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AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
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}
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inline void sram_bulk_write( uint8_t data)
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{
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AVR_DATA_PORT = data;
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}
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void sram_bulk_write_end(void)
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{
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debug(DEBUG_SRAM,"sram_bulk_write_end:");
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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AVR_CS_PORT |= (1 << AVR_CS_PIN);
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avr_data_in();
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}
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void sram_write(uint32_t addr, uint8_t data)
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{
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debug(DEBUG_SRAM_RAW,"sram_write: addr=0x%08lx data=%x\n\r", addr, data);
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avr_data_out();
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AVR_CS_PORT &= ~(1 << AVR_CS_PIN);
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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AVR_RD_PORT |= (1 << AVR_RD_PIN);
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sreg_set(addr);
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AVR_WR_PORT &= ~(1 << AVR_WR_PIN);
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AVR_DATA_PORT = data;
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AVR_WR_PORT |= (1 << AVR_WR_PIN);
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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AVR_CS_PORT |= (1 << AVR_CS_PIN);
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avr_data_in();
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}
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void sram_bulk_copy_from_buffer(uint32_t addr, uint8_t * src, uint32_t len)
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{
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uint32_t i;
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uint8_t *ptr = src;
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debug(DEBUG_SRAM,"sram_bulk_copy_from_buffer: addr=0x%08lx src=0x%p len=%li\n\r",
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addr, src, len);
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sram_bulk_write_start(addr);
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for (i = addr; i < (addr + len); i++){
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sram_bulk_write(*ptr++);
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sram_bulk_write_next();
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}
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sram_bulk_write_end();
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}
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void sram_bulk_copy_into_buffer(uint32_t addr, uint8_t * dst, uint32_t len)
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{
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uint32_t i;
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uint8_t *ptr = dst;
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debug(DEBUG_SRAM,"sram_bulk_copy_into_buffer: addr=0x%08lx dst=0x%p len=%li\n\r",
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addr, dst, len);
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sram_bulk_read_start(addr);
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for (i = addr; i < (addr + len); i++) {
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*ptr = sram_bulk_read();
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sram_bulk_read_next();
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ptr++;
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}
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sram_bulk_read_end();
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}
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void sram_bulk_set(uint32_t addr, uint32_t len,uint8_t value){
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uint32_t i;
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debug(DEBUG_SRAM,"sram_bulk_set: addr=0x%08lx len=%li\n\r", addr,len);
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sram_bulk_write_start(addr);
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for (i = addr; i < (addr + len); i++) {
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if (0 == i % 0xfff)
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debug(DEBUG_SRAM,"sram_bulk_set: addr=0x%08lx\n\r", i);
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sram_bulk_write(value);
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sram_bulk_write_next();
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}
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sram_bulk_write_end();
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}
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