480 lines
12 KiB
C
480 lines
12 KiB
C
/*
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* =====================================================================================
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*
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* ________ .__ __ ________ ____ ________
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* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
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* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
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* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
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* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
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* \__> \/ \/ \/ \/ \/
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*
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* www.optixx.org
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*
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*
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* Version: 1.0
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* Created: 07/21/2009 03:32:16 PM
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* Author: david@optixx.org
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*
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* =====================================================================================
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*/
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <util/delay.h>
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#include <stdlib.h>
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#include <avr/pgmspace.h>
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#include <avr/eeprom.h>
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#include "usbdrv.h"
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#include "oddebug.h"
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#include "config.h"
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#include "requests.h"
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#include "uart.h"
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#include "sram.h"
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#include "debug.h"
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#include "info.h"
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#include "dump.h"
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#include "crc.h"
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#include "usb_bulk.h"
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#include "timer.h"
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#include "watchdog.h"
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#include "rle.h"
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#include "loader.h"
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#include "shared_memory.h"
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extern const char _rom[] PROGMEM;
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extern FILE uart_stdout;
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uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC);
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uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
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uint32_t req_addr = 0;
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uint32_t req_addr_end = 0;
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uint32_t req_size;
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uint8_t req_bank;
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uint32_t req_bank_size;
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uint16_t req_bank_cnt;
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uint8_t req_state = REQ_STATUS_IDLE;
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uint8_t rx_remaining = 0;
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uint8_t tx_remaining = 0;
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uint16_t sync_errors = 0;
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uint8_t tx_buffer[32];
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uint8_t data_buffer[4];
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uint32_t addr;
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uint16_t crc = 0;
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usbMsgLen_t usbFunctionSetup(uchar data[8])
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{
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usbRequest_t *rq = (void *) data;
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uint8_t ret_len = 0;
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if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
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req_bank = 0;
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rx_remaining = 0;
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debug(DEBUG_USB, "USB_BULK_UPLOAD_INIT: %i %i\n", rq->wValue.word,
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rq->wIndex.word);
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req_bank_size = (uint32_t) (1L << rq->wValue.word);
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req_bank_cnt = rq->wIndex.word;
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req_addr_end = (uint32_t) req_bank_size *req_bank_cnt;
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sync_errors = 0;
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debug(DEBUG_USB,
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"USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n",
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req_bank_size, req_bank_cnt, req_addr_end);
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shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, req_bank_cnt);
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if (req_addr == 0x000000) {
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timer_start();
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}
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
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req_state = REQ_STATUS_BULK_UPLOAD;
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req_addr = rq->wValue.word;
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req_addr = req_addr << 16;
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req_addr = req_addr | rq->wIndex.word;
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rx_remaining = rq->wLength.word;
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if (req_addr && req_addr % req_bank_size == 0) {
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#ifdef FLT_DEBUG
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debug(DEBUG_USB,
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"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n",
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req_bank, req_addr, timer_stop());
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#else
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debug(DEBUG_USB,
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"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n",
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req_bank, req_addr, timer_stop_int());
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#endif
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req_bank++;
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shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_bank);
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sram_bulk_write_start(req_addr);
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timer_start();
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} else {
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sram_bulk_write_start(req_addr);
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}
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ret_len = USB_MAX_TRANS;
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
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req_state = REQ_STATUS_BULK_UPLOAD;
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req_addr = rq->wValue.word;
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req_addr = req_addr << 16;
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req_addr = req_addr | rq->wIndex.word;
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rx_remaining = rq->wLength.word;
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#if 0
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if (req_addr && (req_addr % 0x1000) == 0) {
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debug(DEBUG_USB,
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"USB_BULK_UPLOAD_NEXT: bank=0x%02x addr=0x%08lx crc=%04x\n",
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req_bank, req_addr, crc_check_bulk_memory(req_addr - 0x1000,
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req_addr,
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req_bank_size));
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}
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sram_bulk_write_start(req_addr);
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#endif
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if (req_addr && (req_addr % req_bank_size) == 0) {
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#ifdef FLT_DEBUG
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debug(DEBUG_USB,
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"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n",
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req_bank, req_addr, timer_stop());
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#else
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debug(DEBUG_USB,
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"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n",
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req_bank, req_addr, timer_stop_int());
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#endif
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req_bank++;
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timer_start();
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shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, req_bank);
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sram_bulk_write_start(req_addr);
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}
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ret_len = USB_MAX_TRANS;
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_BULK_UPLOAD_END) {
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if (req_state != REQ_STATUS_BULK_UPLOAD) {
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debug(DEBUG_USB,
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"USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n");
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return 0;
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}
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debug(DEBUG_USB, "USB_BULK_UPLOAD_END:\n");
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req_state = REQ_STATUS_IDLE;
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sram_bulk_write_end();
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shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_END, 0);
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ret_len = 0;
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_CRC) {
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req_addr = rq->wValue.word;
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req_addr = req_addr << 16;
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req_addr = req_addr | rq->wIndex.word;
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debug(DEBUG_USB, "USB_CRC: addr=0x%08lx \n", req_addr);
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crc_check_bulk_memory(0x000000, req_addr, req_bank_size);
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ret_len = 0;
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_MODE_SNES) {
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req_state = REQ_STATUS_SNES;
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debug(DEBUG_USB, "USB_MODE_SNES:\n");
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ret_len = 0;
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_MODE_AVR) {
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req_state = REQ_STATUS_AVR;
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debug(DEBUG_USB, "USB_MODE_AVR:\n");
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ret_len = 0;
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_AVR_RESET) {
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debug(DEBUG_USB, "USB_AVR_RESET:\n");
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soft_reset();
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ret_len = 0;
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/*
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* -------------------------------------------------------------------------
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*/
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} else if (rq->bRequest == USB_CRC_ADDR) {
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req_state = REQ_STATUS_CRC;
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req_addr = rq->wValue.word;
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req_addr = req_addr << 16;
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req_addr = req_addr | rq->wIndex.word;
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debug(DEBUG_USB, "USB_CRC_ADDR: addr=0x%lx size=%i\n", req_addr,
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rq->wLength.word);
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req_size = rq->wLength.word;
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req_size = req_size << 2;
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tx_remaining = 2;
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debug(DEBUG_USB, "USB_CRC_ADDR: addr=0x%lx size=%li\n", req_addr,
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req_size);
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crc = crc_check_memory_range(req_addr, req_size, read_buffer);
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tx_buffer[0] = crc & 0xff;
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tx_buffer[1] = (crc >> 8) & 0xff;
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ret_len = 2;
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req_state = REQ_STATUS_IDLE;
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}
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usbMsgPtr = data_buffer;
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return ret_len; /* default for not implemented requests: return no data back to host */
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}
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/*
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* -------------------------------------------------------------------------
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*/
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void test_read_write()
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{
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uint8_t i;
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uint32_t addr;
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avr_bus_active();
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addr = 0x000000;
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i = 1;
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while (addr++ <= 0x0000ff) {
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sram_write(addr, i++);
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}
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addr = 0x000000;
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while (addr++ <= 0x0000ff) {
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info("read addr=0x%08lx %x\n", addr, sram_read(addr));
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}
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}
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void test_bulk_read_write()
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{
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uint8_t i;
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uint32_t addr;
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avr_bus_active();
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addr = 0x000000;
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i = 0;
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sram_bulk_write_start(addr);
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while (addr++ <= 0x8000) {
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sram_bulk_write(i++);
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sram_bulk_write_next();
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}
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sram_bulk_write_end();
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addr = 0x000000;
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sram_bulk_read_start(addr);
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while (addr <= 0x8000) {
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info("addr=0x%08lx %x\n", addr, sram_bulk_read());
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sram_bulk_read_next();
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addr++;
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}
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sram_bulk_read_end();
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}
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void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr)
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{
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uint32_t addr = 0;
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uint8_t c;
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sram_bulk_read_start(bottom_addr);
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for (addr = bottom_addr; addr < top_addr; addr++) {
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c = sram_bulk_read();
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if (c != 0xff)
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info("addr=0x%08lx c=0x%x\n", addr, c);
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sram_bulk_read_next();
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}
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sram_bulk_read_end();
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}
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void test_crc()
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{
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info("test_crc: clear\n");
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avr_bus_active();
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sram_bulk_set(0x000000, 0x10000, 0xff);
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info("test_crc: crc\n");
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crc_check_bulk_memory(0x000000, 0x10000, 0x8000);
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info("test_crc: check\n");
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test_non_zero_memory(0x000000, 0x10000);
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}
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void usb_connect()
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{
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uint8_t i = 0;
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info("USB init\n");
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usbDeviceDisconnect(); /* enforce re-enumeration, do this while */
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cli();
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info("USB disconnect\n");
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i = 10;
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while (--i) { /* fake USB disconnect for > 250 ms */
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led_on();
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_delay_ms(35);
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led_off();
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_delay_ms(65);
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}
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led_on();
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usbDeviceConnect();
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info("USB connect\n");
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}
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void boot_startup_rom()
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{
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info("Activate AVR bus\n");
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avr_bus_active();
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info("IRQ off\n");
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snes_irq_lo();
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snes_irq_off();
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snes_lorom();
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info("Set Snes lowrom \n");
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rle_decode(&_rom, ROM_BUFFER_SIZE, 0x000000);
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dump_memory(0x10000 - 0x100, 0x10000);
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snes_reset_hi();
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snes_reset_off();
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snes_irq_lo();
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snes_irq_off();
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info("IRQ off\n");
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snes_hirom();
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snes_wr_disable();
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info("Disable snes WR\n");
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snes_bus_active();
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info("Activate Snes bus\n");
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_delay_ms(100);
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info("Reset Snes\n");
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send_reset();
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_delay_ms(100);
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#if 0
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uint8_t i = 0;
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i = 20;
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info("Wait");
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while (--i) {
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_delay_ms(500);
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info(".");
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}
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info("\n");
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#endif
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}
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int main(void)
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{
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uart_init();
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stdout = &uart_stdout;
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info("Sytem start\n");
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system_init();
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#if 0
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test_read_write();
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test_bulk_read_write();
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test_crc();
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while (1);
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#endif
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info("Boot startup rom\n");
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boot_startup_rom();
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usbInit();
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usb_connect();
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while (1) {
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avr_bus_active();
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info("Activate AVR bus\n");
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info("IRQ off\n");
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snes_irq_lo();
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snes_irq_off();
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info("Set Snes lowrom\n");
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snes_lorom();
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info("Disable snes WR\n");
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snes_wr_disable();
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sei();
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info("USB poll\n");
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while (req_state != REQ_STATUS_SNES) {
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usbPoll();
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}
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shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
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info("USB poll done\n");
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snes_reset_hi();
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snes_reset_off();
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snes_irq_lo();
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snes_irq_off();
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info("IRQ off\n");
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set_rom_mode();
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snes_wr_disable();
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info("Disable snes WR\n");
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snes_bus_active();
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info("Activate Snes bus\n");
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_delay_ms(100);
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info("Reset Snes\n");
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send_reset();
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info("Poll\n");
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while (req_state != REQ_STATUS_AVR) {
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usbPoll();
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#ifdef DO_IRQ
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uint8_t i;
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uint16_t irq_count = 0;
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i = 10;
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while (--i) {
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_delay_ms(100);
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}
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info("Send IRQ %i\n", ++irq_count);
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send_irq();
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#endif
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#ifdef DO_BUS_STEALING
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avr_bus_active();
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sram_bulk_read_start(0x003000);
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c = sram_bulk_read();
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i = 5;
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while (--i) {
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_delay_ms(500);
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info("Wait to switch to snes mode %i\n", i);
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}
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if (req_bank_size == 0x8000) {
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snes_lorom();
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info("Set Snes lowrom \n");
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} else {
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snes_hirom();
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info("Set Snes hirom \n");
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}
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snes_wr_disable();
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info("Disable snes WR\n");
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snes_bus_active();
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info("Activate Snes bus\n");
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info("Read 0x3000=%c\n", c);
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#endif
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}
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}
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return 0;
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}
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