Firmware: remove now unused mcu_ovr statements

src/cli.c

@@ -283,9 +283,7 @@ static void cmd_show_directory(void) {
 static void cmd_loadrom(void) {
   uint32_t address = 0;
   uint8_t flags = LOADROM_WITH_SRAM | LOADROM_WITH_RESET;
-  set_mcu_ovr(1);
   load_rom((uint8_t*)curchar, address, flags);
-  set_mcu_ovr(0);
 }
 
 static void cmd_loadraw(void) {
@@ -296,7 +294,6 @@ static void cmd_loadraw(void) {
 static void cmd_saveraw(void) {
   uint32_t address = parse_unsigned(0,16777216);
   uint32_t length = parse_unsigned(0,16777216);
-  set_mcu_ovr(0);
   save_sram((uint8_t*)curchar, length, address);
 }
 

src/fpga.c

@@ -190,17 +190,3 @@ void fpga_rompgm() {
   fpga_postinit();
 }
 
-void set_mcu_ovr(uint8_t val) {
-  if(!val) {
-    /* shared mode */
-    FPGA_SPI_SLOW();
-    SET_MCU_OVR();
-    printf("SPI slow\n");
-  } else {
-    /* mcu exclusive mode */
-    FPGA_SPI_FAST();
-    CLR_MCU_OVR();
-    printf("SPI fast\n");
-  }
-}
-

src/fpga.h

@@ -38,8 +38,6 @@ void fpga_init(void);
 void fpga_postinit(void);
 void fpga_pgm(uint8_t* filename);
 void fpga_rompgm(void);
-void set_mcu_ovr(uint8_t val);
-
 
 uint8_t SPI_OFFLOAD;
 
@@ -67,7 +65,5 @@ SET_FPGA_DIN(data); CCLK();} while (0)
 #define SET_CCLK()			do {BITBAND(LPC_GPIO0->FIOSET, 11) = 1;} while (0)
 #define CLR_CCLK()			do {BITBAND(LPC_GPIO0->FIOCLR, 11) = 1;} while (0)
 #define CCLK()				do {SET_CCLK(); CLR_CCLK();} while (0)
-#define SET_MCU_OVR()			do {BITBAND(LPC_GPIO2->FIOSET, 8) = 1;} while (0)
-#define CLR_MCU_OVR()			do {BITBAND(LPC_GPIO2->FIOCLR, 8) = 1;} while (0)
 #define SET_FPGA_DIN(data)		do {LPC_GPIO2->FIOPIN1 = data;} while (0)
 #endif

src/main.c

@@ -90,18 +90,16 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
   fpga_rompgm();
   sram_writebyte(0, SRAM_CMD_ADDR);
   while(1) {
-    set_mcu_ovr(1);
     if(disk_state == DISK_CHANGED) {
       sdn_init();
       newcard = 1;
     }
     load_bootrle(SRAM_MENU_ADDR);
+sram_hexdump(SRAM_MENU_ADDR+0xffc0, 16);
     set_saveram_mask(0x1fff);
     set_rom_mask(0x3fffff);
     set_mapper(0x7);
-    set_mcu_ovr(0);
     snes_reset(0);
-    delay_ms(100);
     while(get_cic_state() == CIC_FAIL) {
       rdyled(0);
       readled(0);
@@ -137,8 +135,6 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
     rdyled(1);
     readled(0);
     writeled(0);
-    /* exclusive mode */
-    set_mcu_ovr(1);
 
     *fs_path=0;
     uint32_t saved_dir_id;
@@ -201,9 +197,6 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
 
     sram_writebyte(0, SRAM_CMD_ADDR);
 
-    /* shared mode */
-    set_mcu_ovr(0);
-
     if((rtc_state = rtc_isvalid()) != RTC_OK) {
       printf("RTC invalid!\n");
       sram_writebyte(0xff, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
@@ -242,7 +235,6 @@ sram_hexdump(SRAM_DIR_ADDR, 0x300);
       switch(cmd) {
 	case SNES_CMD_LOADROM:
 	  get_selected_name(file_lfn);
-	  set_mcu_ovr(1);
 	  printf("Selected name: %s\n", file_lfn);
 	  filesize = load_rom(file_lfn, SRAM_ROM_ADDR, LOADROM_WITH_SRAM | LOADROM_WITH_RESET);
 	  break;

src/memory.c

@@ -172,7 +172,6 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
   tick_t ticksstart, ticks_total=0;
   ticksstart=getticks();
   printf("%s\n", filename);
-  if(flags & LOADROM_WITH_RESET) set_mcu_ovr(1);
   file_open(filename, FA_READ);
   if(file_res) {
     uart_putc('?');
@@ -269,7 +268,6 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
   fpga_set_features(romprops.fpga_features);
 
   if(flags & LOADROM_WITH_RESET) {
-    set_mcu_ovr(0);
     fpga_dspx_reset(1);
     snes_reset(1);
     delay_ms(10);

src/snes.c

@@ -46,7 +46,6 @@ extern snes_romprops_t romprops;
 volatile int reset_changed;
 
 void prepare_reset() {
-  set_mcu_ovr(1);
   snes_reset(1);
   delay_ms(1);
   if(romprops.ramsize_bytes && fpga_test() == FPGA_TEST_TOKEN) {
@@ -165,15 +164,10 @@ void get_selected_name(uint8_t* fn) {
 }
 
 void snes_bootprint(void* msg) {
-  set_mcu_ovr(1);
   sram_writeblock(msg, SRAM_CMD_ADDR, 33);
-  set_mcu_ovr(0);
-  delay_ms(30);
-  set_mcu_ovr(1);
 }
 
 void snes_menu_errmsg(int err, void* msg) {
-  set_mcu_ovr(1);
   sram_writeblock(msg, SRAM_CMD_ADDR+1, 64);
   sram_writebyte(err, SRAM_CMD_ADDR);
 }