PCB: Rev.C RC1
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EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
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EESchema Schematic File Version 2 date Tue 08 Feb 2011 01:05:31 AM CET
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EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
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EESchema Schematic File Version 2 date Tue 08 Feb 2011 01:05:31 AM CET
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EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
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EESchema Schematic File Version 2 date Tue 08 Feb 2011 01:05:31 AM CET
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EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
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EESchema Schematic File Version 2 date Tue 08 Feb 2011 01:05:31 AM CET
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LIBS:power
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LIBS:power
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LIBS:device
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LIBS:device
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LIBS:transistors
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EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
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EESchema Schematic File Version 2 date Tue 08 Feb 2011 01:05:31 AM CET
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LIBS:power
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LIBS:power
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Wire Notes Line
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Wire Notes Line
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3650 4200 6150 4200
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3650 4200 6150 4200
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Text Notes 3300 3250 0 100 ~ 0
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Text Notes 3300 3250 0 100 ~ 0
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Changes from Rev.A / TODO:\n [x] remove FPGA from JTAG chain\n [x] remove SNES IRQ_DIR+IRQ, replace with IRQ_OE. IRQ is unidirectional cart -> console\n (replace 1gate w/ transistor)\n [x] disconnect P2.10 from FPGA, using a different GPIO for IRQ / INIT_B\n [x] add pullup to P2.10\n [ ] add JTAG pullups\n [x] add series resistor for CPU_CLK\n [x] add a jumper in PIC MCLR line to MCU\n [x] change PIC to DIP8 type for easier preprogramming\n [x] change "P1" to "P401" in pin description in silk screen\n [x] filter CIC data lines\n [x] rearrange SD card interface/LEDs on MCU\n [ ] RAs for SNES signals?\n [x] reroute/add decoupling capacitors\n [x] filter SNES control signals (RD, WR, PARD, PAWR, CPU_CLK, IRQ)\n [x] replace 4Mbit SRAM with much cheaper TSOP-II type\n [ ] add inverse polarity protection
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Changes from Rev.A / TODO:\n [x] remove FPGA from JTAG chain\n [x] remove SNES IRQ_DIR+IRQ, replace with IRQ_OE. IRQ is unidirectional cart -> console\n (replace 1gate w/ transistor)\n [x] disconnect P2.10 from FPGA, using a different GPIO for IRQ / INIT_B\n [x] add pullup to P2.10\n [ ] add JTAG pullups\n [x] add series resistor for CPU_CLK\n [x] add a jumper in PIC MCLR line to MCU\n [x] change PIC to DIP8 type for easier preprogramming\n [x] change "P1" to "P401" in pin description in silk screen\n [x] filter CIC data lines\n [x] rearrange SD card interface/LEDs on MCU\n [ ] RAs for SNES signals?\n [x] reroute/add decoupling capacitors\n [x] filter SNES control signals (RD, WR, PARD, PAWR, CPU_CLK, IRQ)\n [x] replace 4Mbit SRAM with much cheaper TSOP-II type\n [x] add inverse polarity protection
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$Sheet
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$Sheet
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S 1250 1250 1700 1250
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S 1250 1250 1700 1250
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U 4B6E16F2
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U 4B6E16F2
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EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
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EESchema Schematic File Version 2 date Tue 08 Feb 2011 01:05:31 AM CET
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LIBS:power
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LIBS:power
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LIBS:device
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LIBS:device
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LIBS:transistors
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LIBS:transistors
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