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Merge branch 'master' of ssh://shion.micecat.ath.cx/~ikari/public_html/git/sd2snes

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This commit is contained in:
Maximilian Rehkopf 2009-11-06 10:48:07 +01:00
commit 586262726e
37 changed files with 4984 additions and 2697 deletions
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BIN
pcb/cart/sd2snes18.brd
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pcb/cart/sd2snes18.sch
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6
snes/Makefile
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@ -1,7 +1,9 @@
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 # gfx.o65 # vars.o65
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 text.o65 dma.o65 menu.o65 # gfx.o65 # vars.o65
all: menu.bin
all: menu.bin menu.smc
menu.smc: menu.bin
cat menu.bin sd2snes.rom > $@
menu.bin: $(OBJS)
sneslink -fsmc -o $@ $^

90
snes/const.a65
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@ -1,3 +1,87 @@
zero .word 0
hello .byt "Hello World!"
bg2tile .byt $20
version .byt " v0.1",0
zero .word 0
bg2tile .byt $20
hdma_pal_src .byt 44
.byt $60, $2d
.byt 24
.byt $00, $00
.byt 2
.byt $60, $2d
.byt 10
.byt $00, $00
.byt 10
.byt $20, $04
.byt 10
.byt $40, $08
.byt 10
.byt $60, $0c
.byt 10
.byt $80, $10
.byt 10
.byt $a0, $14
.byt 10
.byt $c0, $18
.byt 10
.byt $e0, $1c
.byt 10
.byt $00, $21
.byt 10
.byt $20, $25
.byt 10
.byt $40, $29
.byt 32
.byt $60, $2d
.byt 2
.byt $20, $04
.byt 1
.byt $60, $2d
.byt $00
hdma_cg_addr_src
.byt $f0
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $f0
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00
hdma_mode_src .byt 74, $03, $01, $05, $00
hdma_scroll_src .byt 74
.byt $00, $00, $ff, $00
.byt $01
.byt $fc, $00, $05, $00
.byt $00
hdma_math_src .byt 1
.byt $00, $e0
.byt 1
.byt $00, $e0
.byt 10
.byt $20, $f0
.byt 1
.byt $00, $e0
.byt 0

109
snes/data.a65
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@ -1,3 +1,108 @@
.data
testvar .byt 0
testvar2 .word 0
;don't anger the stack!
dirptr_addr .word 0
dirptr_bank .byt 0
dirptr_idx .word 0
dirptr_table .word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
dirent_addr .word 0
dirent_bank .byt 0
dirent_type .byt 0
.byt 0
dirlog .word 0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
stack .word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
;----------parameters for text output----------
print_x .byt 0 ;x coordinate
.byt 0
print_y .byt 0 ;y coordinate
.byt 0
print_src .word 0 ;source data address
print_bank .byt 0 ;source data bank
print_pal .byt 0 ;palette number for text output
;----------parameters for dma----------
dma_a_bank .byt 0
dma_a_addr .word 0
dma_b_reg .byt 0
dma_len .word 0
dma_mode .byt 0
;----------state information----------
isr_done .byt 0 ; isr done flag
bar_xl .byt 0 ; logical x position of select bar
bar_yl .byt 0 ; logical y position of select bar
bar_x .byt 0 ; pixel x position of select bar
bar_y .byt 0 ; pixel y position of select bar
bar_w .byt 0 ; bar width
menu_state .byt 0 ; menu state (0=file select)
menu_dirty .byt 0 ; menu dirty (e.g. after state change or when redraw is needed)
cursor_x .byt 0 ; current cursor position (x)
cursor_y .byt 0 ; current cursor position (y)
fd_addr .word 0 ; address of current "file descriptor"
fd_bank .byt 0 ; bank of current "file descriptor"
fd_fnoff .word 0 ; offset of filename in file descriptor
fd_data ; contents of a "file descriptor"
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0
;----------hdma tables in WRAM (must be stable when cartridge is cut off)
hdma_pal .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0
hdma_cg_addr .byt 0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0
hdma_mode .byt 0,0,0,0,0
hdma_scroll .byt 0
.byt 0,0,0,0
.byt 0
.byt 0,0,0,0
.byt 0
hdma_math .byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
infloop .byt 0,0 ; to be filled w/ 80 FE

2571
snes/font.a65
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3
snes/header.a65
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@ -24,6 +24,7 @@ IRQ_16bit:
rep #$30
pha: phx: phy: phd: phb
jsl @IRQ_ROUTINE
rep #$30
bra int_exit
;error vectors
@ -44,7 +45,7 @@ NMI_8bit:
*= $C0FFB0
.byt "01" ;2 bytes - company id
.byt "MR" ;2 bytes - company id
.byt "SNSD" ;4 bytes - rom id
*= $C0FFC0

3450
snes/logo.a65
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258
snes/main.a65
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@ -1,137 +1,133 @@
#include "memmap.i65"
#include "dma.i65"
GAME_MAIN:
sep #$20 : .as
jsr snes_init
jsr font_dma
jsr setup_gfx
jsr setup_hdma
jsr tests
- wai
bra -
jsr colortest
sep #$20 : .as
lda #$00
sta @AVR_CMD
sta @AVR_PARAM
rep #$20 : .al
sta @AVR_PARAM+1
jsr menu_init
sep #$20 : .as
jsr menuloop
cli
stz $4200
jmp @infloop ;infinite loop in WRAM
font_dma:
colortest:
sep #$20 : .as
rep #$10 : .xl
stz $2130
rts
setup_gfx:
sep #$20 : .as
rep #$10 : .xl
stz $420b
stz $420c
lda #$01 ;A to B; (direct); non-fixed, inc, two reg
sta $4300 ;to DMA ch.0 ctrl
lda #^font ;font source bank
ldy #!font ;font source address
sty $4302 ;address -> 4302,4303
sta $4304 ;bank -> 4304
ldx #$1000 ;transfer size
stx $4305 ;to reg
stz $2116 ;VRAM address 0
stz $2117 ;
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01 ;ch 0 enable
sta $420b ;GPDMA GO!
lda #$09 ;A to B; fixed, two reg
sta $4300
lda #^zero
ldy #!zero
sty $4302
sta $4304
ldx #$1000
stx $4305 ;zero 4096b of VRAM
ldx #$3000
stx $2116 ;from 0x6000-0x6fff
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
;clear tilemap buffers
ldx #$0000
stx $2181
lda #$01
sta $420b
sta $2183
DMA0(#$08, #0, #^zero, #!zero, #$80)
; copy logo
lda #$01 ;A to B; (direct); non-fixed, inc, two reg
sta $4300 ;to DMA ch.0 ctrl
lda #^logo ;font source bank
ldy #!logo ;font source address
sty $4302 ;address -> 4302,4303
sta $4304 ;bank -> 4304
ldx #$4b00 ;transfer size
stx $4305 ;to reg
ldx #$800 ;after font
stx $2116 ;VRAM address 0x1000
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01 ;ch 0 enable
sta $420b ;GPDMA GO!
; copy logo tilemap
lda #$01 ;A to B; (direct); non-fixed, inc, two reg
sta $4300 ;to DMA ch.0 ctrl
lda #^logomap ;font source bank
ldy #!logomap ;font source address
sty $4302 ;address -> 4302,4303
sta $4304 ;bank -> 4304
ldx #$300 ;transfer size
stx $4305 ;to reg
ldx #$3400 ;BG1 tilemap
stx $2116 ;VRAM address 0x6800
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01 ;ch 0 enable
sta $420b ;GPDMA GO!
;copy test text
lda #$00 ;A->B, inc, 1 reg
sta $4300
lda #^hello
ldy #!hello
sty $4302
sta $4304
ldx #$c ;24 bytes
stx $4305
ldx #$3020
;copy 2bpp font (can be used as 4-bit lores font!)
ldx #$4000
stx $2116
lda #$18
sta $4301
stz $2115 ;increment after LOW byte (write to 2118)
lda #$01
sta $420b
DMA0(#$01, #$2000, #^font2, #!font2, #$18)
lda #$08 ;A->B, fixed, 1 reg
sta $4300
lda #^bg2tile
ldy #!bg2tile
sty $4302
sta $4304
ldx #$c ;24 bytes
stx $4305
ldx #$3020
;copy 4bpp font
ldx #$0000
stx $2116
lda #$19
sta $4301
DMA0(#$01, #$4000, #^font4, #!font4, #$18)
;clear BG1 tilemap
ldx #BG1_TILE_BASE
stx $2116
DMA0(#$09, #$800, #^zero, #!zero, #$18)
;clear BG2 tilemap
ldx #BG2_TILE_BASE
stx $2116
DMA0(#$09, #$800, #^zero, #!zero, #$18)
;copy logo tiles
ldx #$2000
stx $2116
DMA0(#$01, #$3480, #^logo, #!logo, #$18)
;copy logo tilemap
ldx #BG1_TILE_BASE
stx $2116
DMA0(#$01, #$280, #^logomap, #!logomap, #$18)
;set palette
stz $2121
DMA0(#$00, #$200, #^palette, #!palette, #$22)
;copy hdma tables so we can work "without" the cartridge
;palette
lda #^hdma_pal
ldx #!hdma_pal
stx $2181
sta $2183
DMA0(#$00, #52, #^hdma_pal_src, #!hdma_pal_src, #$80)
;CG addr for palette
lda #^hdma_cg_addr
ldx #!hdma_cg_addr
stx $2181
sta $2183
DMA0(#$00, #227, #^hdma_cg_addr_src, #!hdma_cg_addr_src, #$80)
;screen mode
lda #^hdma_mode
ldx #!hdma_mode
stx $2181
sta $2183
DMA0(#$00, #5, #^hdma_mode_src, #!hdma_mode_src, #$80)
;bg scroll
lda #^hdma_scroll
ldx #!hdma_scroll
stx $2181
sta $2183
DMA0(#$00, #11, #^hdma_scroll_src, #!hdma_scroll_src, #$80);
;color math
lda #^hdma_math
ldx #!hdma_math
stx $2181
sta $2183
DMA0(#$00, #19, #^hdma_math_src, #!hdma_math_src, #$80);
;copy infinite loop to WRAM
lda #$80
sta $2115 ;increment after HIGH byte (write to 2119)
lda #$01
sta $420b
sta infloop
lda #$fe
sta infloop+1
stz $2121 ;palette index 0
lda #$00
sta $4300
lda #^palette
ldy #!palette
sty $4302
sta $4304
ldx #$200
stx $4305
lda #$22 ;CG RAM port
sta $4301
lda #$01
sta $420b
rts
tests:
sep #$30 : .as : .xs ;8-bit accumulator and index
lda #$0f
sta $2100 ;screen on, full brightness
lda #$04 ;mode 4, mode 5 is a bitch :(
sep #$20 : .as ;8-bit accumulator
rep #$10 : .xl ;16-bit index
lda #$03 ;mode 3, mode 5 via HDMA :D
sta $2105
lda #$34 ;Tilemap addr 0x6800
lda #$54 ;Tilemap addr 0xA800
sta $2107 ;for BG1
lda #$30 ;Tilemap addr 0x6000
lda #$50 ;Tilemap addr 0xA000
sta $2108 ;for BG2
lda #$40 ;chr base addr:
sta $210b ;BG1=0x0000, BG2=0x8000
lda #$03 ;enable BG1+BG2
sta $212c ;BG Main
sta $212d ;BG Sub
@ -140,23 +136,15 @@ tests:
lda #$00
sta $2130
stz $2121
lda #$0
ldx #$0
ldy #$0
- bra -
-
inx
bne +
iny
+
stz $2121
stx $2122
sty $2122
bra -
lda #$0f
sta $2100 ;screen on, full brightness
lda #9
sta bar_yl
rts
snes_init:
sep #$20 : .as ;8-bit accumulator
sep #$20 : .as ;8-bit accumulator
rep #$10 : .xl ;16-bit index
lda #$01
sta $420d ; FAAAAAST
lda #$8f
@ -170,7 +158,7 @@ snes_init:
stz $2106 ;
stz $2107 ;
stz $2108 ;
stz $2109 ;
stz $2109 ;
stz $210a ;
stz $210b ;
stz $210c ;
@ -180,7 +168,7 @@ snes_init:
stz $210e ;
stz $210f ;
stz $210f ;
lda #$00
lda #$05
sta $2110 ;
stz $2110 ;
stz $2111 ;
@ -202,7 +190,7 @@ snes_init:
lda #$01
sta $211b ;
stz $211c ;
stz $211c ;
stz $211c ;
stz $211d ;
stz $211d ;
stz $211e ;
@ -245,5 +233,17 @@ snes_init:
stz $420a ;
stz $420b ;
stz $420c ;
;clear WRAM lower page
; ldx #$0200
; stx $2181
; lda #$00
; sta $2183
; DMA0(#$08, #$FF00, #^zero, #!zero, #$80)
; ldx #$0000
; stx $2181
; lda #$00
; sta $2183
; DMA0(#$08, #$1e0, #^zero, #!zero, #$80)
rts

110
snes/palette.a65
View File

@ -1,5 +1,4 @@
palette .byt $00, $00, $ff, $7f, $00, $00, $18, $63
.byt $60, $2d, $df, $6b, $70, $05, $7f, $4f
palette .byt $42, $08, $ff, $7f, $00, $00, $18, $63
.byt $10, $42, $10, $42, $10, $42, $10, $42
.byt $10, $42, $10, $42, $10, $42, $10, $42
.byt $10, $42, $10, $42, $10, $42, $10, $42
@ -9,56 +8,57 @@ palette .byt $00, $00, $ff, $7f, $00, $00, $18, $63
.byt $10, $42, $10, $42, $10, $42, $10, $42
.byt $10, $42, $10, $42, $10, $42, $10, $42
.byt $10, $42, $10, $42, $10, $42, $10, $42
.byt $83, $52, $ae, $77, $8e, $73, $c5, $5a
.byt $ce, $7b, $81, $10, $a1, $14, $c1, $18
.byt $61, $0c, $41, $08, $23, $25, $6b, $6f
.byt $ad, $77, $63, $2d, $66, $4e, $27, $46
.byt $49, $6b, $e6, $3d, $e3, $41, $c6, $72
.byt $04, $4e, $05, $7f, $a6, $66, $e5, $7a
.byt $86, $62, $05, $46, $26, $52, $e6, $76
.byt $26, $4e, $87, $5e, $65, $5a, $06, $7f
.byt $67, $5a, $a7, $6a, $c2, $41, $a2, $2d
.byt $c4, $41, $24, $5a, $05, $52, $26, $56
.byt $a2, $3d, $4a, $2d, $6c, $31, $dc, $1c
.byt $bf, $14, $35, $29, $9f, $14, $37, $29
.byt $7f, $10, $31, $29, $6a, $2d, $17, $25
.byt $67, $2d, $2f, $25, $11, $21, $11, $25
.byt $4a, $29, $bc, $18, $31, $25, $bf, $18
.byt $65, $31, $6c, $2d, $6d, $2d, $8b, $31
.byt $51, $29, $fb, $20, $c4, $39, $68, $2e
.byt $e4, $2d, $a1, $31, $81, $2d, $0d, $2b
.byt $2e, $27, $eb, $26, $67, $2a, $c4, $29
.byt $61, $29, $ec, $2a, $6f, $23, $6f, $27
.byt $4e, $27, $0c, $27, $a9, $26, $06, $2a
.byt $cb, $2e, $69, $2e, $e5, $2d, $06, $32
.byt $28, $36, $ac, $26, $c4, $31, $28, $32
.byt $67, $19, $c6, $6e, $c3, $3d, $4f, $29
.byt $f4, $20, $f8, $20, $45, $29, $53, $29
.byt $bd, $18, $88, $31, $18, $21, $9f, $10
.byt $73, $2d, $d1, $18, $d9, $1c, $fa, $1c
.byt $a3, $29, $82, $29, $41, $25, $89, $26
.byt $23, $1d, $0e, $27, $6b, $22, $87, $19
.byt $2e, $23, $c9, $1d, $cd, $21, $f6, $1e
.byt $ac, $22, $30, $22, $ff, $17, $8a, $15
.byt $ff, $1b, $5a, $1f, $ac, $19, $b4, $1e
.byt $7b, $1f, $28, $15, $cd, $19, $71, $1e
.byt $b5, $1e, $d5, $1a, $73, $1e, $ee, $1d
.byt $8b, $19, $e6, $10, $39, $1f, $31, $22
.byt $28, $19, $df, $1b, $93, $1a, $9c, $1f
.byt $ca, $18, $d7, $1c, $ce, $18, $aa, $14
.byt $88, $10, $b8, $18, $cc, $18, $9b, $14
.byt $c8, $18, $a6, $14, $81, $14, $01, $1d
.byt $f7, $1e, $0f, $1e, $18, $23, $ff, $13
.byt $48, $15, $8a, $1d, $9c, $1b, $bd, $1b
.byt $30, $1e, $48, $19, $a1, $18, $a1, $10
.byt $61, $10, $c3, $39, $c8, $5a, $2a, $67
.byt $6c, $6f, $c6, $5a, $4b, $6b, $29, $67
.byt $e7, $5e, $a5, $56, $e1, $3d, $64, $4e
.byt $c1, $39, $a6, $56, $a1, $35, $65, $4e
.byt $61, $2d, $81, $31, $01, $42, $e3, $3d
.byt $85, $52, $08, $63, $e8, $5e, $25, $46
.byt $8d, $73, $09, $63, $84, $52, $03, $42
.byt $63, $4e, $23, $46, $62, $4e, $22, $46
.byt $41, $29, $21, $25, $04, $42, $a8, $56
.byt $87, $52, $e4, $3d, $0a, $63, $21, $46
.byt $a4, $56, $01, $21, $e1, $1c, $a3, $35
.byt $10, $42, $10, $42, $10, $42, $10, $42
.byt $10, $42, $10, $42, $10, $42, $10, $42
.byt $10, $42, $03, $21, $64, $2d, $62, $0c
.byt $e2, $20, $44, $29, $85, $31, $c5, $3d
.byt $8c, $73, $47, $4a, $23, $25, $84, $31
.byt $e7, $3d, $e5, $41, $65, $5a, $c6, $3d
.byt $a6, $62, $06, $7f, $04, $4a, $08, $7b
.byt $e3, $45, $83, $39, $c6, $6e, $24, $52
.byt $e4, $7a, $e6, $76, $45, $52, $c7, $72
.byt $e4, $49, $23, $4e, $86, $5e, $68, $4e
.byt $a2, $31, $c5, $35, $85, $62, $c5, $2d
.byt $87, $5e, $a4, $2d, $c4, $3d, $a5, $6a
.byt $47, $5a, $07, $4a, $4d, $29, $16, $29
.byt $a7, $35, $36, $25, $be, $18, $1a, $21
.byt $83, $2d, $18, $21, $50, $31, $fb, $20
.byt $4a, $2d, $2e, $29, $dc, $1c, $31, $29
.byt $6a, $2d, $de, $1c, $aa, $31, $87, $31
.byt $53, $2d, $e6, $41, $40, $46, $aa, $32
.byt $28, $2e, $2f, $2b, $4f, $27, $0e, $27
.byt $cb, $2a, $68, $2a, $e4, $2d, $83, $29
.byt $61, $29, $0d, $2f, $4f, $2b, $ec, $2a
.byt $ab, $2a, $cc, $2e, $68, $2e, $4e, $2b
.byt $8a, $2e, $ad, $26, $a4, $31, $0d, $2b
.byt $26, $19, $4e, $27, $ef, $2a, $47, $19
.byt $c4, $14, $c2, $39, $c3, $49, $c2, $45
.byt $46, $56, $65, $2d, $f8, $20, $4c, $29
.byt $2f, $29, $19, $29, $51, $29, $c9, $18
.byt $da, $18, $a8, $18, $9c, $18, $d1, $18
.byt $84, $10, $db, $18, $7e, $14, $f1, $1c
.byt $eb, $20, $a2, $18, $48, $2a, $20, $25
.byt $e3, $20, $ee, $26, $4a, $22, $e5, $18
.byt $ef, $21, $50, $1e, $48, $19, $e5, $14
.byt $58, $1f, $ff, $17, $bd, $1f, $ab, $1d
.byt $f7, $1e, $cc, $19, $ff, $1f, $d5, $1e
.byt $c4, $10, $7a, $1f, $6a, $19, $ef, $19
.byt $72, $1e, $94, $1a, $93, $1e, $ce, $1d
.byt $49, $15, $9c, $1f, $b3, $1e, $94, $1e
.byt $bd, $17, $18, $1f, $de, $1f, $8b, $19
.byt $71, $22, $49, $19, $d4, $18, $ce, $18
.byt $88, $10, $b6, $18, $b1, $18, $a6, $14
.byt $c4, $5a, $e2, $5e, $d4, $1e, $06, $15
.byt $ed, $1d, $38, $1f, $ce, $19, $27, $19
.byt $a0, $39, $a9, $56, $0b, $63, $45, $4a
.byt $2a, $63, $c8, $56, $88, $52, $6b, $6f
.byt $6e, $6f, $4d, $6b, $ae, $77, $24, $46
.byt $09, $5f, $23, $46, $4a, $6b, $e9, $5a
.byt $e1, $41, $c3, $3d, $e4, $41, $82, $35
.byt $64, $4a, $a7, $52, $86, $4e, $2c, $63
.byt $a4, $52, $ca, $5a, $65, $4e, $43, $29
.byt $62, $2d, $8d, $73, $8f, $6f, $66, $4e
.byt $c8, $5a, $42, $46, $21, $25, $29, $67
.byt $42, $4a, $c6, $56, $e2, $1c, $02, $21
.byt $07, $63, $a2, $14, $eb, $5e, $c1, $18
.byt $82, $10, $e7, $5a, $cf, $7b, $82, $4e

160
snes/reset.a65
View File

@ -2,131 +2,67 @@
; See http://bisqwit.iki.fi/source/snescom.html for details.
#include "memmap.i65"
#include "dma.i65"
#define TILE_ADDR_REG_VAL(addr, scsize) \
(((addr & $FC00) >> 8) + scsize)
#define BMAP_ADDR_REG_VAL(addr, addr2) \
(((addr & $F000) >> 12) | (((addr2 & $F000) >> 12) << 4))
; NMI - called once per screen refresh (or something like that)
; NMI - called on VBlank
NMI_ROUTINE:
sep #$20 : .as
lda #$00
pha
plb
lda $4210
ldx #BG1_TILE_BASE+32*10
stx $2116
DMA0(#$01, #$380*2-64*10, #^BG1_TILE_BUF, #!BG1_TILE_BUF+64*10, #$18)
ldx #BG2_TILE_BASE+32*10
stx $2116
DMA0(#$01, #$380*2-64*10, #^BG2_TILE_BUF, #!BG2_TILE_BUF+64*10, #$18)
ldx #BG2_TILE_BASE
stx $2116
DMA0(#$01, #64*10, #^BG2_TILE_BUF, #!BG2_TILE_BUF, #$18)
lda bar_yl
asl
asl
asl
sta bar_y
lda bar_y
cmp #224
bne +
lda #1
+
sta bar_y
cmp #113
bcs lower_half
sta hdma_math
lda #$01
sta hdma_math+3
bra math_cont
lower_half
clc
sbc #110
sta hdma_math+3
lda #112
sta hdma_math
math_cont
lda #$3e ; ch. 1-5
sta @$420c ; trigger HDMA
lda #$01
sta isr_done
rtl
; IRQ - called when triggered (which is..?)
; IRQ - called when triggered
IRQ_ROUTINE:
sep #$20 : .as
lda $4211 ;Acknowledge irq
rtl
; To be called regularly - updated screen contents
; Sends the palette structure to PPU
PaletteDMA:
.xl : .as
lda #$00 : sta $4300 ;dma type
lda #$22 : sta $4301 ;address $2122
lda #^(PALETTE_ADDRESS) : sta $4304
ldx #!(PALETTE_ADDRESS) : stx $4302
ldx #512 : stx $4305 ; size: 16*2*16 bytes.
lda #$00 : sta $2121 ;Write CGRAM address (0)
lda #$01 : sta $420B ;Activate dma 0
rts
; Sends the video buffer contents to PPU
VRAMdma:
sty $2116 ;Write VRAM address
sty $4302 : sta $4304 ;Write DMA address
stx $4305 ;Write size
lda #$80 : sta $2115 ;PPU programming
lda #$01 : sta $4300 ;dma type
lda #$18 : sta $4301 ;address $2118
lda #$01 : sta $420B ;Activate DMA 0
rts
; Jumped to from snesheader.a65 - when the game is reseted.
RESET_GAME:
rep #$30 : .al : .xl
lda #$0400 : tcd
ldx #$03FE : txs
sep #$20 : .as
pha
plb
lda #$01
sta $420D ; set "fast" mode
; Next initialize screen
jsr InitializeScreen
jsr InitializeIRQ
sep #$20 : .as
;lda #$17
lda #$03
sta $212C ; put screens on
sta $212D ; put screens on
lda #$00: sta $2121
lda #$E0: sta $2122
lda #$7C: sta $2122
jmp @GAME_MAIN
InitializeIRQ:
sep #$20 : .as
lda #$B1 : sta $4200
ldx #0 : stx $4207
ldx #211 : stx $4209
sei
lda $4211
- lda $4210 ;: bpl -
rts
InitializeScreen:
rep #$10 : .xl
sep #$20 : .as
lda #$00 : sta $2101
ldx #$0000 : stx $2102
lda #$09 : sta $2105 ; select screen mode 1.
lda #$00 : sta $2106
lda #TILE_ADDR_REG_VAL(BG1_TILE_ADDR, 0) : sta $2107
lda #TILE_ADDR_REG_VAL(BG2_TILE_ADDR, 0) : sta $2108
lda #TILE_ADDR_REG_VAL(BG3_TILE_ADDR, 0) : sta $2109
lda #TILE_ADDR_REG_VAL(BG4_TILE_ADDR, 0) : sta $210A
lda #BMAP_ADDR_REG_VAL(BG1_BMAP_ADDR, BG2_BMAP_ADDR) : sta $210B
lda #BMAP_ADDR_REG_VAL(BG3_BMAP_ADDR, BG4_BMAP_ADDR) : sta $210C
; Set scrolling to 0,0 to all bgs
lda #$00 : sta $210D : sta $210D
lda #$00 : sta $210E : sta $210E
lda #$00 : sta $210F : sta $210F
lda #$00 : sta $2110 : sta $2110
lda #$00 : sta $2111 : sta $2111
lda #$00 : sta $2112 : sta $2112
lda #$00 : sta $2113 : sta $2113
lda #$00 : sta $2114 : sta $2114
rts

146
snes/text.a65 Normal file
View File

@ -0,0 +1,146 @@
.text
#include "memmap.i65"
hiprint:
rep #$30 : .xl : .al
lda !print_x
and #$00ff
lsr
bcs print_bg1
ldx #!BG1_TILE_BUF ; for 2nd loop
phx
ldx #!BG2_TILE_BUF ; for 1st loop
phx
bra print_bg_cont
print_bg1
ldx #!BG2_TILE_BUF+2 ; for 2nd loop
phx
ldx #!BG1_TILE_BUF ; for 1st loop da whoop
phx
bra print_bg_cont
print_bg_cont
sta !print_x
lda !print_y
and #$00ff
asl
asl
asl
asl
asl
clc
adc !print_x
asl ; double the offset for WRAM addressing
tay ; zonday
plx
phy ; offset from tilemap start
stx !print_x
clc
adc !print_x
; we need to transfer to WRAM and from there to VRAM via DMA during VBLANK
; because VRAM can only be accessed during VBLANK and forced blanking.
sta $2181
sep #$20 : .as
lda #$7f ;we really only need bit 0. full bank given for clarity
sta $2183
print_loop
ldx !print_src
lda !print_bank
pha
plb
phx ; source addr
print_loop_inner
lda !0,x
asl
sta @$2180
lda #$00
adc #$00
sta @$2180
inx
lda !0,x
beq print_loop2
inx
lda !0,x
beq print_loop2
bra print_loop_inner
print_loop2
lda #$00
pha
plb
rep #$30 : .al : .xl
ply ; source addr
iny
pla ; offset from tilemap start
plx ; other tilemap addr
stx !print_x
clc
adc print_x ; tilemap+offset
sta $2181
tyx
sep #$20 : .as
lda print_bank
pha
plb
print_loop2_inner
lda !0,x
asl
sta @$2180
lda #$00
adc #$00
sta @$2180
inx
lda !0,x
beq print_end
inx
lda !0,x
beq print_end
bra print_loop2_inner
print_end
lda #$00
pha
plb
rts
loprint:
rep #$30 : .xl : .al
lda !print_x
and #$00ff
asl ;double the offset for WRAM addressing
clc
adc #!BG2_TILE_BUF
sta !print_x
lda !print_y
and #$00ff
asl
asl
asl
asl
asl
asl ;double the offset for WRAM addressing
clc
adc !print_x
; we need to transfer to WRAM and from there to VRAM via DMA during VBLANK
; because VRAM can only be accessed during VBLANK and forced blanking.
sta $2181
sep #$20 : .as
lda #$7f ;we really only need bit 0. full bank given for clarity
sta $2183
ldx !print_src
lda !print_bank
pha
plb
loprint_loop_inner
lda !0,x
beq loprint_end
sta @$2180
lda #$00
adc #$00
ora #$20
sta @$2180
inx
bra loprint_loop_inner
loprint_end
lda #$00
pha
plb
rts

2
src/Makefile
View File

@ -343,7 +343,7 @@ endif
# Uncomment the following if you want avrdude's erase cycle counter.
# Note that this counter needs to be initialized first using -Yn,
# see avrdude manual.
#AVRDUDE_ERASE_COUNTER = -y
AVRDUDE_ERASE_COUNTER = -y
# Uncomment the following if you do /not/ wish a verification to be
# performed after programming the device.

3
src/config
View File

@ -27,7 +27,7 @@
CONFIG_MCU=atmega644
CONFIG_LINKER_RELAX=n
CONFIG_MCU_FREQ=13500000
CONFIG_MCU_FREQ=12288000
CONFIG_BOOTLOADER=y
CONFIG_BOOT_DEVID=0x4e534453
CONFIG_UART_DEBUG=y
@ -39,3 +39,4 @@ CONFIG_SD_AUTO_RETRIES=10
CONFIG_EEPROM_SIZE=512
CONFIG_EEPROM_OFFSET=512
CONFIG_MAX_PARTITIONS=1
CONFIG_DEADLOCK_ME_HARDER=y

4
src/config.h
View File

@ -62,8 +62,8 @@
# error Unknown chip!
# endif
# define SD_CHANGE_VECT INT0_vect
# define SDCARD_WP (PINB & _BV(PB3))
# define SDCARD_WP_SETUP() do { DDRB &= ~ _BV(PB3); PORTB |= _BV(PB3); } while(0)
# define SDCARD_WP (PINB & _BV(PB1))
# define SDCARD_WP_SETUP() do { DDRB &= ~ _BV(PB1); PORTB |= _BV(PB1); } while(0)
# define SD_CHANGE_ICR MCUCR
# define SD_SUPPLY_VOLTAGE (1L<<21)
# define DEVICE_SELECT (8+!(PINA & _BV(PA2))+2*!(PINA & _BV(PA3)))

12
src/ff.c
View File

@ -59,7 +59,7 @@
#include "config.h"
#include "ff.h" /* FatFs declarations */
#include "diskio.h" /* Include file for user provided disk functions */
#include "uart.h"
/*--------------------------------------------------------------------------
@ -1651,7 +1651,7 @@ FRESULT f_write (
*bw = 0;
res = validate(fs /*, fp->id*/); /* Check validity of the object */
if (res != FR_OK) return res;
if (fp->flag & FA__ERROR) return FR_RW_ERROR; /* Check error flag */
if (fp->flag & FA__ERROR) {dprintf("fp->flag & FA__ERROR \n"); return FR_RW_ERROR;} /* Check error flag */
if (!(fp->flag & FA_WRITE)) return FR_DENIED; /* Check access mode */
if (fp->fsize + btw < fp->fsize) return FR_OK; /* File size cannot reach 4GB */
@ -1669,18 +1669,18 @@ FRESULT f_write (
clust = create_chain(fs, fp->curr_clust); /* Trace or streach cluster chain */
}
if (clust == 0) break; /* Disk full */
if (clust == 1 || clust >= fs->max_clust) goto fw_error;
if (clust == 1 || clust >= fs->max_clust) { dprintf("cluster alloc error\n"); goto fw_error; }
fp->curr_clust = clust; /* Current cluster */
sect = clust2sect(fs, clust); /* Get current sector */
fp->csect = fs->csize; /* Re-initialize the left sector counter */
}
if(!move_fp_window(fp,0)) goto fw_error;
if(!move_fp_window(fp,0)) {dprintf("move_fp_window error\n"); goto fw_error;}
fp->curr_sect = sect; /* Update current sector */
cc = btw / SS(fs); /* When left bytes >= SS(fs), */
if (cc) { /* Write maximum contiguous sectors directly */
if (cc > fp->csect) cc = fp->csect;
if (disk_write(fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
goto fw_error;
{ dprintf("disk_write error\n"); goto fw_error;}
fp->csect -= (BYTE)(cc - 1);
fp->curr_sect += cc - 1;
wcnt = cc * SS(fs);
@ -1695,7 +1695,7 @@ FRESULT f_write (
fp->fptr < fp->fsize && /* Fill sector buffer with file data if needed */
#endif
!move_fp_window(fp,fp->curr_sect))
goto fw_error;
{ dprintf("fract write error\n "); goto fw_error; }
memcpy(&FPBUF.data[fp->fptr & (SS(fs) - 1)], wbuff, wcnt);
FPBUF.dirty=TRUE;
}

2
src/fileops.c
View File

@ -18,7 +18,7 @@ void file_init() {
void file_open_by_filinfo(FILINFO* fno) {
file_res = l_openfilebycluster(&fatfs, &file_handle, (UCHAR*)"", fno->clust, fno->fsize);
}
void file_open(char* filename, BYTE flags) {
void file_open(uint8_t* filename, BYTE flags) {
file_res = f_open(&file_handle, (unsigned char*)filename, flags);
}

3
src/fileops.h
View File

@ -9,9 +9,10 @@ BYTE file_buf[512];
FATFS fatfs;
FIL file_handle;
FRESULT file_res;
uint8_t file_lfn[256];
void file_init(void);
void file_open(char* filename, BYTE flags);
void file_open(uint8_t* filename, BYTE flags);
void file_open_by_filinfo(FILINFO* fno);
void file_close(void);
UINT file_read(void);

214
src/filetypes.c
View File

@ -12,88 +12,176 @@
#include "fileops.h"
#include "crc16.h"
#include "memory.h"
#include "led.h"
uint16_t scan_flat(const char* path) {
DIR dir;
FRESULT res;
FILINFO fno;
fno.lfn = NULL;
res = f_opendir(&dir, (unsigned char*)path);
uint16_t numentries = 0;
if (res == FR_OK) {
for (;;) {
res = f_readdir(&dir, &fno);
if(res != FR_OK || fno.fname[0] == 0)break;
numentries++;
}
}
return numentries;
}
uint16_t scan_dir(char* path, char mkdb) {
DIR dir;
FILINFO fno;
FRESULT res;
int len;
uint8_t len;
unsigned char* fn;
static unsigned char lfn[256];
static unsigned char depth = 0;
static uint16_t crc;
static uint32_t db_tgt;
static uint32_t dir_tgt;
static uint32_t dir_end = 0;
static uint8_t was_empty = 0;
uint32_t dir_tgt_save, dir_tgt_next;
uint16_t numentries;
uint32_t dirsize;
uint8_t pass = 0;
if(depth==0) {
crc = 0;
db_tgt = SRAM_WORK_ADDR+0x10;
}
// dprintf("path=%s depth=%d ptr=%lx\n", path, depth, db_tgt);
// _delay_ms(50);
fno.lfn = lfn;
res = f_opendir(&dir, (unsigned char*)path);
if (res == FR_OK) {
len = strlen((char*)path);
for (;;) {
res = f_readdir(&dir, &fno);
if (res != FR_OK || fno.fname[0] == 0) break;
fn = *fno.lfn ? fno.lfn : fno.fname;
// dprintf("%s\n", fn);
// _delay_ms(100);
if (*fn == '.') continue;
if (fno.fattrib & AM_DIR) {
path[len]='/';
strncpy(path+len+1, (char*)fn, sizeof(fs_path)-len);
depth++;
scan_dir(path, mkdb);
depth--;
path[len]=0;
// if (res != FR_OK) {
// break;
// }
} else {
SNES_FTYPE type = determine_filetype((char*)fn);
if(type != TYPE_UNKNOWN) {
if(mkdb) {
snes_romprops_t romprops;
db_tgt = SRAM_DB_ADDR+0x10;
dir_tgt = SRAM_DIR_ADDR;
dprintf("root dir @%lx\n", dir_tgt);
}
fno.lfn = file_lfn;
numentries=0;
dir_tgt_next=0;
for(pass = 0; pass < 2; pass++) {
if(pass) {
dirsize = 4*(numentries);
dir_tgt_next = dir_tgt + dirsize + 4; // number of entries + end marker
if(dir_tgt_next > dir_end) {
dir_end = dir_tgt_next;
}
// dprintf("path=%s depth=%d ptr=%lx entries=%d next subdir @%lx\n", path, depth, db_tgt, numentries, dir_tgt_next);
// _delay_ms(50);
if(mkdb) {
// dprintf("d=%d Saving %lX to Address %lX [end]\n", depth, 0L, dir_tgt_next - 4);
// _delay_ms(50);
sram_writelong(0L, dir_tgt_next - 4);
}
}
res = f_opendir(&dir, (unsigned char*)path);
if (res == FR_OK) {
len = strlen((char*)path);
for (;;) {
toggle_busy_led();
res = f_readdir(&dir, &fno);
if (res != FR_OK || fno.fname[0] == 0) {
if(pass) {
if(!numentries) was_empty=1;
}
break;
}
fn = *fno.lfn ? fno.lfn : fno.fname;
// dprintf("%s\n", fn);
// _delay_ms(100);
if (*fn == '.') continue;
if (fno.fattrib & AM_DIR) {
numentries++;
if(pass) {
path[len]='/';
strncpy(path+len+1, (char*)fn, sizeof(fs_path)-len);
switch(type) {
case TYPE_SMC:
file_open_by_filinfo(&fno);
if(file_res){
dprintf("ZOMG NOOOO %d\n", file_res);
_delay_ms(30);
}
smc_id(&romprops);
file_close();
dprintf("%lx\n", db_tgt);
// _delay_ms(30);
sram_writeblock((uint8_t*)&romprops, db_tgt, sizeof(romprops));
sram_writeblock(path, db_tgt + sizeof(romprops), 256);
db_tgt += 0x140;
break;
case TYPE_UNKNOWN:
default:
break;
depth++;
dir_tgt_save = dir_tgt;
dir_tgt = dir_tgt_next;
if(mkdb) {
uint16_t pathlen = strlen(path);
// write element pointer to current dir structure
// dprintf("d=%d Saving %lX to Address %lX [dir]\n", depth, db_tgt, dir_tgt_save);
// _delay_ms(50);
sram_writelong(db_tgt|((uint32_t)0x80<<24), dir_tgt_save);
// sram_writeblock((uint8_t*)&db_tgt, dir_tgt_save, sizeof(dir_tgt_save));
// save element:
// - path name
// - pointer to sub dir structure
// dprintf(" Saving dir descriptor to %lX, tgt=%lX, path=%s\n", db_tgt, dir_tgt, path);
// _delay_ms(100);
sram_writelong(dir_tgt, db_tgt);
sram_writebyte(len+1, db_tgt+sizeof(dir_tgt));
sram_writeblock(path, db_tgt+sizeof(dir_tgt)+sizeof(len), pathlen + 1);
// sram_writeblock((uint8_t*)&dir_tgt, db_tgt+256, sizeof(dir_tgt));
db_tgt += sizeof(dir_tgt) + sizeof(len) + pathlen + 1;
}
scan_dir(path, mkdb);
dir_tgt = dir_tgt_save + 4;
if(was_empty)dir_tgt_next += 4;
was_empty = 0;
depth--;
path[len]=0;
// dprintf("%s ", path);
// _delay_ms(30);
}
unsigned char* sfn = fno.fname;
while(*sfn != 0) {
crc += crc16_update(crc, sfn++, 1);
} else {
SNES_FTYPE type = determine_filetype((char*)fn);
if(type != TYPE_UNKNOWN) {
numentries++;
if(pass) {
if(mkdb) {
snes_romprops_t romprops;
path[len]='/';
strncpy(path+len+1, (char*)fn, sizeof(fs_path)-len);
uint16_t pathlen = strlen(path);
switch(type) {
case TYPE_SMC:
file_open_by_filinfo(&fno);
if(file_res){
dprintf("ZOMG NOOOO %d\n", file_res);
_delay_ms(30);
}
smc_id(&romprops);
file_close();
// _delay_ms(30);
// write element pointer to current dir structure
// dprintf("d=%d Saving %lX to Address %lX [file]\n", depth, db_tgt, dir_tgt);
// _delay_ms(50);
sram_writelong(db_tgt, dir_tgt);
// sram_writeblock((uint8_t*)&db_tgt, dir_tgt, sizeof(db_tgt));
dir_tgt += 4;
// save element:
// - SNES header information
// - file name
sram_writeblock((uint8_t*)&romprops, db_tgt, sizeof(romprops));
sram_writebyte(len+1, db_tgt + sizeof(romprops));
sram_writeblock(path, db_tgt + sizeof(romprops) + sizeof(len), pathlen + 1);
db_tgt += sizeof(romprops) + sizeof(len) + pathlen + 1;
break;
case TYPE_UNKNOWN:
default:
break;
}
path[len]=0;
// dprintf("%s ", path);
// _delay_ms(30);
}
} else {
unsigned char* sfn = fno.fname;
while(*sfn != 0) {
crc += crc16_update(crc, sfn++, 1);
}
}
}
// dprintf("%s/%s\n", path, fn);
// _delay_ms(50);
}
// dprintf("%s/%s\n", path, fn);
// _delay_ms(50);
// _delay_ms(10);
}
}
} else uart_putc(0x30+res);
}
} else uart_putc(0x30+res);
}
// dprintf("%x\n", crc);
// _delay_ms(50);
sram_writeblock(&db_tgt, SRAM_WORK_ADDR+4, sizeof(db_tgt));
sram_writeblock(&db_tgt, SRAM_DB_ADDR+4, sizeof(db_tgt));
sram_writeblock(&dir_end, SRAM_DB_ADDR+8, sizeof(dir_end));
return crc;
}
@ -115,7 +203,7 @@ SNES_FTYPE determine_filetype(char* filename) {
}
FRESULT get_db_id(uint16_t* id) {
file_open("/sd2snes/sd2snes.db", FA_READ);
file_open((uint8_t*)"/sd2snes/sd2snes.db", FA_READ);
if(file_res == FR_OK) {
file_readblock(id, 0, 2);
/* XXX */// *id=0xdead;

161
src/fpga.c
View File

@ -7,34 +7,15 @@
FPGA pin mapping
================
PSM:
====
FPGA AVR dir
------------------------
PROG_B PD3 OUT
CCLK PD4 OUT
CS_B PD7 OUT
INIT_B PB2 IN
RDWR_B PB3 OUT
D7 PC0 OUT
D6 PC1 OUT
D5 PC2 OUT
D4 PC3 OUT
D3 PC4 OUT
D2 PC5 OUT
D1 PC6 OUT
D0 PC7 OUT
SSM:
====
PROG_B PD3 OUT
CCLK PD4 OUT
INIT_B PD7 IN
DIN PC7 OUT
DONE PA3 IN
*/
#include <avr/pgmspace.h>
#include <util/delay.h>
#include "fpga.h"
#include "config.h"
#include "uart.h"
@ -58,22 +39,6 @@ void set_prog_b(uint8_t val) {
}
}
void set_cs_b(uint8_t val) {
if(val) {
PORTD |= _BV(PD7);
} else {
PORTD &= ~_BV(PD7);
}
}
void set_rdwr_b(uint8_t val) {
if(val) {
PORTB |= _BV(PB3);
} else {
PORTB &= ~_BV(PB3);
}
}
void set_cclk(uint8_t val) {
if(val) {
PORTD |= _BV(PD4);
@ -83,80 +48,63 @@ void set_cclk(uint8_t val) {
}
void fpga_init() {
DDRB |= _BV(PB3); // PB3 is output
DDRD &= ~_BV(PD7); // PD7 is input
DDRD &= ~_BV(PD7); // PD7 is input
DDRC = _BV(PC7); // for FPGA config, PC7 is output
DDRC = _BV(PC7); // for FPGA config, PC7 is output
DDRD |= _BV(PD3) | _BV(PD4); // PD3, PD4 are outputs
DDRA = ~_BV(PA3); // PA3 is input <- DONE
set_cclk(0); // initial clk=0
}
int fpga_get_done(void) {
return 0;
return PINA & _BV(PA3);
}
void fpga_postinit() {
DDRA |= _BV(PA0) | _BV(PA1) | _BV(PA2) | _BV(PA4) | _BV(PA5) | _BV(PA6); // MAPPER+NEXTADDR output
DDRB |= _BV(PB2) | _BV(PB1) | _BV(PB0); // turn PB2 into output, enable AVR_BANK
DDRD |= _BV(PD7); // turn PD7 into output
DDRD |= _BV(PD7); // turn PD7 into output
}
void fpga_pgm(char* filename) {
set_prog_b(0);
uart_putc('P');
set_prog_b(1);
loop_until_bit_is_set(PIND, PD7);
uart_putc('p');
// FIL in;
// FRESULT res;
UINT bytes_read;
void fpga_pgm(uint8_t* filename) {
int MAXRETRIES = 10;
int retries = MAXRETRIES;
do {
set_prog_b(0);
uart_putc('P');
set_prog_b(1);
loop_until_bit_is_set(PIND, PD7);
uart_putc('p');
UINT bytes_read;
// open configware file
// res=f_open(&in, filename, FA_READ);
file_open(filename, FA_READ);
if(file_res) {
uart_putc('?');
uart_putc(0x30+file_res);
return;
}
// file open successful
set_cs_b(0);
set_rdwr_b(0);
for (;;) {
// res = f_read(&in, file_buf, sizeof(file_buf), &bytes_read);
bytes_read = file_read();
if (file_res || bytes_read == 0) break; // error or eof
for(int i=0; i<bytes_read; i++) {
//FPGA_SEND_BYTE(file_buf[i]);
FPGA_SEND_BYTE_SERIAL(file_buf[i]);
// open configware file
file_open(filename, FA_READ);
if(file_res) {
uart_putc('?');
uart_putc(0x30+file_res);
return;
}
}
file_close();
for (;;) {
bytes_read = file_read();
if (file_res || bytes_read == 0) break; // error or eof
for(int i=0; i<bytes_read; i++) {
FPGA_SEND_BYTE_SERIAL(file_buf[i]);
}
}
file_close();
_delay_ms(10);
} while (!fpga_get_done() && retries--);
if(!fpga_get_done()) {
dprintf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
_delay_ms(50);
}
fpga_postinit();
}
void set_avr_read(uint8_t val) {
if(val) {
PORTB |= _BV(PB3);
} else {
PORTB &= ~_BV(PB3);
}
}
void set_avr_write(uint8_t val) {
if(val) {
PORTB |= _BV(PB2);
} else {
PORTB &= ~_BV(PB2);
}
}
void set_avr_ena(uint8_t val) {
if(val) {
PORTD |= _BV(PD7);
@ -165,34 +113,6 @@ void set_avr_ena(uint8_t val) {
}
}
void set_avr_nextaddr(uint8_t val) {
if(val) {
PORTA |= _BV(PA4);
} else {
PORTA &= ~_BV(PA4);
}
}
void set_avr_addr_reset(uint8_t val) {
if(val) {
PORTA |= _BV(PA5);
} else {
PORTA &= ~_BV(PA5);
}
}
void set_avr_data(uint8_t data) {
PORTC = data;
}
void set_avr_addr_en(uint8_t val) {
if(val) {
PORTA |= _BV(PA6);
} else {
PORTA &= ~_BV(PA6);
}
}
void set_avr_mapper(uint8_t val) {
SPI_SS_HIGH();
FPGA_SS_LOW();
@ -211,3 +131,4 @@ void set_avr_bank(uint8_t val) {
FPGA_SS_HIGH();
SPI_SS_LOW();
}

2
src/fpga.h
View File

@ -7,7 +7,7 @@
void fpga_init(void);
void fpga_postinit(void);
void fpga_pgm(char* filename);
void fpga_pgm(uint8_t* filename);
void set_avr_read(uint8_t val);
void set_avr_write(uint8_t val);

67
src/led.c
View File

@ -20,7 +20,7 @@
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
led.c: Overdesigned LED handling
led.c: LED handling
*/
@ -28,30 +28,61 @@
#include "config.h"
#include "led.h"
static uint8_t led_bright[16]={255,253,252,251,249,247,244,239,232,223,210,191,165,127,74,0};
static uint8_t curr_bright = 0;
static uint8_t led_bounce_dir = 0;
volatile uint8_t led_state;
/**
* update_leds - set LEDs to correspond to the buffer status
*
* This function sets the busy/dirty LEDs to correspond to the current state
* of the buffers, i.e. busy on of at least one non-system buffer is
* allocated and dirty on if at least one buffer is allocated for writing.
* Call if you have manually changed the LEDs and you want to restore the
* "default" state.
*/
void update_leds(void) {
}
void toggle_busy_led(void) {
PORTB &= ~_BV(PB1);
DDRB ^= _BV(PB1);
PORTB &= ~_BV(PB3);
DDRB ^= _BV(PB3);
}
void set_busy_led(uint8_t state) {
PORTB &= ~_BV(PB1);
PORTB &= ~_BV(PB3);
if(state) {
DDRB |= _BV(PB1);
DDRB |= _BV(PB3);
} else {
DDRB &= ~_BV(PB1);
DDRB &= ~_BV(PB3);
}
}
void set_pwr_led(uint8_t state) {
PORTB &= ~_BV(PB0);
if(state) {
DDRB |= _BV(PB0);
} else {
DDRB &= ~_BV(PB0);
}
}
void set_busy_pwm(uint8_t brightness) {
OCR0A = led_bright[brightness];
set_busy_led(1);
}
void bounce_busy_led() {
set_busy_pwm(curr_bright);
if(led_bounce_dir) {
curr_bright--;
if(curr_bright==0) {
led_bounce_dir = 0;
}
} else {
curr_bright++;
if(curr_bright==15) {
led_bounce_dir = 1;
}
}
}
void led_pwm() {
set_busy_led(1);
TCCR0A = 0x83;
TCCR0B = 0x01;
}
void led_std() {
TCCR0A = 0;
}

8
src/led.h
View File

@ -38,9 +38,11 @@
extern volatile uint8_t led_state;
/* Update the LEDs to match the buffer state */
void update_leds(void);
void toggle_busy_led(void);
void set_busy_led(uint8_t);
void set_pwr_led(uint8_t);
void set_busy_pwm(uint8_t brightness);
void bounce_busy_led(void);
void led_pwm(void);
void led_std(void);
#endif

109
src/main.c
View File

@ -125,67 +125,108 @@ int main(void) {
#endif
#ifdef CLOCK_PRESCALE
clock_prescale_set(CLOCK_PRESCALE);
clock_prescale_set(CLOCK_PRESCALE);
#endif
set_pwr_led(0);
set_busy_led(1);
spi_none();
snes_reset(1);
uart_init();
sei(); // suspected to reset the AVR when inserting an SD card
_delay_ms(100);
disk_init();
snes_init();
timer_init();
uart_puts_P(PSTR("\nsd2snes " VERSION));
uart_putcrlf();
snes_reset(1);
uart_init();
sei(); // suspected to reset the AVR when inserting an SD card
_delay_ms(100);
disk_init();
snes_init();
timer_init();
uart_puts_P(PSTR("\nsd2snes " VERSION));
uart_putcrlf();
file_init();
FATFS fatfs;
f_mount(0,&fatfs);
set_busy_led(1);
uart_putc('W');
fpga_init();
fpga_pgm("/sd2snes/main.bit");
FATFS fatfs;
f_mount(0,&fatfs);
uart_putc('W');
fpga_init();
fpga_pgm((uint8_t*)"/sd2snes/main.bit");
_delay_ms(100);
set_pwr_led(1);
fpga_spi_init();
uart_putc('!');
uart_putc('!');
_delay_ms(100);
set_avr_ena(0);
set_avr_ena(0);
snes_reset(1);
*fs_path=0;
sram_writelong(0x12345678, SRAM_SCRATCHPAD);
*fs_path=0;
uint16_t curr_dir_id = scan_dir(fs_path, 0); // generate files footprint
dprintf("curr dir id = %x\n", curr_dir_id);
uint16_t saved_dir_id;
led_pwm();
if((get_db_id(&saved_dir_id) != FR_OK) // no database?
|| saved_dir_id != curr_dir_id) { // files changed?
|| saved_dir_id != curr_dir_id) { // files changed? // XXX
dprintf("saved dir id = %x\n", saved_dir_id);
_delay_ms(50);
dprintf("rebuilding database...");
_delay_ms(50);
curr_dir_id = scan_dir(fs_path, 1); // then rebuild database
sram_writeblock(&curr_dir_id, SRAM_WORK_ADDR, 2);
uint32_t endaddr;
sram_readblock(&endaddr, SRAM_WORK_ADDR+4, 4);
dprintf("%lx\n", endaddr);
save_sram("/sd2snes/sd2snes.db", endaddr-SRAM_WORK_ADDR, SRAM_WORK_ADDR);
sram_writeblock(&curr_dir_id, SRAM_DB_ADDR, 2);
uint32_t endaddr, direndaddr;
sram_readblock(&endaddr, SRAM_DB_ADDR+4, 4);
sram_readblock(&direndaddr, SRAM_DB_ADDR+8, 4);
dprintf("%lx %lx\n", endaddr, direndaddr);
save_sram((uint8_t*)"/sd2snes/sd2snes.db", endaddr-SRAM_DB_ADDR, SRAM_DB_ADDR);
save_sram((uint8_t*)"/sd2snes/sd2snes.dir", direndaddr-(SRAM_DIR_ADDR), SRAM_DIR_ADDR);
dprintf("done\n");
sram_hexdump(SRAM_DB_ADDR, 0x400);
} else {
dprintf("loading db...\n");
load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
}
uart_putc('[');
load_sram("/test.srm");
uart_putc(']');
// save_sram((uint8_t*)"/debug.smc", 0x400000, 0);
// uart_putc('[');
// load_sram((uint8_t*)"/test.srm", SRAM_SAVE_ADDR);
// uart_putc(']');
uart_putc('(');
load_rom("/test.smc");
load_rom((uint8_t*)"/sd2snes/menu.bin");
uart_putc(')');
sram_writebyte(0, SRAM_CMD_ADDR);
set_busy_led(0);
set_avr_ena(1);
_delay_ms(100);
uart_puts_P(PSTR("SNES GO!\n"));
snes_reset(0);
uint8_t cmd = 0;
while(!sram_reliable());
while(!cmd) {
cmd=menu_main_loop();
switch(cmd) {
case 0x01: // SNES_CMD_LOADROM:
get_selected_name(file_lfn);
_delay_ms(100);
// snes_reset(1);
set_avr_ena(0);
dprintf("Selected name: %s\n", file_lfn);
load_rom(file_lfn);
set_avr_ena(1);
snes_reset(1);
_delay_ms(100);
snes_reset(0);
break;
default:
break;
}
}
dprintf("cmd was %x, going to snes main loop\n", cmd);
cmd=0;
while(1) {
snes_main_loop();
}
@ -200,22 +241,22 @@ while(1) {
uart_putcrlf();
uint8_t buff[21];
for(uint8_t cnt=0; cnt<21; cnt++) {
uint8_t data=spiTransferByte(0x00);
uint8_t data=spiTransferByte(0x00);
buff[cnt]=data;
}
for(uint8_t cnt=0; cnt<21; cnt++) {
uint8_t data = buff[cnt];
_delay_ms(2);
if(data>=0x20 && data <= 0x7a) {
if(data>=0x20 && data <= 0x7a) {
uart_putc(data);
} else {
} else {
// uart_putc('.');
uart_putc("0123456789ABCDEF"[data>>4]);
uart_putc("0123456789ABCDEF"[data&15]);
uart_putc(' ');
}
}
// set_avr_bank(3);
}
}
spi_none();
}
while(1);

89
src/memory.c
View File

@ -16,9 +16,64 @@
#include "led.h"
#include "smc.h"
#include "fpga_spi.h"
#include "memory.h"
char* hex = "0123456789ABCDEF";
void sram_hexdump(uint32_t addr, uint32_t len) {
static uint8_t buf[16];
uint32_t ptr;
for(ptr=0; ptr < len; ptr += 16) {
sram_readblock((void*)buf, ptr+addr, 16);
uart_trace(buf, 0, 16);
}
}
void sram_writebyte(uint8_t val, uint32_t addr) {
set_avr_addr(addr);
spi_fpga();
spiTransferByte(0x91); // WRITE
spiTransferByte(val);
spiTransferByte(0x00); // dummy
spi_none();
}
uint8_t sram_readbyte(uint32_t addr) {
set_avr_addr(addr);
spi_fpga();
spiTransferByte(0x81); // READ
spiTransferByte(0x00); // dummy
uint8_t val = spiTransferByte(0x00);
spi_none();
return val;
}
void sram_writelong(uint32_t val, uint32_t addr) {
set_avr_addr(addr);
spi_fpga();
spiTransferByte(0x91); // WRITE
spiTransferByte(val&0xff); // 7-0
spiTransferByte((val>>8)&0xff); // 15-8
spiTransferByte((val>>16)&0xff); // 23-15
spiTransferByte((val>>24)&0xff); // 31-24
spiTransferByte(0x00); // dummy
spi_none();
}
uint32_t sram_readlong(uint32_t addr) {
set_avr_addr(addr);
spi_fpga();
spiTransferByte(0x81);
spiTransferByte(0x00);
uint32_t val = spiTransferByte(0x00);
val |= ((uint32_t)spiTransferByte(0x00)<<8);
val |= ((uint32_t)spiTransferByte(0x00)<<16);
val |= ((uint32_t)spiTransferByte(0x00)<<24);
spi_none();
return val;
}
void sram_readblock(void* buf, uint32_t addr, uint16_t size) {
uint16_t count=size;
uint8_t* tgt = buf;
@ -33,21 +88,19 @@ void sram_readblock(void* buf, uint32_t addr, uint16_t size) {
}
void sram_writeblock(void* buf, uint32_t addr, uint16_t size) {
uint16_t count=size>>1;
uint16_t* src = buf;
uint16_t count=size;
uint8_t* src = buf;
set_avr_addr(addr);
spi_fpga();
spiTransferByte(0x91); // WRITE
while(count--) {
spiTransferByte((*src)>>8);
spiTransferByte((*src)&0xff);
src++;
spiTransferByte(*src++);
}
spiTransferByte(0x00); // dummy
spi_none();
}
uint32_t load_rom(char* filename) {
uint32_t load_rom(uint8_t* filename) {
snes_romprops_t romprops;
set_avr_bank(0);
UINT bytes_read;
@ -70,8 +123,9 @@ uint32_t load_rom(char* filename) {
if (file_res || !bytes_read) break;
FPGA_SS_LOW();
spiTransferByte(0x91); // write w/ increment
if(!(count++ % 16)) {
toggle_busy_led();
if(!(count++ % 8)) {
// toggle_busy_led();
bounce_busy_led();
uart_putc('.');
}
for(int j=0; j<bytes_read; j++) {
@ -114,8 +168,8 @@ uint32_t load_rom(char* filename) {
return (uint32_t)filesize;
}
uint32_t load_sram(char* filename) {
set_avr_bank(3);
uint32_t load_sram(uint8_t* filename, uint32_t base_addr) {
set_avr_addr(base_addr);
UINT bytes_read;
DWORD filesize;
file_open(filename, FA_READ);
@ -140,7 +194,7 @@ uint32_t load_sram(char* filename) {
}
void save_sram(char* filename, uint32_t sram_size, uint32_t base_addr) {
void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr) {
uint32_t count = 0;
uint32_t num = 0;
@ -184,3 +238,16 @@ uint32_t calc_sram_crc(uint32_t base_addr, uint32_t size) {
spi_none();
return crc;
}
uint8_t sram_reliable() {
uint16_t score=0;
uint32_t val = sram_readlong(SRAM_SCRATCHPAD);
while(score<SRAM_RELIABILITY_SCORE) {
if(sram_readlong(SRAM_SCRATCHPAD)==val) {
score++;
} else {
score=0;
}
}
return 1;
}

19
src/memory.h
View File

@ -5,11 +5,24 @@
#define MEMORY_H
#define SRAM_WORK_ADDR (0x100000L)
#define SRAM_DB_ADDR (0x080000L)
#define SRAM_DIR_ADDR (0x300000L)
#define SRAM_CMD_ADDR (0x600004L)
#define SRAM_FD_ADDR (0x600000L)
#define SRAM_SAVE_ADDR (0x600000L)
#define SRAM_SCRATCHPAD (0x7FFFF0L)
#define SRAM_RELIABILITY_SCORE (0x100)
uint32_t load_rom(char* filename);
uint32_t load_sram(char* filename);
uint32_t load_rom(uint8_t* filename);
uint32_t load_sram(uint8_t* filename, uint32_t base_addr);
void sram_hexdump(uint32_t addr, uint32_t len);
uint8_t sram_readbyte(uint32_t addr);
uint32_t sram_readlong(uint32_t addr);
void sram_writebyte(uint8_t val, uint32_t addr);
void sram_writelong(uint32_t val, uint32_t addr);
void sram_readblock(void* buf, uint32_t addr, uint16_t size);
void sram_writeblock(void* buf, uint32_t addr, uint16_t size);
void save_sram(char* filename, uint32_t sram_size, uint32_t base_addr);
void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr);
uint32_t calc_sram_crc(uint32_t base_addr, uint32_t size);
uint8_t sram_reliable(void);
#endif

6
src/sdcard.c
View File

@ -181,8 +181,8 @@ static uint8_t sdResponse(uint8_t expected)
static uint8_t sdWaitWriteFinish(void)
{
unsigned short count = 0xFFFF; // wait for quite some time
uint32_t count = 0x1FFFF; // wait for quite some time
while ((spiTransferByte(0xFF) == 0) && count )
count--;
@ -640,6 +640,7 @@ DRESULT sd_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
res = sendCommand(drv, WRITE_BLOCK, (sector+sec)<<9, 0);
if (res != 0) {
uart_putc('C');
SPI_SS_HIGH(drv);
disk_state = DISK_ERROR;
return RES_ERROR;
@ -678,6 +679,7 @@ DRESULT sd_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
// Wait for write finish
if (!sdWaitWriteFinish()) {
uart_putc('W');
SPI_SS_HIGH(drv);
disk_state = DISK_ERROR;
return RES_ERROR;

24
src/snes.c
View File

@ -42,12 +42,11 @@ void snes_reset(int state) {
/*
* SD2SNES main loop.
* monitors SRAM changes, menu selections and other things
* monitors SRAM changes and other things
*/
void snes_main_loop() {
if(initloop) {
saveram_crc_old = calc_sram_crc(saveram_base_addr, saveram_size);
save_sram("/test.srm", saveram_size, saveram_base_addr);
initloop=0;
}
saveram_crc = calc_sram_crc(saveram_base_addr, saveram_size);
@ -56,8 +55,27 @@ void snes_main_loop() {
uart_puthexshort(saveram_crc);
uart_putcrlf();
set_busy_led(1);
save_sram("/test.srm", saveram_size, saveram_base_addr);
save_sram((uint8_t*)"/test.srm", saveram_size, saveram_base_addr);
set_busy_led(0);
}
saveram_crc_old = saveram_crc;
}
/*
* SD2SNES menu loop.
* monitors menu selection. return when selection was made.
*/
uint8_t menu_main_loop() {
uint8_t cmd = 0;
sram_writebyte(0, SRAM_CMD_ADDR);
while(!cmd) {
cmd = sram_readbyte(SRAM_CMD_ADDR);
}
return cmd;
}
void get_selected_name(uint8_t* fn) {
uint32_t addr = sram_readlong(SRAM_FD_ADDR);
dprintf("fd addr=%lX\n", addr);
sram_readblock(fn, addr+0x41, 256);
}

2
src/snes.h
View File

@ -8,4 +8,6 @@
void snes_init(void);
void snes_reset(int state);
void snes_main_loop(void);
uint8_t menu_main_loop(void);
void get_selected_name(uint8_t* lfn);
#endif

16
utils/chili2chr.c
View File

@ -32,13 +32,19 @@ int main(int argc, char** argv) {
// depth = 2;
// 4->2
pixperbyte = 1;
mask_shift = 0;
mask = 0xff;
depth = 8;
pixperbyte = 2;
mask_shift = 4;
mask = 0x0f;
depth = 4;
// 4->4?
// pixperbyte = 1;
// mask_shift = 0;
// mask = 0xff;
// depth = 8;
// 8->8
dsize = fsize / pixperbyte;
dsize = fsize * depth / (8/pixperbyte);
uint16_t *obuf;
if((obuf=malloc(dsize))==NULL) {

10
utils/gentilemap.c
View File

@ -2,20 +2,20 @@
#include <stdint.h>
int main(void) {
uint16_t tile=64;
uint16_t pad=0xa+64;
uint16_t tile=256;
uint16_t pad=0xa+256;
int i,j;
FILE *out;
if((out=fopen("tilemap", "wb"))==NULL) {
perror("Could not open output file 'tilemap'");
return 1;
}
for(i=0; i<12; i++) {
for(j=0; j<25; j++) {
for(i=0; i<10; i++) {
for(j=0; j<21; j++) {
fwrite(&tile, 2, 1, out);
tile++;
}
for(j=25; j<32; j++) {
for(j=21; j<32; j++) {
fwrite(&pad, 2, 1, out);
}
}

4
utils/palremap.c
View File

@ -18,8 +18,8 @@ int main(int argc, char **argv) {
while(1) {
uint8_t c=fgetc(in);
if(feof(in))break;
if(c>=1 && c<=43) {
c+=212;
if(c>=1 && c<=48) {
c+=207;
}
fputc(c, out);
}

2
verilog/sd2snes/avr_cmd.v
View File

@ -122,7 +122,7 @@ always @(posedge clk) begin
AVR_WRITE_BUF <= 1'b0;
else
AVR_WRITE_BUF <= 1'b1;
if ((spi_bit_cnt == 3'h7) & (cmd_data[7:4] == 4'h8) & (spi_byte_cnt > 32'h0))
AVR_READ_BUF <= 1'b0;
else

2
verilog/sd2snes/data.v
View File

@ -46,7 +46,7 @@ wire [7:0] FROM_SRAM_BYTE;
assign SNES_DATA = SNES_READ ? 8'bZ : SNES_OUT_MEM;
assign FROM_SRAM_BYTE = (SRAM_ADDR0 ? SRAM_DATA[7:0] : SRAM_DATA[15:8]);
assign FROM_SRAM_BYTE = ((SRAM_ADDR0 ^ !AVR_ENA) ? SRAM_DATA[7:0] : SRAM_DATA[15:8]);
assign AVR_OUT_DATA = !AVR_ENA ? (FROM_SRAM_BYTE)
: (AVR_OUT_MEM);

8
verilog/sd2snes/main.ucf
View File

@ -120,8 +120,8 @@ NET "SRAM_ADDR[10]" LOC = P60;
NET "SRAM_ADDR[11]" LOC = P59;
NET "SRAM_ADDR[12]" LOC = P57;
NET "SRAM_ADDR[13]" LOC = P56;
NET "SRAM_ADDR[14]" LOC = P53;
NET "SRAM_ADDR[15]" LOC = P52;
NET "SRAM_ADDR[14]" LOC = P51;
NET "SRAM_ADDR[15]" LOC = P50;
NET "SRAM_ADDR[19]" LOC = P69;
NET "SRAM_ADDR[8]" LOC = P68;
NET "SRAM_ADDR[9]" LOC = P63;
@ -233,9 +233,5 @@ NET "CLKIN" IOSTANDARD = LVCMOS33;
NET "CLKIN" PULLUP;
NET "SPI_SS" IOSTANDARD = LVCMOS33;
NET "SPI_SS" PULLUP;
NET "DCM_FX_STOPPED" LOC = P44;
NET "DCM_FX_STOPPED" IOSTANDARD = LVCMOS33;
NET "DCM_IN_STOPPED" LOC = P41;
NET "DCM_IN_STOPPED" IOSTANDARD = LVCMOS33;
//NET "DCM_RST" LOC = P46;
//NET "DCM_RST" IOSTANDARD = LVCMOS33;

8
verilog/sd2snes/main.v
View File

@ -49,11 +49,11 @@ module main(
output SPI_MISO,
input SPI_SS,
input SPI_SCK,
input AVR_ENA,
input AVR_ENA
/* debug */
output DCM_IN_STOPPED,
output DCM_FX_STOPPED
//output DCM_IN_STOPPED,
//output DCM_FX_STOPPED
//input DCM_RST
);
wire [7:0] spi_cmd_data;
@ -110,8 +110,6 @@ avr_cmd snes_avr_cmd(
);
wire [7:0] DCM_STATUS;
assign DCM_FX_STOPPED = DCM_STATUS[2];
assign DCM_IN_STOPPED = DCM_STATUS[1];
my_dcm snes_dcm(.CLKIN(CLKIN),
.CLKFX(CLK2),
.LOCKED(DCM_LOCKED),

1
verilog/sd2snes/sd2snes.xise
View File

@ -73,6 +73,7 @@
<property xil_pn:name="Constraints Entry" xil_pn:value="Constraints Editor"/>
<property xil_pn:name="Device" xil_pn:value="xc3s200"/>
<property xil_pn:name="Device Family" xil_pn:value="Spartan3"/>
<property xil_pn:name="Enable BitStream Compression" xil_pn:value="true"/>
<property xil_pn:name="Extra Effort" xil_pn:value="Normal"/>
<property xil_pn:name="Extra Effort (Highest PAR level only)" xil_pn:value="Normal"/>
<property xil_pn:name="Fitter Report Format" xil_pn:value="HTML"/>