mk2 fw wip

This commit is contained in:
ikari 2010-09-18 16:32:44 +02:00
parent 416d7089c4
commit 64453e2fdf
13 changed files with 65 additions and 39 deletions

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@ -55,7 +55,7 @@ TARGET = $(OBJDIR)/sd2snes
# List C source files here. (C dependencies are automatically generated.)
SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c sdcard.c spi.c fileops.c rtc.c
SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c sdcard.c spi.c fileops.c rtc.c fpga.c
# List Assembler source files here.

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@ -5,11 +5,7 @@
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include "clock.h"
#include "bits.h"
uint32_t f_cpu=4000000;
uint16_t pll_mult = 1;
uint8_t pll_prediv = 1;
uint8_t cclk_div = 1;
#include "uart.h"
void clock_disconnect() {
disconnectPLL0();
@ -64,7 +60,6 @@ void setFlashAccessTime(uint8_t clocks) {
void setPLL0MultPrediv(uint16_t mult, uint8_t prediv) {
LPC_SC->PLL0CFG=PLL_MULT(mult) | PLL_PREDIV(prediv);
f_cpu = F_OSC*2*mult/prediv/cclk_div;
PLL0feed();
}
@ -91,7 +86,6 @@ void disconnectPLL0() {
void setCCLKDiv(uint8_t div) {
LPC_SC->CCLKCFG=CCLK_DIV(div);
f_cpu=F_OSC*2*pll_mult/pll_prediv/div;
}
void enableMainOsc() {

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@ -6,7 +6,7 @@
#define SD_SUPPLY_VOLTAGE (1L<<21) /* 3.3V - 3.4V */
#define CONFIG_SD_BLOCKTRANSFER 1
#define CONFIG_SD_AUTO_RETRIES 10
#define CONFIG_SD_DATACRC 1
// #define CONFIG_SD_DATACRC 1
#define CONFIG_UART_NUM 3

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@ -55,7 +55,7 @@ DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
#if _READONLY == 0
DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
#endif
DRESULT disk_ioctl (BYTE, BYTE, void*);
#define disk_ioctl(a,b,c) RES_OK
void disk_init(void);

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@ -87,7 +87,7 @@
#include "ff.h" /* FatFs configurations and declarations */
#include "diskio.h" /* Declarations of low level disk I/O functions */
#include "uart.h"
/*--------------------------------------------------------------------------
@ -319,7 +319,7 @@ void mem_cpy (void* dst, const void* src, UINT cnt) {
#if _WORD_ACCESS == 1
while (cnt >= sizeof(int)) {
*((int*)d) = *((int*)s);
*(int*)d = *(int*)s;
d += sizeof(int); s += sizeof(int);
cnt -= sizeof(int);
}
@ -1815,8 +1815,6 @@ FRESULT chk_mounted ( /* FR_OK(0): successful, !=0: any error occurred */
fs->fs_type = 0; /* Clear the file system object */
fs->drv = (BYTE)LD2PD(vol); /* Bind the logical drive and a physical drive */
stat = disk_initialize(fs->drv); /* Initialize low level disk I/O layer */
printf("disk_initialize status: %d\n", stat);
if (stat & STA_NOINIT) /* Check if the initialization succeeded */
return FR_NOT_READY; /* Failed to initialize due to no media or hard error */
#if _MAX_SS != 512 /* Get disk sector size (variable sector size cfg only) */

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@ -40,7 +40,7 @@
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
#define _USE_MKFS 1 /* 0:Disable or 1:Enable */
#define _USE_MKFS 0 /* 0:Disable or 1:Enable */
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */

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@ -28,7 +28,7 @@
#define FILEOPS_H
#include "ff.h"
BYTE file_buf[4096];
BYTE file_buf[512];
FATFS fatfs;
FIL file_handle;
FRESULT file_res;

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@ -3,9 +3,13 @@
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include "bits.h"
#include "timer.h"
#include "led.h"
int led_rdyledstate = 0;
void rdyled(unsigned int state) {
BITBAND(LPC_GPIO2->FIODIR, 0) = state;
led_rdyledstate = state;
}
void readled(unsigned int state) {
@ -22,3 +26,16 @@ void led_clkout32(uint32_t val) {
delay_ms(400);
}
}
void toggle_rdy_led() {
rdyled(~led_rdyledstate);
}
void led_panic() {
while(1) {
LPC_GPIO2->FIODIR |= BV(0) | BV(1) | BV(2);
delay_ms(350);
LPC_GPIO2->FIODIR &= ~(BV(0) | BV(1) | BV(2));
delay_ms(350);
}
}

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@ -6,5 +6,7 @@
void readled(unsigned int state);
void rdyled(unsigned int state);
void led_clkout32(uint32_t val);
void toggle_rdy_led(void);
void led_panic(void);
#endif

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@ -1,4 +1,5 @@
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include "config.h"
#include "clock.h"
#include "uart.h"
#include "bits.h"
@ -9,6 +10,7 @@
#include "spi.h"
#include "sdcard.h"
#include "fileops.h"
#include "fpga.h"
#define EMC0TOGGLE (3<<4)
#define MR0R (1<<1)
@ -23,43 +25,42 @@ int main(void) {
LPC_GPIO1->FIODIR = 0;
uint32_t p1;
/* connect UART3 on P0[25:26] + SSP1 on P0[6:9] */
/* connect UART3 on P0[25:26] + SSP1 on P0[6:9] + MAT3.0 on P0[10] */
LPC_PINCON->PINSEL1=(0xf<<18);
LPC_PINCON->PINSEL0=BV(13) | BV(15) | BV(17) | BV(19);
LPC_PINCON->PINSEL0=BV(13) | BV(15) | BV(17) | BV(19) | BV(20) | BV(21);
clock_disconnect();
power_init();
timer_init();
uart_init();
delay_ms(10);
spi_init(SPI_SPEED_SLOW);
sd_init();
/* do this last because the peripheral init()s change PCLK dividers */
clock_init();
delay_ms(10);
printf("\n\nsd2snes mk.2\n============\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
file_init();
printf("fileres: %d diskstate: %d\n", file_res, disk_state);
file_open((uint8_t*)"/mon.smc", FA_READ);
spi_set_speed(SPI_SPEED_FAST);
printf("fileres: %d diskstate: %d\n", file_res, disk_state);
uart_putc('S');
for(p1=0; p1<2048; p1++) {
/* uart_putc('S');
for(p1=0; p1<8192; p1++) {
file_read();
}
file_close();
uart_putc('E');
uart_putcrlf();
printf("sizeof(struct FIL): %d\n", sizeof(file_handle));
uart_trace(file_buf, 0, 512);
uart_trace(file_buf, 0, 512);*/
/* setup timer (fpga clk) */
LPC_TIM3->CTCR=0;
LPC_TIM3->EMR=EMC0TOGGLE;
LPC_PINCON->PINSEL0=(0x3<<20);
LPC_TIM3->MCR=MR0R;
LPC_TIM3->MR0=1;
LPC_TIM3->TCR=1;
uart_puts("hurr durr derpderpderp\n");
fpga_init();
fpga_pgm((uint8_t*)"/sd2snes/main.bit");
while (1) {
p1 = LPC_GPIO1->FIOPIN;
BITBAND(LPC_GPIO2->FIOPIN, 1) = (p1 & BV(29))>>29;

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@ -68,7 +68,7 @@
// FIXME: Move, make configurable
static void set_sd_led(uint8_t state) {
BITBAND(LPC_GPIO2->FIODIR, 2) = state;
// BITBAND(LPC_GPIO2->FIODIR, 2) = state;
}
// FIXME: Move, add generic C or AVR ASM version
@ -410,7 +410,7 @@ DSTATUS sd_initialize(BYTE drv) {
uint8_t i;
uint16_t counter;
uint32_t answer;
printf("sd_initialize\n");
if (drv >= MAX_CARDS)
return STA_NOINIT|STA_NODISK;
/* Don't bother initializing a card that isn't there */
@ -527,7 +527,7 @@ DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
uint16_t crc,recvcrc;
if (drv >= MAX_CARDS)
return RES_PARERR;
//printf("sd_read: sector=%lu, count=%u\n", sector, count);
for (sec=0;sec<count;sec++) {
errorcount = 0;
while (errorcount < CONFIG_SD_AUTO_RETRIES) {

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@ -25,7 +25,7 @@
*/
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include <arm/bits.h>
#include "bits.h"
#include "config.h"
#include "spi.h"
@ -39,20 +39,35 @@
#define SSP_CLK_DIVISOR_FAST 4
#define SSP_CLK_DIVISOR_SLOW 250
#define SSP_REGS LPC_SSP1
#define SSP_PCLKREG PCLKSEL0
// #define SSP_REGS LPC_SSP1
// #define SSP_PCLKREG PCLKSEL0
/* SSP0: PCLKSEL1
SSP1: PCLKSEL0 */
#define SSP_PCLKBIT 20
// #define SSP_PCLKBIT 20
/* SSP0: 10
SSP1: 20 */
#define SSP_DMAID_TX 2
// #define SSP_DMAID_TX 2
/* SSP0: 0
SSP1: 2 */
#define SSP_DMAID_RX 3
// #define SSP_DMAID_RX 3
/* SSP0: 1
SSP1: 3 */
typedef struct {
LPC_SSP_TypeDef *SSP_REGS;
LPC_GPDMA_TypeDef *SSP_DMAC;
__IO uint32_t SSP_PCLKREG;
int SSP_PCLKBIT;
int SSP_DMAID_TX;
int SSP_DMAID_RX;
} ssp_props;
static ssp_props SSP_SEL[2] = {
{ LPC_SSP0, LPC_GPDMA0, PCLKSEL1, 10, 0, 1 }, /* SSP0 */
{ LPC_SSP1, LPC_GPDMA1, PCLKSEL0, 20, 2, 3 }
};
void spi_init(spi_speed_t speed) {
/* Set clock prescaler to 1:1 */
BITBAND(LPC_SC->SSP_PCLKREG, SSP_PCLKBIT) = 1;

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@ -14,7 +14,6 @@
#define PCRIT 16
volatile tick_t ticks;
extern uint32_t f_cpu;
void __attribute__((weak,noinline)) SysTick_Hook(void) {
// Empty function for hooking the systick handler
@ -59,7 +58,7 @@ void delay_ms(unsigned int time) {
/* Prepare RIT */
LPC_RIT->RICOUNTER = 0;
LPC_RIT->RICTRL = BV(RITEN) | BV(RITINT);
LPC_RIT->RICOMPVAL = (f_cpu / 1000) * time;
LPC_RIT->RICOMPVAL = (CONFIG_CPU_FREQUENCY / 1000) * time;
/* Wait until RIT signals an interrupt */
while (!(BITBAND(LPC_RIT->RICTRL, RITINT))) ;