mk2 fw wip
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@ -55,7 +55,7 @@ TARGET = $(OBJDIR)/sd2snes
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# List C source files here. (C dependencies are automatically generated.)
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SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c sdcard.c spi.c fileops.c rtc.c
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SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c sdcard.c spi.c fileops.c rtc.c fpga.c
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# List Assembler source files here.
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@ -5,11 +5,7 @@
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#include <arm/NXP/LPC17xx/LPC17xx.h>
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#include "clock.h"
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#include "bits.h"
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uint32_t f_cpu=4000000;
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uint16_t pll_mult = 1;
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uint8_t pll_prediv = 1;
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uint8_t cclk_div = 1;
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#include "uart.h"
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void clock_disconnect() {
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disconnectPLL0();
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@ -64,7 +60,6 @@ void setFlashAccessTime(uint8_t clocks) {
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void setPLL0MultPrediv(uint16_t mult, uint8_t prediv) {
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LPC_SC->PLL0CFG=PLL_MULT(mult) | PLL_PREDIV(prediv);
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f_cpu = F_OSC*2*mult/prediv/cclk_div;
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PLL0feed();
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}
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@ -91,7 +86,6 @@ void disconnectPLL0() {
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void setCCLKDiv(uint8_t div) {
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LPC_SC->CCLKCFG=CCLK_DIV(div);
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f_cpu=F_OSC*2*pll_mult/pll_prediv/div;
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}
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void enableMainOsc() {
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@ -6,7 +6,7 @@
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#define SD_SUPPLY_VOLTAGE (1L<<21) /* 3.3V - 3.4V */
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#define CONFIG_SD_BLOCKTRANSFER 1
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#define CONFIG_SD_AUTO_RETRIES 10
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#define CONFIG_SD_DATACRC 1
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// #define CONFIG_SD_DATACRC 1
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#define CONFIG_UART_NUM 3
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@ -55,7 +55,7 @@ DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
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#if _READONLY == 0
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DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
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#endif
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DRESULT disk_ioctl (BYTE, BYTE, void*);
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#define disk_ioctl(a,b,c) RES_OK
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void disk_init(void);
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6
src/ff.c
6
src/ff.c
@ -87,7 +87,7 @@
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#include "ff.h" /* FatFs configurations and declarations */
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#include "diskio.h" /* Declarations of low level disk I/O functions */
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#include "uart.h"
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/*--------------------------------------------------------------------------
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@ -319,7 +319,7 @@ void mem_cpy (void* dst, const void* src, UINT cnt) {
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#if _WORD_ACCESS == 1
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while (cnt >= sizeof(int)) {
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*((int*)d) = *((int*)s);
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*(int*)d = *(int*)s;
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d += sizeof(int); s += sizeof(int);
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cnt -= sizeof(int);
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}
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@ -1815,8 +1815,6 @@ FRESULT chk_mounted ( /* FR_OK(0): successful, !=0: any error occurred */
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fs->fs_type = 0; /* Clear the file system object */
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fs->drv = (BYTE)LD2PD(vol); /* Bind the logical drive and a physical drive */
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stat = disk_initialize(fs->drv); /* Initialize low level disk I/O layer */
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printf("disk_initialize status: %d\n", stat);
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if (stat & STA_NOINIT) /* Check if the initialization succeeded */
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return FR_NOT_READY; /* Failed to initialize due to no media or hard error */
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#if _MAX_SS != 512 /* Get disk sector size (variable sector size cfg only) */
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@ -40,7 +40,7 @@
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/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
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#define _USE_MKFS 1 /* 0:Disable or 1:Enable */
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#define _USE_MKFS 0 /* 0:Disable or 1:Enable */
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/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
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@ -28,7 +28,7 @@
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#define FILEOPS_H
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#include "ff.h"
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BYTE file_buf[4096];
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BYTE file_buf[512];
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FATFS fatfs;
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FIL file_handle;
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FRESULT file_res;
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17
src/led.c
17
src/led.c
@ -3,9 +3,13 @@
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#include <arm/NXP/LPC17xx/LPC17xx.h>
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#include "bits.h"
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#include "timer.h"
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#include "led.h"
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int led_rdyledstate = 0;
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void rdyled(unsigned int state) {
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BITBAND(LPC_GPIO2->FIODIR, 0) = state;
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led_rdyledstate = state;
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}
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void readled(unsigned int state) {
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@ -22,3 +26,16 @@ void led_clkout32(uint32_t val) {
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delay_ms(400);
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}
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}
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void toggle_rdy_led() {
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rdyled(~led_rdyledstate);
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}
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void led_panic() {
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while(1) {
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LPC_GPIO2->FIODIR |= BV(0) | BV(1) | BV(2);
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delay_ms(350);
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LPC_GPIO2->FIODIR &= ~(BV(0) | BV(1) | BV(2));
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delay_ms(350);
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}
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}
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@ -6,5 +6,7 @@
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void readled(unsigned int state);
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void rdyled(unsigned int state);
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void led_clkout32(uint32_t val);
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void toggle_rdy_led(void);
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void led_panic(void);
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#endif
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25
src/main.c
25
src/main.c
@ -1,4 +1,5 @@
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#include <arm/NXP/LPC17xx/LPC17xx.h>
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#include "config.h"
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#include "clock.h"
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#include "uart.h"
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#include "bits.h"
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@ -9,6 +10,7 @@
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#include "spi.h"
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#include "sdcard.h"
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#include "fileops.h"
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#include "fpga.h"
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#define EMC0TOGGLE (3<<4)
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#define MR0R (1<<1)
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@ -23,43 +25,42 @@ int main(void) {
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LPC_GPIO1->FIODIR = 0;
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uint32_t p1;
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/* connect UART3 on P0[25:26] + SSP1 on P0[6:9] */
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/* connect UART3 on P0[25:26] + SSP1 on P0[6:9] + MAT3.0 on P0[10] */
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LPC_PINCON->PINSEL1=(0xf<<18);
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LPC_PINCON->PINSEL0=BV(13) | BV(15) | BV(17) | BV(19);
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LPC_PINCON->PINSEL0=BV(13) | BV(15) | BV(17) | BV(19) | BV(20) | BV(21);
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clock_disconnect();
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power_init();
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timer_init();
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uart_init();
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delay_ms(10);
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spi_init(SPI_SPEED_SLOW);
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sd_init();
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/* do this last because the peripheral init()s change PCLK dividers */
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clock_init();
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delay_ms(10);
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printf("\n\nsd2snes mk.2\n============\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
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file_init();
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printf("fileres: %d diskstate: %d\n", file_res, disk_state);
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file_open((uint8_t*)"/mon.smc", FA_READ);
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spi_set_speed(SPI_SPEED_FAST);
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printf("fileres: %d diskstate: %d\n", file_res, disk_state);
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uart_putc('S');
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for(p1=0; p1<2048; p1++) {
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/* uart_putc('S');
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for(p1=0; p1<8192; p1++) {
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file_read();
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}
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file_close();
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uart_putc('E');
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uart_putcrlf();
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printf("sizeof(struct FIL): %d\n", sizeof(file_handle));
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uart_trace(file_buf, 0, 512);
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uart_trace(file_buf, 0, 512);*/
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/* setup timer (fpga clk) */
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LPC_TIM3->CTCR=0;
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LPC_TIM3->EMR=EMC0TOGGLE;
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LPC_PINCON->PINSEL0=(0x3<<20);
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LPC_TIM3->MCR=MR0R;
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LPC_TIM3->MR0=1;
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LPC_TIM3->TCR=1;
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uart_puts("hurr durr derpderpderp\n");
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fpga_init();
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fpga_pgm((uint8_t*)"/sd2snes/main.bit");
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while (1) {
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p1 = LPC_GPIO1->FIOPIN;
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BITBAND(LPC_GPIO2->FIOPIN, 1) = (p1 & BV(29))>>29;
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@ -68,7 +68,7 @@
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// FIXME: Move, make configurable
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static void set_sd_led(uint8_t state) {
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BITBAND(LPC_GPIO2->FIODIR, 2) = state;
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// BITBAND(LPC_GPIO2->FIODIR, 2) = state;
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}
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// FIXME: Move, add generic C or AVR ASM version
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@ -410,7 +410,7 @@ DSTATUS sd_initialize(BYTE drv) {
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uint8_t i;
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uint16_t counter;
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uint32_t answer;
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printf("sd_initialize\n");
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if (drv >= MAX_CARDS)
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return STA_NOINIT|STA_NODISK;
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/* Don't bother initializing a card that isn't there */
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@ -527,7 +527,7 @@ DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
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uint16_t crc,recvcrc;
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if (drv >= MAX_CARDS)
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return RES_PARERR;
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//printf("sd_read: sector=%lu, count=%u\n", sector, count);
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for (sec=0;sec<count;sec++) {
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errorcount = 0;
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while (errorcount < CONFIG_SD_AUTO_RETRIES) {
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27
src/spi.c
27
src/spi.c
@ -25,7 +25,7 @@
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*/
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#include <arm/NXP/LPC17xx/LPC17xx.h>
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#include <arm/bits.h>
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#include "bits.h"
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#include "config.h"
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#include "spi.h"
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@ -39,20 +39,35 @@
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#define SSP_CLK_DIVISOR_FAST 4
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#define SSP_CLK_DIVISOR_SLOW 250
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#define SSP_REGS LPC_SSP1
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#define SSP_PCLKREG PCLKSEL0
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// #define SSP_REGS LPC_SSP1
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// #define SSP_PCLKREG PCLKSEL0
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/* SSP0: PCLKSEL1
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SSP1: PCLKSEL0 */
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#define SSP_PCLKBIT 20
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// #define SSP_PCLKBIT 20
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/* SSP0: 10
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SSP1: 20 */
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#define SSP_DMAID_TX 2
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// #define SSP_DMAID_TX 2
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/* SSP0: 0
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SSP1: 2 */
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#define SSP_DMAID_RX 3
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// #define SSP_DMAID_RX 3
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/* SSP0: 1
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SSP1: 3 */
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typedef struct {
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LPC_SSP_TypeDef *SSP_REGS;
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LPC_GPDMA_TypeDef *SSP_DMAC;
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__IO uint32_t SSP_PCLKREG;
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int SSP_PCLKBIT;
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int SSP_DMAID_TX;
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int SSP_DMAID_RX;
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} ssp_props;
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static ssp_props SSP_SEL[2] = {
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{ LPC_SSP0, LPC_GPDMA0, PCLKSEL1, 10, 0, 1 }, /* SSP0 */
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{ LPC_SSP1, LPC_GPDMA1, PCLKSEL0, 20, 2, 3 }
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};
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void spi_init(spi_speed_t speed) {
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/* Set clock prescaler to 1:1 */
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BITBAND(LPC_SC->SSP_PCLKREG, SSP_PCLKBIT) = 1;
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@ -14,7 +14,6 @@
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#define PCRIT 16
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volatile tick_t ticks;
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extern uint32_t f_cpu;
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void __attribute__((weak,noinline)) SysTick_Hook(void) {
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// Empty function for hooking the systick handler
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@ -59,7 +58,7 @@ void delay_ms(unsigned int time) {
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/* Prepare RIT */
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LPC_RIT->RICOUNTER = 0;
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LPC_RIT->RICTRL = BV(RITEN) | BV(RITINT);
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LPC_RIT->RICOMPVAL = (f_cpu / 1000) * time;
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LPC_RIT->RICOMPVAL = (CONFIG_CPU_FREQUENCY / 1000) * time;
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/* Wait until RIT signals an interrupt */
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while (!(BITBAND(LPC_RIT->RICTRL, RITINT))) ;
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