wip
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@ -63,7 +63,7 @@ processor p16f630
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; 0x40 - 0x41 buffer for seed calc
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; 0x42 input buffer
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; 0x43 variable for key detect
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; 0x44 temp input buffer
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; 0x44 "direction" buffer
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; 0x4d buffer for eeprom access
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; 0x4e loop variable for longwait
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; 0x4f loop variable for wait
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@ -94,6 +94,8 @@ processor p16f630
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goto init
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trap
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org 0x0004
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movlw 0x3
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xorwf PORTC, f
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goto trap
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rst ; we jump here after powerup or RC0=1
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bcf PORTC, 0 ; clear stream i/o
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@ -106,6 +108,7 @@ rst ; we jump here after powerup or RC0=1
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rst_loop
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btfsc PORTA, 0 ; stay in "reset" as long as RA0=1
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goto rst_loop
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clrf 0x44 ; clear dir buffer
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clrf 0x51 ; clear reset button state
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clrf 0x52 ; clear modechange flag
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clrf 0x53
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@ -229,8 +232,6 @@ main
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; --------wait before sending stream ID--------
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movlw 0xba
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call wait
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nop
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nop
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; --------lock sends stream ID. 15 cycles per bit--------
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; bsf GPIO, 0 ; (debug marker)
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@ -282,8 +283,8 @@ main
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bsf TRISC, 0
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bcf TRISC, 1
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banksel PORTC
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movlw 0x24 ; "wait" 1
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call wait ; wait 112
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movlw 0x23 ;
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call wait ; wait 109
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; nop
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movlw 0x1 ; 'first time' bit
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movwf 0x43 ; for key detection
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@ -302,45 +303,56 @@ loop1
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movf 0x50, w ; get LED state
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iorwf 0x20, f ; combine with data i/o
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movf 0x20, w
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andlw 0x33 ; mask out anything unwanted
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movwf PORTC
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movf PORTC, w ; read input
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movwf 0x42 ; store input
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movf 0x50, w ; get LED state
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movwf PORTC ; reset GPIO
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movf 0x42, w
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movwf 0x44 ; temp input buffer, will be destroyed
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nop
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nop
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call checkkey
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btfsc 0x37, 0 ; check "direction"
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rrf 0x44, f ; shift received bit into place
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btfsc 0x44, 0 ; check "direction"
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rrf 0x42, f ; shift received bit into place
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bsf FSR, 4 ; goto other stream
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movf INDF, w ; read
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xorwf 0x44, f ; xor received + calculated
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movwf 0x5f
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rlf 0x5f
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movf 0x5f, w
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movwf PORTC
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xorwf 0x42, f ; xor received + calculated
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bcf FSR, 4 ; back to our own stream
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btfsc 0x44, 0 ; equal? then continue
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bsf 0x43, 1 ; else mark key invalid
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btfsc 0x42, 0 ; equal? then continue
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goto trap ; bsf 0x43, 1 ; else mark key invalid
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btfsc 0x43, 1 ; if key invalid:
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bcf 0x57, 0 ; set det.region=60Hz
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bcf 0x57, 1 ; set det.region=60Hz
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; btfsc 0x43, 1 ; if key invalid:
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; bcf 0x54, 1 ; set init.region=60Hz
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btfsc 0x43, 1 ; if key invalid:
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bcf 0x54, 0 ; set init.region=60Hz
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bsf 0x53, 4 ; simulate region timeout
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nop
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nop
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nop
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nop
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call checkrst
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movlw 0x10 ; wait 52 cycles
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call wait
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incf FSR, f ; next one
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movlw 0xf
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andwf FSR, w
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btfss STATUS, Z
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goto loop1
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movlw 0x1 ; wait 7
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call wait ;
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call mangle
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call mangle
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call mangle
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movf 0x37, w
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movwf 0x44
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nop
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nop
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nop
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nop
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nop
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call mangle
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call mangle
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call mangle
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btfsc 0x37, 0
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goto swap
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banksel TRISC
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@ -787,15 +799,17 @@ checkkey_done
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return
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; -------- check reset button, update status LEDs, etc.
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checkrst
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checkrst ; 4
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movf PORTA, w
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btfss 0x51, 0
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goto checkrst_0
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checkrst_1
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nop
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checkrst_1 ; 4
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movwf 0x51
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btfsc 0x51, 0
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goto checkrst_1_1
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checkrst_1_0
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nop
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checkrst_1_0 ; 24
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; if modechange flag is set: clear modechange flag, set mode, save, restart timer
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; else reset
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btfss 0x52, 0
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@ -821,12 +835,18 @@ checkrst_1_0
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clrf TMR1H
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bsf T1CON, 0 ; restart the timer
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goto checkrst_end
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checkrst_1_1
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checkrst_1_1 ; 24
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; check TMR overflow
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; if overflow, change LED, reset TMR+overflow, set modechange flag
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; else do nothing
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nop
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nop
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nop
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nop
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nop
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nop
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btfss PIR1, 0
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goto checkrst_end
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goto checkrst_end_plus15
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bcf T1CON, 0 ; stop the timer
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clrf PIR1 ; reset overflow bit
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clrf TMR1L ; reset counter
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@ -843,21 +863,28 @@ checkrst_1_1
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bsf 0x52, 0 ; set modechange flag
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goto checkrst_end
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checkrst_0
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checkrst_0 ; 4
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movwf 0x51
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btfsc 0x51, 0
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goto checkrst_0_1
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checkrst_0_0
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nop
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checkrst_0_0 ; 24
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nop
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nop
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nop
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nop
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nop
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nop
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; count some overflows, change region from detected to forced unless auto
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btfsc 0x53, 4 ; past delay?
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goto checkrst_0_0_setregion
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goto checkrst_0_0_setregion_plus5 ; 3
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btfss PIR1, 0
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goto checkrst_end
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goto checkrst_end_plus13 ; 5
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clrf PIR1
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incf 0x53, f ; increment overflow counter
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btfss 0x53, 4 ; 0x10 reached?
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goto checkrst_end
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checkrst_0_0_setregion
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goto checkrst_end ; 9
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checkrst_0_0_setregion ; 10
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movlw 0x3
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xorwf 0x55, w ; mode=auto?
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btfss STATUS, Z
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@ -872,15 +899,45 @@ checkrst_0_0_setregion_save
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movwf 0x54 ; set to output
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goto checkrst_end
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checkrst_0_1
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checkrst_0_1 ; 24
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; reset + start TMR, reset TMR overflow
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clrf TMR1L ; reset timer register
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clrf TMR1H
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clrf PIR1 ; clear overflow bit
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bsf T1CON, 0
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goto checkrst_end_plus18
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checkrst_end
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checkrst_end ; 2
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return
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checkrst_end_plus18
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nop
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nop
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nop
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checkrst_end_plus15
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nop
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nop
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checkrst_end_plus13
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nop
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nop
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nop
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nop
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checkrst_end_plus9
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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goto checkrst_end
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checkrst_0_0_setregion_plus5 ; 5
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nop
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nop
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nop
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goto checkrst_0_0_setregion
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checktmr ; TODO
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return
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; -----------------------------------------------------------------------
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