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Firmware: cx4 support

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This commit is contained in:
ikari 2011-11-01 22:01:14 +01:00
parent 1987968db2
commit 6a17ffe152
3 changed files with 12 additions and 1 deletions
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8
src/memory.c
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@ -191,7 +191,14 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
}
filesize = file_handle.fsize;
smc_id(&romprops);
file_close();
/* reconfigure FPGA if necessary */
if(romprops.fpga_conf) {
printf("reconfigure FPGA with %s...\n", romprops.fpga_conf);
fpga_pgm((uint8_t*)romprops.fpga_conf);
}
set_mcu_addr(base_addr);
file_open(filename, FA_READ);
f_lseek(&file_handle, romprops.offset);
for(;;) {
ff_sd_offload=1;
@ -226,7 +233,6 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
sram_writebyte(0xfc, rombase+0xd5);
set_fpga_time(0x0220110301180530LL);
}
fpga_pgm((uint8_t*)"/sd2snes/cx4.bit");
if(romprops.has_dspx || romprops.has_cx4) {
printf("DSPx game. Loading firmware image %s...\n", romprops.dsp_fw);
load_dspx(romprops.dsp_fw, romprops.fpga_features);

2
src/smc.c
View File

@ -85,6 +85,7 @@ void smc_id(snes_romprops_t* props) {
props->has_st0010 = 0;
props->has_cx4 = 0;
props->fpga_features = 0;
props->fpga_conf = NULL;
for(uint8_t num = 0; num < 6; num++) {
if(!file_readblock(header, hdr_addr[num], sizeof(snes_header_t))
|| file_res) {
@ -155,6 +156,7 @@ void smc_id(snes_romprops_t* props) {
if (header->map == 0x20 && header->carttype == 0xf3) {
props->has_cx4 = 1;
props->dsp_fw = CX4FW;
props->fpga_conf = FPGA_CX4;
props->fpga_features |= FEAT_CX4;
}
else if ((header->map == 0x20 && header->carttype == 0x03) ||

3
src/smc.h
View File

@ -35,6 +35,8 @@
#define DSPFW_ST0010 ((const uint8_t*)"/sd2snes/st0010.bin")
#define CX4FW ((const uint8_t*)"/sd2snes/cx4.bin")
#define FPGA_CX4 ((const uint8_t*)"/sd2snes/fpga_cx4.bit")
typedef struct _snes_header {
uint8_t maker[2]; /* 0xB0 */
uint8_t gamecode[4]; /* 0xB2 */
@ -62,6 +64,7 @@ typedef struct _snes_romprops {
uint32_t ramsize_bytes; /* CartRAM size in bytes */
uint32_t romsize_bytes; /* ROM size in bytes (rounded up) */
const uint8_t* dsp_fw; /* DSP (NEC / Hitachi) ROM filename */
const uint8_t* fpga_conf; /* FPGA config file to load (default: base) */
uint8_t has_dspx; /* DSP[1-4] presence flag */
uint8_t has_st0010; /* st0010 presence flag (additional to dspx)*/
uint8_t has_msu1; /* MSU1 presence flag */