SuperCIC: documentation+cleanup
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Maximilian Rehkopf
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d77ba9c928
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7914df81c4
@ -31,30 +31,76 @@ processor p16f630
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; CIC clk (56) [7] |2 A5 A0 13| CIC lock reset in [8]
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; |3 A4 A1 12| 50/60Hz out
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; |4 A3 A2 11| host reset out [10]
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; LED out (red) |5 C5 C0 10| CIC data i/o 0 (55) [1]
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; LED out (grn) |6 C4 C1 9| CIC data i/o 1 (24) [2]
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; LED out (grn) |5 C5 C0 10| CIC data i/o 0 (55) [1]
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; LED out (red) |6 C4 C1 9| CIC data i/o 1 (24) [2]
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; |7 C3 C2 8| CIC slave reset out (25) [11]
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; `-----------'
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;
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; PORTA: in in in out out in
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; PORTC: out out in out out in
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;
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; pin 11 connected to PPU2 reset in
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; pin 13 connected to reset button
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; pin 8 connected to key CIC pin 7 (or clone CIC pin 5)
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; pin 9 connected to key CIC pin 1 (or clone CIC pin 6)
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; pin 10 connected to key CIC pin 2 (or clone CIC pin 7)
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; pin 11 connected to key CIC pin 9 (SNES /reset line)
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; pin 12 connected to PPU1 pin 24 and PPU2 pin 30 (both isolated from mainboard)
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; pin 13 connected to reset button
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;
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; Host reset out behaves as follows:
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; After powerup it is held low for a couple of us to properly allow the
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; components to power-up.
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; After powerup it is held low for a couple of ms to allow the components
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; to power-up properly.
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; It is then asserted a high level even if the CIC "auth" should fail at
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; any point, thus enabling homebrew or other cartridges without a CIC or
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; CIC clone to be run properly while maintaining compatibility with CIC
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; demanding cartridges like S-DD1 or SA-1 powered ones.
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; The type of key CIC (411/413) is detected automatically.
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;
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; memory usage:
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; This implementation supports automatic 50/60Hz switching based on the
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; detected key CIC in the game cartridge. Also the 50/60Hz setting can be
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; overridden by the user via the reset button.
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;
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; Reset / Mode switch behaves as follows:
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; Reset is pressed for < 586ms -> reset console upon release
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; Reset is pressed for >= 586ms -> enter mode switch cycle, no reset
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; Modes are cycled every 586ms as shown in Fig.1 as long as the reset button
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; is held down.
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; The currently selected mode is indicated by the color of the power LED
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; (see Table 2).
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; The mode is finally selected by releasing the reset button while the
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; desired LED color is shown. The selected mode will then become effective
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; and will be saved to EEPROM. Mode switching does not reset the console.
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;
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; Note that in case a valid CIC is detected in the game cartridge, video mode
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; will be forced to its corresponding region for the first ~9 seconds after
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; reset or powerup. This is an attempt to trick the region detection on most
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; games. See Table 1.
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; In case no CIC is present in the game cartridge the user setting is applied
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; immediately.
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;
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; Table 1. 50/60Hz output behavior according to user setting and key CIC type.
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; SuperCIC key CIC "region"
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; ------------------------------------------------------
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; 60Hz D/F413 50Hz for ~9 sec, then 60Hz
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; 60Hz D/F411 60Hz permanent
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; 60Hz none 60Hz permanent
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;
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; 50Hz D/F413 50Hz permanent
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; 50Hz D/F411 60Hz for ~9 sec, then 50Hz
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; 50Hz none 50Hz permanent
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;
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; Auto D/F413 50Hz permanent
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; Auto D/F411 60Hz permanent
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; Auto none 60Hz permanent
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;
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; Fig.1. SuperCIC mode cycle.
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; ,->60Hz--->50Hz--->Auto->.
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; `-------<--------<-------'
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;
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; Table 2. LED color according to user setting.
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; mode LED color
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; ---------------------
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; 60Hz red
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; 50Hz green
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; Auto orange
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;
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; Table 3. memory usage.
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; -------------------basic CIC functions--------------------
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; 0x20 buffer for seed calc and transfer
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; 0x21 - 0x2f seed area (lock seed)
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@ -67,7 +113,6 @@ processor p16f630
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; 0x4d buffer for eeprom access
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; 0x4e loop variable for longwait
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; 0x4f loop variable for wait
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;
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; -------------------SuperCIC extensions--------------------
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; 0x50 power LED state (no bits except 4 and 5 must be set!!)
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; 0x51 last reset button state
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@ -93,7 +138,6 @@ processor p16f630
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nop
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goto init
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trap
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org 0x0004
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movlw 0x3
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xorwf PORTC, f
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goto trap
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@ -137,6 +181,8 @@ rst_loop
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bsf T1CON, 0 ; start the timer
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goto main ; go go go
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init
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; PORTA: in in in out out in
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; PORTC: out out in out out in
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banksel PORTA
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clrf PORTA
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movlw 0x07 ; GPIO2..0 are digital I/O (not connected to comparator)
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@ -239,58 +285,49 @@ main
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call wait
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; --------lock sends stream ID. 15 cycles per bit--------
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; bsf GPIO, 0 ; (debug marker)
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; bcf GPIO, 0 ;
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btfsc 0x31, 3 ; read stream select bit
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bsf PORTC, 0 ; send bit
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nop
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nop
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bcf PORTC, 0
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movlw 0x1 ; wait=7
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call wait ; burn 10 cycles
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movlw 0x1 ; wait=3*0+7
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call wait ; burn 10 cycles in total
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nop
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nop
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; bsf GPIO, 0
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; bcf GPIO, 0
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btfsc 0x31, 0 ; read stream select bit
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bsf PORTC, 0 ; send bit
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nop
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nop
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bcf PORTC, 0
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movlw 0x1 ; wait=3*W+5
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call wait ; burn 11 cycles
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movlw 0x1 ; wait=3*0+7
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call wait ; burn 10 cycles in total
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nop
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nop
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; bsf GPIO, 0
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; bcf GPIO, 0
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btfsc 0x31, 1 ; read stream select bit
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bsf PORTC, 0 ; send bit
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nop
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nop
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bcf PORTC, 0
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movlw 0x1 ; wait=3*W+5
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call wait ; burn 11 cycles
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movlw 0x1 ; wait=3*0+7
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call wait ; burn 10 cycles in total
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nop
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nop
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; bsf GPIO, 0
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; bcf GPIO, 0
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btfsc 0x31, 2 ; read stream select bit
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bsf PORTC, 0 ; send bit
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nop
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nop
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bcf PORTC, 0
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movlw 0x1 ; wait=3*0+7
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call wait ; burn 10 cycles
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call wait ; burn 10 cycles in total
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banksel TRISC
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bsf TRISC, 0
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bcf TRISC, 1
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banksel PORTC
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movlw 0x23 ;
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call wait ; wait 109
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; nop
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movlw 0x1 ; 'first time' bit
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movwf 0x43 ; for key detection
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; --------main loop--------
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@ -329,10 +366,8 @@ loop1
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bsf 0x43, 1 ; else mark key invalid
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btfsc 0x43, 1 ; if key invalid:
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bcf 0x57, 1 ; set det.region=60Hz
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; btfsc 0x43, 1 ; if key invalid:
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; bcf 0x54, 1 ; set init.region=60Hz
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btfsc 0x43, 1 ; if key invalid:
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bsf 0x53, 4 ; simulate region timeout
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bsf 0x53, 4 ; simulate region timeout->immediate region chg
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nop
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nop
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nop
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@ -761,11 +796,11 @@ die
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; --------requires 19 cycles (incl. call+return)
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checkkey
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btfss 0x43, 0 ; first time?
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goto checkkey_nocheck ; if not, just burn some cycles
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goto checkkey_nocheck; if not, just burn some cycles
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movlw 0x22 ; are we at the correct stream offset?
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xorwf FSR, w
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btfss STATUS, Z ; if not equal:
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goto checkkey_nocheck2 ; burn some cycles less.
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goto checkkey_nocheck2; burn some cycles less.
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; if equal do the check
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btfss 0x42, 0 ; if value from slave is set it's a 411
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goto checkkey_413
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@ -819,7 +854,7 @@ checkrst_1_0 ; 26
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movf 0x56, w ; get temp mode
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movwf 0x55 ; set final mode
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movwf 0x58 ; set forced mode
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banksel EEADR ; save to EEPROM. this somehow takes 2 extra cycles!!!
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banksel EEADR ; save to EEPROM. note: banksels take two cycles each!
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movwf EEDAT
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bsf EECON1,WREN
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movlw 0x55
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@ -827,9 +862,9 @@ checkrst_1_0 ; 26
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movlw 0xaa
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movwf EECON2
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bsf EECON1, WR
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banksel PORTA
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banksel PORTA ; two cycles again
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movlw 0x2
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andwf 0x58, f
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andwf 0x58, f ; cleanup forced mode
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bcf T1CON, 0 ; stop the timer
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clrf PIR1 ; reset overflow bit
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clrf TMR1L ; reset counter
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@ -878,14 +913,14 @@ checkrst_0_0 ; 24
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nop
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; count some overflows, change region from detected to forced unless auto
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btfsc 0x53, 4 ; past delay?
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goto checkrst_0_0_setregion_plus5 ; 3
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goto checkrst_0_0_setregion_plus5
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btfss PIR1, 0
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goto checkrst_end_plus13 ; 5
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goto checkrst_end_plus13
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clrf PIR1
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incf 0x53, f ; increment overflow counter
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btfss 0x53, 4 ; 0x10 reached?
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goto checkrst_end_plus9 ; 9
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checkrst_0_0_setregion ; 10
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goto checkrst_end_plus9
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checkrst_0_0_setregion
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movlw 0x3
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xorwf 0x55, w ; mode=auto?
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btfss STATUS, Z
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@ -933,7 +968,7 @@ checkrst_end_plus9
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nop
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goto checkrst_end
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checkrst_0_0_setregion_plus5 ; 5
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checkrst_0_0_setregion_plus5
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nop
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nop
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nop
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