diff --git a/verilog/sd2snes/main.v b/verilog/sd2snes/main.v
index feed825..737e12e 100644
--- a/verilog/sd2snes/main.v
+++ b/verilog/sd2snes/main.v
@@ -675,10 +675,10 @@ always @(posedge CLK2) begin
   endcase
 end
 
-always @(posedge SYSCLK2) begin
-  if(SNES_PARD_start & r213f_enable) begin
-    r213f_forceread <= 1'b1;
-    r213f_delay <= 3'b001;
+always @(posedge CLK2) begin
+  if(SNES_cycle_end) r213f_forceread <= 1'b1;
+  else if(SNES_PARD_start & r213f_enable) begin
+    r213f_delay <= 3'b000;
     r213f_state <= 2'b10;
   end else if(r213f_state == 2'b10) begin
     r213f_delay <= r213f_delay - 1;
diff --git a/verilog/sd2snes_cx4/main.v b/verilog/sd2snes_cx4/main.v
index 578808b..d79f15c 100644
--- a/verilog/sd2snes_cx4/main.v
+++ b/verilog/sd2snes_cx4/main.v
@@ -617,10 +617,10 @@ always @(posedge CLK2) begin
   endcase
 end
 
-always @(posedge SYSCLK2) begin
-  if(SNES_PARD_start & r213f_enable) begin
-    r213f_forceread <= 1'b1;
-    r213f_delay <= 3'b001;
+always @(posedge CLK2) begin
+  if(SNES_cycle_end) r213f_forceread <= 1'b1;
+  else if(SNES_PARD_start & r213f_enable) begin
+    r213f_delay <= 3'b000;
     r213f_state <= 2'b10;
   end else if(r213f_state == 2'b10) begin
     r213f_delay <= r213f_delay - 1;