dedicated mapper for menu, new logo gfx, TODO: fix avr mem access again

also minor cleanups.
This commit is contained in:
ikari
2009-12-28 04:50:17 +01:00
parent a312640506
commit a120be76bd
27 changed files with 2259 additions and 1907 deletions

View File

@@ -1662,7 +1662,7 @@ FRESULT f_write (
*bw = 0;
res = validate(fs /*, fp->id*/); /* Check validity of the object */
if (res != FR_OK) return res;
if (fp->flag & FA__ERROR) {dprintf("fp->flag & FA__ERROR \n"); return FR_RW_ERROR;} /* Check error flag */
if (fp->flag & FA__ERROR) return FR_RW_ERROR; /* Check error flag */
if (!(fp->flag & FA_WRITE)) return FR_DENIED; /* Check access mode */
if (fp->fsize + btw < fp->fsize) return FR_OK; /* File size cannot reach 4GB */
@@ -1680,18 +1680,17 @@ FRESULT f_write (
clust = create_chain(fs, fp->curr_clust); /* Trace or streach cluster chain */
}
if (clust == 0) break; /* Disk full */
if (clust == 1 || clust >= fs->max_clust) { dprintf("cluster alloc error\n"); goto fw_error; }
if (clust == 1 || clust >= fs->max_clust) goto fw_error;
fp->curr_clust = clust; /* Current cluster */
sect = clust2sect(fs, clust); /* Get current sector */
fp->csect = fs->csize; /* Re-initialize the left sector counter */
}
if(!move_fp_window(fp,0)) {dprintf("move_fp_window error\n"); goto fw_error;}
if(!move_fp_window(fp,0)) goto fw_error;
fp->curr_sect = sect; /* Update current sector */
cc = btw / SS(fs); /* When left bytes >= SS(fs), */
if (cc) { /* Write maximum contiguous sectors directly */
if (cc > fp->csect) cc = fp->csect;
if (disk_write(fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
{ dprintf("disk_write error\n"); goto fw_error;}
if (disk_write(fs->drive, wbuff, sect, (BYTE)cc) != RES_OK) goto fw_error;
fp->csect -= (BYTE)(cc - 1);
fp->curr_sect += cc - 1;
wcnt = cc * SS(fs);
@@ -1705,8 +1704,7 @@ FRESULT f_write (
#if _USE_1_BUF == 0
fp->fptr < fp->fsize && /* Fill sector buffer with file data if needed */
#endif
!move_fp_window(fp,fp->curr_sect))
{ dprintf("fract write error\n "); goto fw_error; }
!move_fp_window(fp,fp->curr_sect)) goto fw_error;
memcpy(&FPBUF.data[fp->fptr & (SS(fs) - 1)], wbuff, wcnt);
FPBUF.dirty=TRUE;
}

View File

@@ -44,9 +44,7 @@ UINT file_readblock(void* buf, uint32_t addr, uint16_t size) {
if(file_handle.fptr != addr) {
return 0;
}
if(file_res) { dprintf("no lseek %d\n", file_res); _delay_ms(30); return 0;}
file_res = f_read(&file_handle, buf, size, &bytes_read);
if(file_res) { dprintf("no read %d\n", file_res); _delay_ms(30); }
return bytes_read;
}

View File

@@ -90,10 +90,10 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
db_tgt += 0x00010000;
dprintf("new=%lx\n", db_tgt);
}
sram_writelong(parent_tgt, db_tgt);
sram_writelong((parent_tgt-SRAM_MENU_ADDR), db_tgt);
sram_writebyte(0, db_tgt+sizeof(next_subdir_tgt));
sram_writeblock("../\0", db_tgt+sizeof(next_subdir_tgt)+sizeof(len), 4);
sram_writelong(db_tgt|((uint32_t)0x80<<24), dir_tgt);
sram_writelong((db_tgt-SRAM_MENU_ADDR)|((uint32_t)0x80<<24), dir_tgt);
db_tgt += sizeof(next_subdir_tgt)+sizeof(len)+4;
dir_tgt += 4;
}
@@ -122,7 +122,7 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
// write element pointer to current dir structure
dprintf("d=%d Saving %lX to Address %lX [dir]\n", depth, db_tgt, dir_tgt);
// _delay_ms(50);
sram_writelong(db_tgt|((uint32_t)0x80<<24), dir_tgt);
sram_writelong((db_tgt-SRAM_MENU_ADDR)|((uint32_t)0x80<<24), dir_tgt);
// sram_writeblock((uint8_t*)&db_tgt, dir_tgt_save, sizeof(dir_tgt_save));
// save element:
@@ -136,7 +136,7 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
}
dprintf(" Saving dir descriptor to %lX, tgt=%lX, path=%s\n", db_tgt, next_subdir_tgt, path);
// _delay_ms(100);
sram_writelong(next_subdir_tgt, db_tgt);
sram_writelong((next_subdir_tgt-SRAM_MENU_ADDR), db_tgt);
sram_writebyte(len+1, db_tgt+sizeof(next_subdir_tgt));
sram_writeblock(path, db_tgt+sizeof(next_subdir_tgt)+sizeof(len), pathlen);
sram_writeblock("/\0", db_tgt + sizeof(next_subdir_tgt) + sizeof(len) + pathlen, 2);
@@ -180,7 +180,7 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
db_tgt += 0x00010000;
dprintf("new=%lx\n", db_tgt);
}
sram_writelong(db_tgt, dir_tgt);
sram_writelong((db_tgt-SRAM_MENU_ADDR), dir_tgt);
// sram_writeblock((uint8_t*)&db_tgt, dir_tgt, sizeof(db_tgt));
dir_tgt += 4;
// save element:
@@ -214,8 +214,8 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
}
// dprintf("%x\n", crc);
// _delay_ms(50);
sram_writeblock(&db_tgt, SRAM_DB_ADDR+4, sizeof(db_tgt));
sram_writeblock(&dir_end, SRAM_DB_ADDR+8, sizeof(dir_end));
sram_writelong(db_tgt, SRAM_DB_ADDR+4);
sram_writelong(dir_end, SRAM_DB_ADDR+8);
return crc;
}

View File

@@ -27,6 +27,7 @@
#include "fpga_spi.h"
#include "spi.h"
#include "avrcompat.h"
#include "led.h"
/*DWORD get_fattime(void) {
return 0L;
@@ -75,6 +76,7 @@ void fpga_postinit() {
void fpga_pgm(uint8_t* filename) {
int MAXRETRIES = 10;
int retries = MAXRETRIES;
int j=0;
do {
set_prog_b(0);
uart_putc('P');
@@ -93,6 +95,9 @@ void fpga_pgm(uint8_t* filename) {
}
for (;;) {
if(!(j++ % 8)) {
toggle_pwr_led();
}
bytes_read = file_read();
if (file_res || bytes_read == 0) break; // error or eof
for(int i=0; i<bytes_read; i++) {
@@ -105,6 +110,7 @@ void fpga_pgm(uint8_t* filename) {
if(!fpga_get_done()) {
dprintf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
_delay_ms(50);
led_panic();
}
fpga_postinit();
}
@@ -113,13 +119,13 @@ void set_avr_ena(uint8_t val) {
if(val) { // shared mode
PORTD |= _BV(PD7);
// Disable SPI double speed mode -> clock = f/4
SPSR = 0;
dprintf("SPI slow\n");
// SPSR = 0;
// dprintf("SPI slow\n");
} else { // avr only
PORTD &= ~_BV(PD7);
// Enable SPI double speed mode -> clock = f/2
SPSR = _BV(SPI2X);
dprintf("SPI fast\n");
// SPSR = _BV(SPI2X);
// dprintf("SPI fast\n");
}
}

View File

@@ -25,6 +25,7 @@
*/
#include <avr/io.h>
#include <util/delay.h>
#include "config.h"
#include "led.h"
@@ -34,11 +35,30 @@ static uint8_t led_bounce_dir = 1;
volatile uint8_t led_state;
void led_panic(void) {
led_std();
while(1) {
set_pwr_led(1);
set_busy_led(1);
_delay_ms(150);
set_pwr_led(0);
set_busy_led(0);
_delay_ms(150);
}
}
void toggle_busy_led(void) {
PORTB &= ~_BV(PB3);
DDRB ^= _BV(PB3);
}
void toggle_pwr_led(void) {
PORTB &= ~_BV(PB0);
DDRB ^= _BV(PB0);
}
void set_busy_led(uint8_t state) {
PORTB &= ~_BV(PB3);
if(state) {

View File

@@ -39,10 +39,12 @@ extern volatile uint8_t led_state;
/* Update the LEDs to match the buffer state */
void toggle_busy_led(void);
void toggle_pwr_led(void);
void set_busy_led(uint8_t);
void set_pwr_led(uint8_t);
void set_busy_pwm(uint8_t brightness);
void bounce_busy_led(void);
void led_pwm(void);
void led_std(void);
void led_panic(void);
#endif

View File

@@ -261,8 +261,9 @@ restart:
// sram_hexdump(0, 0x200);
uart_putc('(');
load_rom((uint8_t*)"/sd2snes/menu.bin");
load_rom((uint8_t*)"/sd2snes/menu.bin", SRAM_MENU_ADDR);
set_rom_mask(0x3fffff); // force mirroring off
set_avr_mapper(0x7); // menu mapper
uart_putc(')');
uart_putcrlf();
// sram_hexdump(0x7ffff0, 0x10);
@@ -279,7 +280,6 @@ restart:
snes_reset(0);
uint8_t cmd = 0;
while(!sram_reliable());
@@ -292,7 +292,7 @@ restart:
// snes_reset(1);
set_avr_ena(0);
dprintf("Selected name: %s\n", file_lfn);
load_rom(file_lfn);
load_rom(file_lfn, SRAM_ROM_ADDR);
// save_sram((uint8_t*)"/sd2snes/test.smc", romprops.romsize_bytes, 0);
if(romprops.ramsize_bytes) {
strcpy(strrchr((char*)file_lfn, (int)'.'), ".srm");
@@ -318,7 +318,6 @@ restart:
cmd=0;
uint8_t snes_reset_prev=0, snes_reset_now=0, snes_reset_state=0;
uint16_t reset_count=0;
// /* XXX */ writetest();
while(fpga_test() == FPGA_TEST_TOKEN) {
snes_reset_now=get_snes_reset();
if(snes_reset_now) {
@@ -359,17 +358,7 @@ restart:
snes_reset_prev = snes_reset_now;
}
// FPGA TEST FAIL. PANIC.
led_std();
while(1) {
set_pwr_led(1);
set_busy_led(1);
_delay_ms(150);
set_pwr_led(0);
set_busy_led(0);
_delay_ms(150);
}
led_panic();
/* HERE BE LIONS */
while(1) {

View File

@@ -88,11 +88,15 @@ uint32_t sram_readlong(uint32_t addr) {
spi_fpga();
spiTransferByte(0x81);
spiTransferByte(0x00);
uint32_t val = spiTransferByte(0x00);
val |= ((uint32_t)spiTransferByte(0x00)<<8);
val |= ((uint32_t)spiTransferByte(0x00)<<16);
val |= ((uint32_t)spiTransferByte(0x00)<<24);
uint32_t count=0;
uint32_t val = spiTransferByte(count & 0xff);
count++;
val |= ((uint32_t)spiTransferByte(count & val)<<8);
count++;
val |= ((uint32_t)spiTransferByte(count & val)<<16);
count++;
val |= ((uint32_t)spiTransferByte(count & val)<<24);
count++;
spi_none();
return val;
}
@@ -123,15 +127,15 @@ void sram_writeblock(void* buf, uint32_t addr, uint16_t size) {
spi_none();
}
uint32_t load_rom(uint8_t* filename) {
uint32_t load_rom(uint8_t* filename, uint32_t base_addr) {
// uint8_t dummy;
set_avr_bank(0);
UINT bytes_read;
DWORD filesize;
UINT count=0;
file_open(filename, FA_READ);
filesize = file_handle.fsize;
smc_id(&romprops);
set_avr_addr(base_addr);
dprintf("no nervous breakdown beyond this point! or else!\n");
if(file_res) {
uart_putc('?');
@@ -293,8 +297,9 @@ uint8_t sram_reliable() {
val=sram_readlong(SRAM_SCRATCHPAD);
if(val==0x12345678) {
score++;
} else {
dprintf("i=%d val=%08lX\n", i, val);
}
// dprintf("val=%08lX\n", val);
}
if(score<SRAM_RELIABILITY_SCORE) {
result = 0;

View File

@@ -4,16 +4,20 @@
#ifndef MEMORY_H
#define MEMORY_H
#define SRAM_DB_ADDR (0x080000L)
#define SRAM_DIR_ADDR (0x300000L)
#define SRAM_CMD_ADDR (0x601004L)
#define SRAM_FD_ADDR (0x601000L)
#define SRAM_ROM_ADDR (0x000000L)
#define SRAM_SAVE_ADDR (0x600000L)
#define SRAM_MENU_ADDR (0x600000L)
#define SRAM_DB_ADDR (0x620000L)
#define SRAM_DIR_ADDR (0x610000L)
#define SRAM_CMD_ADDR (0x7F1004L)
#define SRAM_FD_ADDR (0x7F1000L)
#define SRAM_MENU_SAVE_ADDR (0x7F0000L)
#define SRAM_SCRATCHPAD (0x7FFF00L)
#define SRAM_DIRID (0x7FFFF0L)
#define SRAM_RELIABILITY_SCORE (0x100)
uint32_t load_rom(uint8_t* filename);
uint32_t load_rom(uint8_t* filename, uint32_t base_addr);
uint32_t load_sram(uint8_t* filename, uint32_t base_addr);
void sram_hexdump(uint32_t addr, uint32_t len);
uint8_t sram_readbyte(uint32_t addr);

View File

@@ -15,7 +15,6 @@
uint8_t initloop=1;
uint32_t saveram_crc, saveram_crc_old;
uint32_t saveram_base_addr = 0x600000; // chip 3
void snes_init() {
DDRD |= _BV(PD5); // PD5 = RESET_DIR
DDRD |= _BV(PD6); // PD6 = RESET
@@ -59,10 +58,10 @@ uint8_t sram_valid = 0;
void snes_main_loop() {
if(!romprops.ramsize_bytes)return;
if(initloop) {
saveram_crc_old = calc_sram_crc(saveram_base_addr, romprops.ramsize_bytes);
saveram_crc_old = calc_sram_crc(SRAM_SAVE_ADDR, romprops.ramsize_bytes);
initloop=0;
}
saveram_crc = calc_sram_crc(saveram_base_addr, romprops.ramsize_bytes);
saveram_crc = calc_sram_crc(SRAM_SAVE_ADDR, romprops.ramsize_bytes);
sram_valid = sram_reliable();
if(crc_valid && sram_valid) {
if(saveram_crc != saveram_crc_old) {
@@ -82,7 +81,7 @@ void snes_main_loop() {
uart_puthexshort(saveram_crc);
uart_putcrlf();
set_busy_led(1);
save_sram(file_lfn, romprops.ramsize_bytes, saveram_base_addr);
save_sram(file_lfn, romprops.ramsize_bytes, SRAM_SAVE_ADDR);
set_busy_led(0);
didnotsave=0;
}
@@ -90,7 +89,7 @@ void snes_main_loop() {
diffcount=0;
uart_putc('V');
set_busy_led(1);
save_sram(file_lfn, romprops.ramsize_bytes, saveram_base_addr);
save_sram(file_lfn, romprops.ramsize_bytes, SRAM_SAVE_ADDR);
didnotsave=0;
set_busy_led(0);
}
@@ -121,5 +120,5 @@ uint8_t menu_main_loop() {
void get_selected_name(uint8_t* fn) {
uint32_t addr = sram_readlong(SRAM_FD_ADDR);
dprintf("fd addr=%lX\n", addr);
sram_readblock(fn, addr+0x41, 256);
sram_readblock(fn, addr+0x41+SRAM_MENU_ADDR, 256);
}