dedicated mapper for menu, new logo gfx, TODO: fix avr mem access again
also minor cleanups.
This commit is contained in:
12
src/ff.c
12
src/ff.c
@@ -1662,7 +1662,7 @@ FRESULT f_write (
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*bw = 0;
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res = validate(fs /*, fp->id*/); /* Check validity of the object */
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if (res != FR_OK) return res;
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if (fp->flag & FA__ERROR) {dprintf("fp->flag & FA__ERROR \n"); return FR_RW_ERROR;} /* Check error flag */
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if (fp->flag & FA__ERROR) return FR_RW_ERROR; /* Check error flag */
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if (!(fp->flag & FA_WRITE)) return FR_DENIED; /* Check access mode */
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if (fp->fsize + btw < fp->fsize) return FR_OK; /* File size cannot reach 4GB */
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@@ -1680,18 +1680,17 @@ FRESULT f_write (
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clust = create_chain(fs, fp->curr_clust); /* Trace or streach cluster chain */
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}
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if (clust == 0) break; /* Disk full */
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if (clust == 1 || clust >= fs->max_clust) { dprintf("cluster alloc error\n"); goto fw_error; }
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if (clust == 1 || clust >= fs->max_clust) goto fw_error;
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fp->curr_clust = clust; /* Current cluster */
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sect = clust2sect(fs, clust); /* Get current sector */
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fp->csect = fs->csize; /* Re-initialize the left sector counter */
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}
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if(!move_fp_window(fp,0)) {dprintf("move_fp_window error\n"); goto fw_error;}
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if(!move_fp_window(fp,0)) goto fw_error;
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fp->curr_sect = sect; /* Update current sector */
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cc = btw / SS(fs); /* When left bytes >= SS(fs), */
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if (cc) { /* Write maximum contiguous sectors directly */
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if (cc > fp->csect) cc = fp->csect;
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if (disk_write(fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
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{ dprintf("disk_write error\n"); goto fw_error;}
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if (disk_write(fs->drive, wbuff, sect, (BYTE)cc) != RES_OK) goto fw_error;
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fp->csect -= (BYTE)(cc - 1);
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fp->curr_sect += cc - 1;
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wcnt = cc * SS(fs);
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@@ -1705,8 +1704,7 @@ FRESULT f_write (
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#if _USE_1_BUF == 0
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fp->fptr < fp->fsize && /* Fill sector buffer with file data if needed */
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#endif
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!move_fp_window(fp,fp->curr_sect))
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{ dprintf("fract write error\n "); goto fw_error; }
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!move_fp_window(fp,fp->curr_sect)) goto fw_error;
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memcpy(&FPBUF.data[fp->fptr & (SS(fs) - 1)], wbuff, wcnt);
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FPBUF.dirty=TRUE;
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}
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@@ -44,9 +44,7 @@ UINT file_readblock(void* buf, uint32_t addr, uint16_t size) {
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if(file_handle.fptr != addr) {
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return 0;
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}
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if(file_res) { dprintf("no lseek %d\n", file_res); _delay_ms(30); return 0;}
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file_res = f_read(&file_handle, buf, size, &bytes_read);
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if(file_res) { dprintf("no read %d\n", file_res); _delay_ms(30); }
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return bytes_read;
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}
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@@ -90,10 +90,10 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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db_tgt += 0x00010000;
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dprintf("new=%lx\n", db_tgt);
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}
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sram_writelong(parent_tgt, db_tgt);
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sram_writelong((parent_tgt-SRAM_MENU_ADDR), db_tgt);
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sram_writebyte(0, db_tgt+sizeof(next_subdir_tgt));
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sram_writeblock("../\0", db_tgt+sizeof(next_subdir_tgt)+sizeof(len), 4);
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sram_writelong(db_tgt|((uint32_t)0x80<<24), dir_tgt);
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sram_writelong((db_tgt-SRAM_MENU_ADDR)|((uint32_t)0x80<<24), dir_tgt);
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db_tgt += sizeof(next_subdir_tgt)+sizeof(len)+4;
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dir_tgt += 4;
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}
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@@ -122,7 +122,7 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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// write element pointer to current dir structure
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dprintf("d=%d Saving %lX to Address %lX [dir]\n", depth, db_tgt, dir_tgt);
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// _delay_ms(50);
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sram_writelong(db_tgt|((uint32_t)0x80<<24), dir_tgt);
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sram_writelong((db_tgt-SRAM_MENU_ADDR)|((uint32_t)0x80<<24), dir_tgt);
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// sram_writeblock((uint8_t*)&db_tgt, dir_tgt_save, sizeof(dir_tgt_save));
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// save element:
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@@ -136,7 +136,7 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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}
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dprintf(" Saving dir descriptor to %lX, tgt=%lX, path=%s\n", db_tgt, next_subdir_tgt, path);
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// _delay_ms(100);
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sram_writelong(next_subdir_tgt, db_tgt);
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sram_writelong((next_subdir_tgt-SRAM_MENU_ADDR), db_tgt);
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sram_writebyte(len+1, db_tgt+sizeof(next_subdir_tgt));
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sram_writeblock(path, db_tgt+sizeof(next_subdir_tgt)+sizeof(len), pathlen);
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sram_writeblock("/\0", db_tgt + sizeof(next_subdir_tgt) + sizeof(len) + pathlen, 2);
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@@ -180,7 +180,7 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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db_tgt += 0x00010000;
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dprintf("new=%lx\n", db_tgt);
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}
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sram_writelong(db_tgt, dir_tgt);
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sram_writelong((db_tgt-SRAM_MENU_ADDR), dir_tgt);
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// sram_writeblock((uint8_t*)&db_tgt, dir_tgt, sizeof(db_tgt));
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dir_tgt += 4;
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// save element:
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@@ -214,8 +214,8 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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}
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// dprintf("%x\n", crc);
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// _delay_ms(50);
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sram_writeblock(&db_tgt, SRAM_DB_ADDR+4, sizeof(db_tgt));
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sram_writeblock(&dir_end, SRAM_DB_ADDR+8, sizeof(dir_end));
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sram_writelong(db_tgt, SRAM_DB_ADDR+4);
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sram_writelong(dir_end, SRAM_DB_ADDR+8);
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return crc;
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}
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14
src/fpga.c
14
src/fpga.c
@@ -27,6 +27,7 @@
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#include "fpga_spi.h"
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#include "spi.h"
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#include "avrcompat.h"
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#include "led.h"
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/*DWORD get_fattime(void) {
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return 0L;
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@@ -75,6 +76,7 @@ void fpga_postinit() {
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void fpga_pgm(uint8_t* filename) {
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int MAXRETRIES = 10;
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int retries = MAXRETRIES;
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int j=0;
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do {
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set_prog_b(0);
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uart_putc('P');
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@@ -93,6 +95,9 @@ void fpga_pgm(uint8_t* filename) {
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}
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for (;;) {
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if(!(j++ % 8)) {
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toggle_pwr_led();
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}
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bytes_read = file_read();
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if (file_res || bytes_read == 0) break; // error or eof
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for(int i=0; i<bytes_read; i++) {
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@@ -105,6 +110,7 @@ void fpga_pgm(uint8_t* filename) {
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if(!fpga_get_done()) {
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dprintf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
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_delay_ms(50);
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led_panic();
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}
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fpga_postinit();
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}
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@@ -113,13 +119,13 @@ void set_avr_ena(uint8_t val) {
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if(val) { // shared mode
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PORTD |= _BV(PD7);
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// Disable SPI double speed mode -> clock = f/4
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SPSR = 0;
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dprintf("SPI slow\n");
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// SPSR = 0;
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// dprintf("SPI slow\n");
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} else { // avr only
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PORTD &= ~_BV(PD7);
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// Enable SPI double speed mode -> clock = f/2
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SPSR = _BV(SPI2X);
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dprintf("SPI fast\n");
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// SPSR = _BV(SPI2X);
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// dprintf("SPI fast\n");
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}
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}
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20
src/led.c
20
src/led.c
@@ -25,6 +25,7 @@
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*/
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#include <avr/io.h>
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#include <util/delay.h>
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#include "config.h"
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#include "led.h"
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@@ -34,11 +35,30 @@ static uint8_t led_bounce_dir = 1;
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volatile uint8_t led_state;
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void led_panic(void) {
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led_std();
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while(1) {
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set_pwr_led(1);
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set_busy_led(1);
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_delay_ms(150);
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set_pwr_led(0);
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set_busy_led(0);
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_delay_ms(150);
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}
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}
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void toggle_busy_led(void) {
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PORTB &= ~_BV(PB3);
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DDRB ^= _BV(PB3);
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}
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void toggle_pwr_led(void) {
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PORTB &= ~_BV(PB0);
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DDRB ^= _BV(PB0);
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}
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void set_busy_led(uint8_t state) {
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PORTB &= ~_BV(PB3);
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if(state) {
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@@ -39,10 +39,12 @@ extern volatile uint8_t led_state;
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/* Update the LEDs to match the buffer state */
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void toggle_busy_led(void);
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void toggle_pwr_led(void);
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void set_busy_led(uint8_t);
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void set_pwr_led(uint8_t);
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void set_busy_pwm(uint8_t brightness);
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void bounce_busy_led(void);
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void led_pwm(void);
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void led_std(void);
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void led_panic(void);
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#endif
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19
src/main.c
19
src/main.c
@@ -261,8 +261,9 @@ restart:
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// sram_hexdump(0, 0x200);
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uart_putc('(');
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load_rom((uint8_t*)"/sd2snes/menu.bin");
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load_rom((uint8_t*)"/sd2snes/menu.bin", SRAM_MENU_ADDR);
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set_rom_mask(0x3fffff); // force mirroring off
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set_avr_mapper(0x7); // menu mapper
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uart_putc(')');
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uart_putcrlf();
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// sram_hexdump(0x7ffff0, 0x10);
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@@ -279,7 +280,6 @@ restart:
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snes_reset(0);
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uint8_t cmd = 0;
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while(!sram_reliable());
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@@ -292,7 +292,7 @@ restart:
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// snes_reset(1);
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set_avr_ena(0);
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dprintf("Selected name: %s\n", file_lfn);
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load_rom(file_lfn);
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load_rom(file_lfn, SRAM_ROM_ADDR);
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// save_sram((uint8_t*)"/sd2snes/test.smc", romprops.romsize_bytes, 0);
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if(romprops.ramsize_bytes) {
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strcpy(strrchr((char*)file_lfn, (int)'.'), ".srm");
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@@ -318,7 +318,6 @@ restart:
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cmd=0;
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uint8_t snes_reset_prev=0, snes_reset_now=0, snes_reset_state=0;
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uint16_t reset_count=0;
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// /* XXX */ writetest();
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while(fpga_test() == FPGA_TEST_TOKEN) {
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snes_reset_now=get_snes_reset();
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if(snes_reset_now) {
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@@ -359,17 +358,7 @@ restart:
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snes_reset_prev = snes_reset_now;
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}
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// FPGA TEST FAIL. PANIC.
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led_std();
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while(1) {
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set_pwr_led(1);
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set_busy_led(1);
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_delay_ms(150);
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set_pwr_led(0);
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set_busy_led(0);
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_delay_ms(150);
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}
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led_panic();
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/* HERE BE LIONS */
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while(1) {
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21
src/memory.c
21
src/memory.c
@@ -88,11 +88,15 @@ uint32_t sram_readlong(uint32_t addr) {
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spi_fpga();
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spiTransferByte(0x81);
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spiTransferByte(0x00);
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uint32_t val = spiTransferByte(0x00);
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val |= ((uint32_t)spiTransferByte(0x00)<<8);
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val |= ((uint32_t)spiTransferByte(0x00)<<16);
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val |= ((uint32_t)spiTransferByte(0x00)<<24);
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uint32_t count=0;
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uint32_t val = spiTransferByte(count & 0xff);
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count++;
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val |= ((uint32_t)spiTransferByte(count & val)<<8);
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count++;
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val |= ((uint32_t)spiTransferByte(count & val)<<16);
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count++;
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val |= ((uint32_t)spiTransferByte(count & val)<<24);
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count++;
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spi_none();
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return val;
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}
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@@ -123,15 +127,15 @@ void sram_writeblock(void* buf, uint32_t addr, uint16_t size) {
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spi_none();
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}
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uint32_t load_rom(uint8_t* filename) {
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uint32_t load_rom(uint8_t* filename, uint32_t base_addr) {
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// uint8_t dummy;
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set_avr_bank(0);
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UINT bytes_read;
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DWORD filesize;
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UINT count=0;
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file_open(filename, FA_READ);
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filesize = file_handle.fsize;
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smc_id(&romprops);
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set_avr_addr(base_addr);
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dprintf("no nervous breakdown beyond this point! or else!\n");
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if(file_res) {
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uart_putc('?');
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@@ -293,8 +297,9 @@ uint8_t sram_reliable() {
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val=sram_readlong(SRAM_SCRATCHPAD);
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if(val==0x12345678) {
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score++;
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} else {
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dprintf("i=%d val=%08lX\n", i, val);
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}
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// dprintf("val=%08lX\n", val);
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}
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if(score<SRAM_RELIABILITY_SCORE) {
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result = 0;
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14
src/memory.h
14
src/memory.h
@@ -4,16 +4,20 @@
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#ifndef MEMORY_H
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#define MEMORY_H
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#define SRAM_DB_ADDR (0x080000L)
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#define SRAM_DIR_ADDR (0x300000L)
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#define SRAM_CMD_ADDR (0x601004L)
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#define SRAM_FD_ADDR (0x601000L)
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#define SRAM_ROM_ADDR (0x000000L)
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#define SRAM_SAVE_ADDR (0x600000L)
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#define SRAM_MENU_ADDR (0x600000L)
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#define SRAM_DB_ADDR (0x620000L)
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#define SRAM_DIR_ADDR (0x610000L)
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#define SRAM_CMD_ADDR (0x7F1004L)
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#define SRAM_FD_ADDR (0x7F1000L)
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#define SRAM_MENU_SAVE_ADDR (0x7F0000L)
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#define SRAM_SCRATCHPAD (0x7FFF00L)
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#define SRAM_DIRID (0x7FFFF0L)
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#define SRAM_RELIABILITY_SCORE (0x100)
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uint32_t load_rom(uint8_t* filename);
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uint32_t load_rom(uint8_t* filename, uint32_t base_addr);
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uint32_t load_sram(uint8_t* filename, uint32_t base_addr);
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void sram_hexdump(uint32_t addr, uint32_t len);
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uint8_t sram_readbyte(uint32_t addr);
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11
src/snes.c
11
src/snes.c
@@ -15,7 +15,6 @@
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uint8_t initloop=1;
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uint32_t saveram_crc, saveram_crc_old;
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uint32_t saveram_base_addr = 0x600000; // chip 3
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void snes_init() {
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DDRD |= _BV(PD5); // PD5 = RESET_DIR
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DDRD |= _BV(PD6); // PD6 = RESET
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@@ -59,10 +58,10 @@ uint8_t sram_valid = 0;
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void snes_main_loop() {
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if(!romprops.ramsize_bytes)return;
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if(initloop) {
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saveram_crc_old = calc_sram_crc(saveram_base_addr, romprops.ramsize_bytes);
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saveram_crc_old = calc_sram_crc(SRAM_SAVE_ADDR, romprops.ramsize_bytes);
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initloop=0;
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}
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saveram_crc = calc_sram_crc(saveram_base_addr, romprops.ramsize_bytes);
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saveram_crc = calc_sram_crc(SRAM_SAVE_ADDR, romprops.ramsize_bytes);
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sram_valid = sram_reliable();
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if(crc_valid && sram_valid) {
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if(saveram_crc != saveram_crc_old) {
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@@ -82,7 +81,7 @@ void snes_main_loop() {
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uart_puthexshort(saveram_crc);
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uart_putcrlf();
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set_busy_led(1);
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save_sram(file_lfn, romprops.ramsize_bytes, saveram_base_addr);
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save_sram(file_lfn, romprops.ramsize_bytes, SRAM_SAVE_ADDR);
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set_busy_led(0);
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didnotsave=0;
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}
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@@ -90,7 +89,7 @@ void snes_main_loop() {
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diffcount=0;
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uart_putc('V');
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set_busy_led(1);
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save_sram(file_lfn, romprops.ramsize_bytes, saveram_base_addr);
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save_sram(file_lfn, romprops.ramsize_bytes, SRAM_SAVE_ADDR);
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didnotsave=0;
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set_busy_led(0);
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}
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@@ -121,5 +120,5 @@ uint8_t menu_main_loop() {
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void get_selected_name(uint8_t* fn) {
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uint32_t addr = sram_readlong(SRAM_FD_ADDR);
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dprintf("fd addr=%lX\n", addr);
|
||||
sram_readblock(fn, addr+0x41, 256);
|
||||
sram_readblock(fn, addr+0x41+SRAM_MENU_ADDR, 256);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user